From b7985b6a1ecb37d2a385c48b6f5c0c1ef7d49caf Mon Sep 17 00:00:00 2001 From: rootkiller6788 Date: Fri, 21 Aug 2026 15:06:13 +0800 Subject: [PATCH] modeset: fix flags overwrite in nvRmMuxPre/nvRmMuxPost nvRmMuxPre() and nvRmMuxPost() initialize params.flags with DRF_DEF(0073_CTRL_DFP, _DISP_MUX_FLAGS, _SR_ENTER_SKIP, _NO) and then unconditionally overwrite the whole flags word with '=' when selecting the mux switch type. The initial SR_ENTER_SKIP field is therefore dead code: the driver can never request SR_ENTER_SKIP_YES, so RM always performs the PSR-enter sequence during pre-mux operations even on platforms that refuse it (NV_ERR_NOT_SUPPORTED). nvRmMuxPost() also initializes the skip field with the _SR_ENTER_SKIP macro, but the POST command defines the field as _SR_EXIT_SKIP. Both fields share bit 1:1 so the compiled value is identical, but the name does not match the command being issued. OR the switch type into the flags already set, and use the correct _SR_EXIT_SKIP field in nvRmMuxPost(). No functional change: the flag values are unchanged (SR_ENTER_SKIP_NO / SR_EXIT_SKIP_NO are 0 and the switch type values are the same). Issue: #1311 --- src/nvidia-modeset/src/nvkms-rm.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/nvidia-modeset/src/nvkms-rm.c b/src/nvidia-modeset/src/nvkms-rm.c index eea1fce509..9887bec6d7 100644 --- a/src/nvidia-modeset/src/nvkms-rm.c +++ b/src/nvidia-modeset/src/nvkms-rm.c @@ -5577,9 +5577,9 @@ NvBool nvRmMuxPre(const NVDpyEvoRec *pDpyEvo, NvMuxState state) params.flags = DRF_DEF(0073_CTRL_DFP, _DISP_MUX_FLAGS, _SR_ENTER_SKIP, _NO); if (state == MUX_STATE_DISCRETE) { - params.flags = NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_IGPU_TO_DGPU; + params.flags |= NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_IGPU_TO_DGPU; } else if (state == MUX_STATE_INTEGRATED) { - params.flags = NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_DGPU_TO_IGPU; + params.flags |= NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_DGPU_TO_IGPU; } else { return FALSE; } @@ -5672,12 +5672,12 @@ NvBool nvRmMuxPost(const NVDpyEvoRec *pDpyEvo, NvMuxState state) } params.displayId = nvDpyIdToNvU32(pDpyEvo->pConnectorEvo->displayId); - params.flags = DRF_DEF(0073_CTRL_DFP, _DISP_MUX_FLAGS, _SR_ENTER_SKIP, _NO); + params.flags = DRF_DEF(0073_CTRL_DFP, _DISP_MUX_FLAGS, _SR_EXIT_SKIP, _NO); if (state == MUX_STATE_DISCRETE) { - params.flags = NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_IGPU_TO_DGPU; + params.flags |= NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_IGPU_TO_DGPU; } else if (state == MUX_STATE_INTEGRATED) { - params.flags = NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_DGPU_TO_IGPU; + params.flags |= NV0073_CTRL_DFP_DISP_MUX_FLAGS_SWITCH_TYPE_DGPU_TO_IGPU; } else { return FALSE; }