diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md
index a6cb12e1..981c224d 100644
--- a/.github/ISSUE_TEMPLATE/bug_report.md
+++ b/.github/ISSUE_TEMPLATE/bug_report.md
@@ -22,7 +22,7 @@ A clear and concise description of what you expected to happen.
 
 - OS: [e.g. Windows 11, Ubuntu 22.04]
 - GPU: [e.g. RTX 3060]
-- CUDA Toolkit version: [e.g. 13.2]
+- CUDA Toolkit version: [e.g. 13.3]
 - cuDNN version (if applicable): [e.g. 9.x]
 - Rust toolchain: [output of `rustc --version`]
 
diff --git a/.github/workflows/ci_linux.yml b/.github/workflows/ci_linux.yml
index 11d3b38d..19342483 100644
--- a/.github/workflows/ci_linux.yml
+++ b/.github/workflows/ci_linux.yml
@@ -1,6 +1,7 @@
 name: CI on Linux
 
 on:
+  workflow_dispatch:
   pull_request:
     paths-ignore:
       - "**.md"
@@ -25,21 +26,38 @@ jobs:
           - name: Ubuntu-24.04 / CUDA-12.8.1 / x86_64
             image: "ghcr.io/rust-gpu/rust-cuda-ubuntu24-cuda12:latest"
             runner: ubuntu-latest
+            llvm: 7
           - name: Ubuntu-24.04 / CUDA-12.8.1 / ARM64
             image: "ghcr.io/rust-gpu/rust-cuda-ubuntu24-cuda12:latest"
             runner: ubuntu-24.04-arm
-          - name: Ubuntu-24.04 / CUDA-13.0.2 / x86_64
+            llvm: 7
+          - name: Ubuntu-24.04 / CUDA-13.3.1 / x86_64
             image: "ghcr.io/rust-gpu/rust-cuda-ubuntu24-cuda13:latest"
             runner: ubuntu-latest
-          - name: Ubuntu-24.04 / CUDA-13.0.2 / ARM64
+            llvm: 7
+          - name: Ubuntu-24.04 / CUDA-13.3.1 / ARM64
             image: "ghcr.io/rust-gpu/rust-cuda-ubuntu24-cuda13:latest"
             runner: ubuntu-24.04-arm
+            llvm: 7
           - name: RockyLinux-9 / CUDA-12.8.1 / x86_64
             image: "ghcr.io/rust-gpu/rust-cuda-rockylinux9-cuda12:latest"
             runner: ubuntu-latest
-          - name: RockyLinux-9 / CUDA-13.0.2 / x86_64
+            llvm: 7
+          - name: RockyLinux-9 / CUDA-13.3.1 / x86_64
             image: "ghcr.io/rust-gpu/rust-cuda-rockylinux9-cuda13:latest"
             runner: ubuntu-latest
+            llvm: 7
+
+          - name: Ubuntu-24.04 / CUDA-13.3.1 / LLVM-21 / x86_64
+            image: "nvidia/cuda:13.3.1-devel-ubuntu24.04"
+            runner: ubuntu-24.04
+            llvm: 21
+            artifact: linux-x86_64
+          - name: Ubuntu-24.04 / CUDA-13.3.1 / LLVM-21 / ARM64
+            image: "nvidia/cuda:13.3.1-devel-ubuntu24.04"
+            runner: ubuntu-24.04-arm
+            llvm: 21
+            artifact: linux-aarch64
 
     steps:
       - name: Free up space
@@ -109,32 +127,56 @@ jobs:
             sleep infinity
           docker start "$CONTAINER_NAME"
 
+      - name: Install LLVM 21 release and build dependencies
+        if: matrix.variance.llvm == 21
+        env:
+          LLVM_ARCH: ${{ matrix.variance.artifact }}
+        run: |
+          mkdir -p llvm-prebuilt
+          curl --fail --location --retry 3 \
+            "https://github.com/Rust-GPU/rustc_codegen_nvvm-llvm/releases/download/llvm-21.1.8/$LLVM_ARCH.tar.xz" \
+            -o "llvm-prebuilt/$LLVM_ARCH.tar.xz"
+          tar -xf "llvm-prebuilt/$LLVM_ARCH.tar.xz" -C llvm-prebuilt
+          docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
+            apt-get update
+            DEBIAN_FRONTEND=noninteractive apt-get install -y --no-install-recommends \
+              build-essential libclang-dev python3 curl ca-certificates git pkg-config libssl-dev \
+              libffi-dev libedit-dev libxml2-dev libtinfo-dev zlib1g-dev xz-utils
+            curl --proto "=https" --tlsv1.2 -sSf https://sh.rustup.rs | \
+              sh -s -- -y --profile minimal --default-toolchain none
+          '
+
       - name: Verify CUDA, Rust installation
         run: |
           docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
             nvcc --version
+            if [ -f /root/.cargo/env ]; then source /root/.cargo/env; fi
             rustup show
           '
 
       - name: Rustfmt
+        if: matrix.variance.llvm == 7
         run: |
           docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
             cargo fmt --all -- --check
           '
 
       - name: Build all bindings
+        if: matrix.variance.llvm == 7
         run: |
           docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
             cargo build --all-features -p cust_raw
           '
 
       - name: Build workspace
+        if: matrix.variance.llvm == 7
         run: |
           docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
             cargo build
           '
 
       - name: Clippy
+        if: matrix.variance.llvm == 7
         run: |
           docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
             export RUSTFLAGS=-Dwarnings
@@ -143,6 +185,7 @@ jobs:
 
       # Exclude crates with tests that require an NVIDIA GPU: blastoff, cudnn, cust.
       - name: Test
+        if: matrix.variance.llvm == 7
         run: |
           docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
             export RUSTFLAGS=-Dwarnings
@@ -152,12 +195,13 @@ jobs:
               --exclude cust
           '
 
-      # The `llvm19` feature on `nvvm` / `cuda_builder` / `rustc_codegen_nvvm` requires
-      # an LLVM 19 toolchain that isn't in the CI image, so we can't run a single
+      # The `llvm21` feature on `nvvm` / `cuda_builder` / `rustc_codegen_nvvm` requires
+      # an LLVM 21 toolchain that isn't in the CI image, so we can't run a single
       # `--all-features` pass over the whole workspace. Doc those three crates with
       # default features (the LLVM 7 path the CI image already supports) and the rest
       # of the workspace with `--all-features`.
       - name: Check documentation
+        if: matrix.variance.llvm == 7
         run: |
           docker exec "$CONTAINER_NAME" bash -lc 'set -euo pipefail
             export RUSTDOCFLAGS=-Dwarnings
@@ -167,7 +211,38 @@ jobs:
               --document-private-items --no-deps
           '
 
+      # Compile both the host and device code; execution needs an NVIDIA GPU.
+      - name: Build vector-add with LLVM 21
+        if: matrix.variance.llvm == 21
+        env:
+          LLVM_ARCH: ${{ matrix.variance.artifact }}
+        run: |
+          docker exec \
+            -e LLVM_CONFIG_21="/workspace/llvm-prebuilt/$LLVM_ARCH/bin/llvm-config" \
+            -e LLVM_LINK_STATIC=1 \
+            -e RUST_CUDA_DUMP_FINAL_MODULE=1 \
+            -e RUST_CUDA_EMIT_LLVM_IR=1 \
+            "$CONTAINER_NAME" bash -lc 'set -euo pipefail
+              source /root/.cargo/env
+              export LD_LIBRARY_PATH="$(dirname "$LLVM_CONFIG_21")/../lib:/usr/local/cuda/nvvm/lib64:${LD_LIBRARY_PATH:-}"
+              export LIBRARY_PATH="/usr/local/cuda/lib64/stubs:${LIBRARY_PATH:-}"
+              test "$("$LLVM_CONFIG_21" --version)" = 21.1.8
+              python3 tests/llvm-wrapper/run.py
+              cargo build -p vecadd --features llvm21
+            '
+
+      - name: Upload LLVM 21 PTX and IR
+        if: always() && matrix.variance.llvm == 21
+        uses: actions/upload-artifact@v4
+        with:
+          name: vecadd-llvm21-${{ matrix.variance.artifact }}
+          path: |
+            target/**/kernels.ptx
+            target/**/final-module.ll
+          if-no-files-found: warn
+
       - name: Stop build container
+        if: always()
         run: |
           docker rm -f "$CONTAINER_NAME" || true
 
diff --git a/.github/workflows/ci_windows.yml b/.github/workflows/ci_windows.yml
index 9c7d4ce9..b7f6bb16 100644
--- a/.github/workflows/ci_windows.yml
+++ b/.github/workflows/ci_windows.yml
@@ -42,7 +42,7 @@ jobs:
               ]
           - os: windows-latest
             target: x86_64-pc-windows-msvc
-            cuda: "13.0.2"
+            cuda: "13.3.1"
             nvvm-dll-dir: "nvvm\\bin\\x64"
             sub-packages:
               [
@@ -65,7 +65,7 @@ jobs:
         uses: actions/checkout@v4
 
       - name: Install CUDA
-        uses: Jimver/cuda-toolkit@v0.2.29
+        uses: Jimver/cuda-toolkit@v0.2.36
         id: cuda-toolkit
         with:
           cuda: ${{ matrix.cuda }}
@@ -123,8 +123,8 @@ jobs:
             --exclude blastoff --exclude cudnn --exclude cudnn-sys --exclude cust
 
       # Exclude crates that require cuDNN, not available on Windows CI: cudnn, cudnn-sys.
-      # The `llvm19` feature on `nvvm` / `cuda_builder` / `rustc_codegen_nvvm` requires
-      # an LLVM 19 toolchain that isn't in the CI image, so we can't run a single
+      # The `llvm21` feature on `nvvm` / `cuda_builder` / `rustc_codegen_nvvm` requires
+      # an LLVM 21 toolchain that isn't in the CI image, so we can't run a single
       # `--all-features` pass over the whole workspace. Doc those three crates with
       # default features (the LLVM 7 path the CI image already supports) and the rest
       # of the workspace with `--all-features`.
diff --git a/.github/workflows/container_images.yml b/.github/workflows/container_images.yml
index d3d089ea..0f7eb5b7 100644
--- a/.github/workflows/container_images.yml
+++ b/.github/workflows/container_images.yml
@@ -33,16 +33,16 @@ jobs:
           - name: Ubuntu-24.04/CUDA-12.8.1
             image: "rust-cuda-ubuntu24-cuda12"
             dockerfile: ./container/ubuntu24-cuda12/Dockerfile
-          - name: Ubuntu-24.04/CUDA-13.0.2
+          - name: Ubuntu-24.04/CUDA-13.3.1
             image: "rust-cuda-ubuntu24-cuda13"
             dockerfile: ./container/ubuntu24-cuda13/Dockerfile
-          - name: Ubuntu-24.04/CUDA-13.2.1/LLVM-19.1.7
-            image: "rust-cuda-ubuntu24-cuda13-llvm19"
-            dockerfile: ./container/ubuntu24-cuda13-llvm19/Dockerfile
+          - name: Ubuntu-24.04/CUDA-13.3.1/LLVM-21.1.8
+            image: "rust-cuda-ubuntu24-cuda13-llvm21"
+            dockerfile: ./container/ubuntu24-cuda13-llvm21/Dockerfile
           - name: RockyLinux-9/CUDA-12.8.1
             image: "rust-cuda-rockylinux9-cuda12"
             dockerfile: ./container/rockylinux9-cuda12/Dockerfile
-          - name: RockyLinux-9/CUDA-13.0.2
+          - name: RockyLinux-9/CUDA-13.3.1
             image: "rust-cuda-rockylinux9-cuda13"
             dockerfile: ./container/rockylinux9-cuda13/Dockerfile
     steps:
@@ -161,13 +161,13 @@ jobs:
         variance:
           - name: Ubuntu-24.04/CUDA-12.8.1
             image: "rust-cuda-ubuntu24-cuda12"
-          - name: Ubuntu-24.04/CUDA-13.0.2
+          - name: Ubuntu-24.04/CUDA-13.3.1
             image: "rust-cuda-ubuntu24-cuda13"
-          - name: Ubuntu-24.04/CUDA-13.2.1/LLVM-19.1.7
-            image: "rust-cuda-ubuntu24-cuda13-llvm19"
+          - name: Ubuntu-24.04/CUDA-13.3.1/LLVM-21.1.8
+            image: "rust-cuda-ubuntu24-cuda13-llvm21"
           - name: RockyLinux-9/CUDA-12.8.1
             image: "rust-cuda-rockylinux9-cuda12"
-          - name: RockyLinux-9/CUDA-13.0.2
+          - name: RockyLinux-9/CUDA-13.3.1
             image: "rust-cuda-rockylinux9-cuda13"
     steps:
       - name: Set lowercase repo owner
diff --git a/.github/workflows/optimization_wave2.yml b/.github/workflows/optimization_wave2.yml
new file mode 100644
index 00000000..98e31250
--- /dev/null
+++ b/.github/workflows/optimization_wave2.yml
@@ -0,0 +1,68 @@
+name: LLVM 21 optimization wave 2
+
+on:
+  workflow_dispatch:
+    inputs:
+      workload:
+        description: Workload to repeat (all runs the complete matrix)
+        type: choice
+        default: all
+        options: [all, small, representative, solana, bitcoin, ethereum, shallenge, self_test]
+  push:
+    branches: [poc/portable-ptx-export]
+    paths:
+      - '.github/workflows/optimization_wave2.yml'
+      - 'examples/ptx_export/run_wave2.py'
+      - 'examples/ptx_export/representative-kernels/**'
+
+permissions:
+  contents: read
+
+jobs:
+  compare:
+    name: Compare ${{ matrix.workload }}
+    runs-on: ubuntu-24.04
+    timeout-minutes: ${{ matrix.workload == 'self_test' && 90 || 45 }}
+    strategy:
+      fail-fast: false
+      matrix:
+        workload: ${{ fromJSON(inputs.workload != '' && inputs.workload != 'all' && format('["{0}"]', inputs.workload) || '["small","representative","solana","bitcoin","ethereum","shallenge","self_test"]') }}
+    steps:
+      - uses: actions/checkout@v4
+      - uses: DeterminateSystems/nix-installer-action@main
+      - uses: DeterminateSystems/magic-nix-cache-action@v14
+        with:
+          use-flakehub: false
+      - uses: actions/cache/restore@v4
+        with:
+          path: |
+            ~/.cargo/registry
+            ~/.cargo/git
+            target/
+          key: wave2-cargo-${{ runner.os }}-llvm21-${{ github.sha }}
+          restore-keys: |
+            ptx-cargo-v1-${{ runner.os }}-${{ runner.arch }}-llvm21-
+      - name: Build the checked-out backend
+        run: |
+          nix develop .#v21 --command cargo build -p rustc_codegen_nvvm --features llvm21 --target-dir target/cuda-builder-codegen
+          rm -rf target/nvptx64-nvidia-cuda
+      - name: Checkout pinned workload
+        uses: actions/checkout@v4
+        with:
+          repository: brandonros/vanity-miner-rs
+          ref: 9791234249fc8cb762c296c4fda4503d2686ff77
+          path: workloads/vanity-miner
+      - name: Compile and compare
+        run: |
+          mkdir -p artifacts
+          git rev-parse HEAD > artifacts/source-commit.txt
+          sha256sum target/cuda-builder-codegen/debug/librustc_codegen_nvvm.so > artifacts/backend-sha256.txt
+          nix develop .#v21 --command rustc -Vv > artifacts/rustc-version.txt
+          cp flake.lock Cargo.lock rust-toolchain.toml artifacts/
+          nix develop .#v21 --command python3 examples/ptx_export/run_wave2.py ${{ matrix.workload }} --out artifacts/${{ matrix.workload }} --miner workloads/vanity-miner
+      - uses: actions/upload-artifact@v4
+        if: ${{ !cancelled() }}
+        with:
+          name: wave2-${{ matrix.workload }}
+          path: artifacts/
+          if-no-files-found: error
diff --git a/.github/workflows/ptx_export.yml b/.github/workflows/ptx_export.yml
new file mode 100644
index 00000000..7a8435a0
--- /dev/null
+++ b/.github/workflows/ptx_export.yml
@@ -0,0 +1,121 @@
+name: Export portable PTX
+
+on:
+  workflow_dispatch:
+    inputs:
+      cleanup_experiment:
+        description: Replay LLVM 21 handoff IR with opt-in cleanup passes
+        type: boolean
+        default: false
+      optimization_sweep:
+        description: Run the extended CFG, DCE, memory and inlining experiments
+        type: boolean
+        default: false
+      mining_workload:
+        description: Compile pinned Solana mining source and replay memory cleanup
+        type: boolean
+        default: false
+  push:
+    branches: [poc/portable-ptx-export]
+
+permissions:
+  contents: read
+
+jobs:
+  export:
+    runs-on: ubuntu-24.04
+    timeout-minutes: 45
+    steps:
+      - uses: actions/checkout@v4
+      - uses: DeterminateSystems/nix-installer-action@main
+      - uses: DeterminateSystems/magic-nix-cache-action@v14
+        with:
+          use-flakehub: false
+      - name: Restore Cargo cache
+        id: cargo-cache
+        uses: actions/cache/restore@v4
+        with:
+          # Include all nested builds, notably target/cuda-builder-codegen.
+          path: |
+            ~/.cargo/registry
+            ~/.cargo/git
+            target/
+          key: ptx-cargo-v1-${{ runner.os }}-${{ runner.arch }}-llvm21-${{ hashFiles('flake.nix', 'flake.lock', 'rust-toolchain.toml', '**/Cargo.toml', '**/Cargo.lock', '.cargo/**', '.github/workflows/ptx_export.yml') }}-${{ github.sha }}
+          restore-keys: |
+            ptx-cargo-v1-${{ runner.os }}-${{ runner.arch }}-llvm21-${{ hashFiles('flake.nix', 'flake.lock', 'rust-toolchain.toml', '**/Cargo.toml', '**/Cargo.lock', '.cargo/**', '.github/workflows/ptx_export.yml') }}-
+      - name: Test codegen inventory parser
+        run: python3 -m unittest discover -s examples/ptx_export -p 'test_*.py'
+      - name: Rebuild the checked-out backend and regenerate device evidence
+        run: |
+          # cuda_builder searches for an existing backend before trying Cargo.
+          # A restored .so alone therefore does not establish source freshness.
+          nix develop .#v21 --command cargo build -p rustc_codegen_nvvm --features llvm21 --target-dir target/cuda-builder-codegen
+          # Device Cargo fingerprints do not track changes to the backend .so;
+          # cached builds also omit the IR side outputs required by this job.
+          # Retain the expensive host/backend dependency cache.
+          rm -rf target/nvptx64-nvidia-cuda
+      - name: Check guarded-select source semantics on CPU
+        run: |
+          nix develop .#v21 --command rustc --edition=2024 --test examples/ptx_export/kernels/src/guarded_select.rs -o /tmp/guarded-select-debug
+          /tmp/guarded-select-debug
+          nix develop .#v21 --command rustc --edition=2024 -O --test examples/ptx_export/kernels/src/guarded_select.rs -o /tmp/guarded-select-release
+          /tmp/guarded-select-release
+      - name: Compile Rust kernels without a GPU
+        id: export
+        run: |
+          mkdir -p artifacts/ptx
+          printf '%s\n' 'nix develop .#v21 --command cargo run -vv -p ptx_export --features llvm21 -- artifacts/ptx none' > artifacts/ptx/build-command.txt
+          nix develop .#v21 --command cargo run -vv -p ptx_export --features llvm21 -- artifacts/ptx none 2>&1 | tee artifacts/ptx/build.log
+      - name: Verify LLVM 21 handoff IR
+        run: nix develop .#v21 --command opt-21 -passes=verify -disable-output artifacts/ptx/final-module.ll
+      - name: Record provenance
+        run: |
+          git rev-parse HEAD > artifacts/ptx/source-commit.txt
+          nix develop .#v21 --command rustc -Vv > artifacts/ptx/rustc-version.txt
+          nix develop .#v21 --command nvcc --version > artifacts/ptx/nvcc-version.txt
+          cp flake.lock rust-toolchain.toml Cargo.lock artifacts/ptx/
+          sha256sum target/cuda-builder-codegen/debug/librustc_codegen_nvvm.so > artifacts/ptx/backend-sha256.txt
+          # Keep per-crate LLVM IR as well as the linked final-module.ll.
+          mkdir -p artifacts/ptx/llvm-ir
+          find target/nvptx64-nvidia-cuda -name '*.ll' -exec cp --parents '{}' artifacts/ptx/llvm-ir/ \;
+      - name: Assemble and inspect NVIDIA machine code without a GPU
+        run: nix develop .#v21 --command python3 examples/ptx_export/inspect_codegen.py artifacts/ptx
+      - name: Verify default DCE retention and explicit disable
+        run: nix develop .#v21 --command python3 examples/ptx_export/check_default_dce.py artifacts/ptx
+      - name: Investigate pre-NVVM cleanup (opt-in)
+        if: ${{ github.event_name == 'workflow_dispatch' && (inputs.cleanup_experiment || inputs.optimization_sweep) }}
+        run: nix develop .#v21 --command python3 examples/ptx_export/replay_cleanup.py artifacts/ptx ${{ inputs.optimization_sweep && '--extended' || '' }}
+      - name: Validate integrated cleanup against replay (opt-in)
+        if: ${{ github.event_name == 'workflow_dispatch' && (inputs.cleanup_experiment || inputs.optimization_sweep) }}
+        run: nix develop .#v21 --command python3 examples/ptx_export/check_integrated_cleanup.py artifacts/ptx
+      - name: Validate per-module cleanup (extended sweep)
+        if: ${{ !cancelled() && steps.export.outcome == 'success' && github.event_name == 'workflow_dispatch' && inputs.optimization_sweep }}
+        run: nix develop .#v21 --command python3 examples/ptx_export/check_module_cleanup.py artifacts/ptx
+      - name: Validate size-oriented builds (extended sweep)
+        if: ${{ !cancelled() && steps.export.outcome == 'success' && github.event_name == 'workflow_dispatch' && inputs.optimization_sweep }}
+        run: nix develop .#v21 --command python3 examples/ptx_export/check_workloads.py artifacts/ptx
+      - name: Checkout pinned mining workload
+        if: ${{ !cancelled() && steps.export.outcome == 'success' && github.event_name == 'workflow_dispatch' && inputs.mining_workload }}
+        uses: actions/checkout@v4
+        with:
+          repository: brandonros/vanity-miner-rs
+          ref: 9791234249fc8cb762c296c4fda4503d2686ff77
+          path: workloads/vanity-miner
+      - name: Compare cleanup on Solana mining kernel
+        if: ${{ !cancelled() && steps.export.outcome == 'success' && github.event_name == 'workflow_dispatch' && inputs.mining_workload }}
+        run: nix develop .#v21 --command python3 examples/ptx_export/check_workloads.py artifacts/ptx --miner workloads/vanity-miner
+      - uses: actions/upload-artifact@v4
+        if: ${{ !cancelled() }}
+        with:
+          name: rust-ptx
+          path: artifacts/ptx/
+          if-no-files-found: error
+      - name: Save Cargo cache, including after compilation failures
+        if: ${{ !cancelled() && steps.cargo-cache.outcome == 'success' && steps.cargo-cache.outputs.cache-hit != 'true' }}
+        uses: actions/cache/save@v4
+        with:
+          path: |
+            ~/.cargo/registry
+            ~/.cargo/git
+            target/
+          key: ${{ steps.cargo-cache.outputs.cache-primary-key }}
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 2890a775..9115dbeb 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -33,7 +33,7 @@ For questions, clarifications, and general help:
 ### Windows-Specific Notes
 
 - Ensure the CUDA Toolkit `bin` directory is on your `PATH` (e.g.
-  `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.2\bin`).
+  `C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin`).
 - The MSVC build tools are required. Install via
   [Visual Studio Build Tools](https://visualstudio.microsoft.com/downloads/) with the
   "Desktop development with C++" workload.
diff --git a/Cargo.lock b/Cargo.lock
index 1afa046a..97727a62 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -2584,6 +2584,28 @@ dependencies = [
  "strum 0.26.3",
 ]
 
+[[package]]
+name = "ptx-export-kernels"
+version = "0.1.0"
+dependencies = [
+ "cuda_std",
+ "sha2",
+]
+
+[[package]]
+name = "ptx-representative-kernels"
+version = "0.1.0"
+dependencies = [
+ "cuda_std",
+]
+
+[[package]]
+name = "ptx-retention-kernels"
+version = "0.1.0"
+dependencies = [
+ "cuda_std",
+]
+
 [[package]]
 name = "ptx_compiler"
 version = "0.1.1"
@@ -2591,6 +2613,13 @@ dependencies = [
  "cust_raw",
 ]
 
+[[package]]
+name = "ptx_export"
+version = "0.1.0"
+dependencies = [
+ "cuda_builder",
+]
+
 [[package]]
 name = "pxfm"
 version = "0.1.26"
diff --git a/Cargo.toml b/Cargo.toml
index 108b31a6..fac7da6b 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -51,6 +51,10 @@ members = [
   "examples/sha2_crates_io/kernels",
   "examples/vecadd",
   "examples/vecadd/kernels",
+  "examples/ptx_export",
+  "examples/ptx_export/kernels",
+  "examples/ptx_export/retention-kernels",
+  "examples/ptx_export/representative-kernels",
 
   "samples/introduction/async_api",
   "samples/introduction/async_api/kernels",
diff --git a/README.md b/README.md
index 1e410303..d6f1ef02 100644
--- a/README.md
+++ b/README.md
@@ -20,6 +20,49 @@
 Please see [The Rust CUDA Guide](https://rust-gpu.github.io/rust-cuda/) for documentation on Rust
 CUDA.
 
+## Compiler phase timings
+
+From the consuming project's directory, capture the complete command:
+
+```sh
+/path/to/rust-cuda/scripts/trace-build.sh \
+  nix develop .#v21 --command cargo build --release --timings -vv --features llvm21,self_test
+```
+
+The script prints its log location immediately. `build.log` captures the command,
+start/end times, exit status, Nix setup output, and verbose Cargo output. Cargo's
+HTML timing reports are in each build's target directory under `cargo-timings/`;
+the nested kernel build has its own target directory and report.
+
+The script sets `NVVM_TIMING_DIR` to a fresh directory under
+`~/.cache/rust-cuda-traces` (or `$XDG_CACHE_HOME`). You can also set this variable
+yourself. Each builder/compiler process writes `rust-cuda-<pid>.log` there.
+Records include Unix timestamps for cross-process correlation, monotonic elapsed
+milliseconds, thread ID, and codegen-unit name where available. No phase logs are
+created when unset. The logger is shared by `cuda_builder` and the backend through
+the `nvvm` crate.
+
+The phases cover backend lookup/fallback builds, sysroot lookup, nested Cargo,
+artifact parsing/copying, backend initialization, codegen units, LLVM optimization, module merging,
+internalization, cleanup/DCE, IR output, bitcode serialization, libnvvm verification,
+and PTX compilation. Watch the files with `tail -f`: an unmatched `begin` identifies
+work still in progress (or a process that terminated before finishing).
+Phases can nest or overlap, so their durations should not be summed. `end` means
+the scope exited, not that compilation succeeded; panic unwinding uses `unwind`.
+
+With timing enabled, `cuda_builder` adds `--timings` to nested Cargo and
+`-Ztime-passes` plus `-Zself-profile` to its rustc invocations. Rustc query profiles
+are stored under `rustc/` in the trace directory, for analysis with the Rust
+`measureme` tools. These expose compiler work before and during backend execution;
+they cannot expose optimization passes hidden inside NVIDIA's libnvvm.
+
+Changing `NVVM_TIMING_DIR` reruns consuming build scripts that use `CudaBuilder`;
+cached dependencies remain cached. For a genuinely cold build, select a fresh
+`CARGO_TARGET_DIR` after entering the development shell. Warm and cold timings
+measure different work. Existing running compilers cannot be instrumented.
+For local development, patch the consuming project to use the matching local
+Rust-CUDA crates together, rather than mixing them with a pinned Git revision.
+
 ## License
 
 Licensed under either of
diff --git a/container/rockylinux9-cuda13/Dockerfile b/container/rockylinux9-cuda13/Dockerfile
index dc428186..28137e70 100644
--- a/container/rockylinux9-cuda13/Dockerfile
+++ b/container/rockylinux9-cuda13/Dockerfile
@@ -1,4 +1,4 @@
-FROM nvcr.io/nvidia/cuda:13.0.2-cudnn-devel-rockylinux9 AS llvm-builder
+FROM nvcr.io/nvidia/cuda:13.3.1-cudnn-devel-rockylinux9 AS llvm-builder
 
 RUN dnf -y install \
     --nobest \
@@ -51,7 +51,7 @@ RUN curl -sSf -L -O https://github.com/llvm/llvm-project/releases/download/llvmo
     rm -rf llvm-7.1.0.src* && \
     dnf clean all
 
-FROM nvcr.io/nvidia/cuda:13.0.2-cudnn-devel-rockylinux9
+FROM nvcr.io/nvidia/cuda:13.3.1-cudnn-devel-rockylinux9
 
 RUN dnf -y install \
     --nobest \
diff --git a/container/ubuntu24-cuda13-llvm19/Dockerfile b/container/ubuntu24-cuda13-llvm21/Dockerfile
similarity index 64%
rename from container/ubuntu24-cuda13-llvm19/Dockerfile
rename to container/ubuntu24-cuda13-llvm21/Dockerfile
index db4edc9e..0c67b893 100644
--- a/container/ubuntu24-cuda13-llvm19/Dockerfile
+++ b/container/ubuntu24-cuda13-llvm21/Dockerfile
@@ -1,4 +1,4 @@
-FROM nvcr.io/nvidia/cuda:13.2.1-cudnn-devel-ubuntu24.04 AS llvm-builder
+FROM nvcr.io/nvidia/cuda:13.3.1-cudnn-devel-ubuntu24.04 AS llvm-builder
 
 RUN apt-get update && DEBIAN_FRONTEND=noninteractive apt-get -qq -y install \
     build-essential \
@@ -18,13 +18,13 @@ RUN apt-get update && DEBIAN_FRONTEND=noninteractive apt-get -qq -y install \
     zlib1g-dev && \
     rm -rf /var/lib/apt/lists/*
 
-WORKDIR /data/llvm19
+WORKDIR /data/llvm21
 
-# Download and build LLVM 19.1.7 (the active LLVM 19 pin used by `rustc_codegen_nvvm`).
+# Download and build LLVM 21.1.8 (the active LLVM 21 pin used by `rustc_codegen_nvvm`).
 # LLVM 8+ ships as a monorepo tarball; cmake source root is the `llvm/` subdir.
-RUN curl -sSf -L -O https://github.com/llvm/llvm-project/releases/download/llvmorg-19.1.7/llvm-project-19.1.7.src.tar.xz && \
-    tar -xf llvm-project-19.1.7.src.tar.xz && \
-    cd llvm-project-19.1.7.src && \
+RUN curl -sSf -L -O https://github.com/llvm/llvm-project/releases/download/llvmorg-21.1.8/llvm-project-21.1.8.src.tar.xz && \
+    tar -xf llvm-project-21.1.8.src.tar.xz && \
+    cd llvm-project-21.1.8.src && \
     mkdir build && cd build && \
     ARCH=$(dpkg --print-architecture) && \
     if [ "$ARCH" = "amd64" ]; then \
@@ -44,14 +44,14 @@ RUN curl -sSf -L -O https://github.com/llvm/llvm-project/releases/download/llvmo
         -DLLVM_INCLUDE_BENCHMARKS=OFF \
         -DLLVM_ENABLE_ZLIB=ON \
         -DLLVM_ENABLE_TERMINFO=ON \
-        -DCMAKE_INSTALL_PREFIX=/opt/llvm-19 \
+        -DCMAKE_INSTALL_PREFIX=/opt/llvm-21 \
         ../llvm && \
     ninja -j$(nproc) && \
     ninja install && \
     cd ../.. && \
-    rm -rf llvm-project-19.1.7.src*
+    rm -rf llvm-project-21.1.8.src*
 
-FROM nvcr.io/nvidia/cuda:13.2.1-cudnn-devel-ubuntu24.04
+FROM nvcr.io/nvidia/cuda:13.3.1-cudnn-devel-ubuntu24.04
 
 RUN apt-get update && DEBIAN_FRONTEND=noninteractive apt-get -qq -y install \
     build-essential \
@@ -71,10 +71,10 @@ RUN apt-get update && DEBIAN_FRONTEND=noninteractive apt-get -qq -y install \
     libxrandr-dev && \
     rm -rf /var/lib/apt/lists/*
 
-COPY --from=llvm-builder /opt/llvm-19 /opt/llvm-19
-RUN ln -s /opt/llvm-19/bin/llvm-config /usr/bin/llvm-config && \
-    ln -s /opt/llvm-19/bin/llvm-config /usr/bin/llvm-config-19 && \
-    ln -s /opt/llvm-19/bin/llvm-as /usr/bin/llvm-as-19
+COPY --from=llvm-builder /opt/llvm-21 /opt/llvm-21
+RUN ln -s /opt/llvm-21/bin/llvm-config /usr/bin/llvm-config && \
+    ln -s /opt/llvm-21/bin/llvm-config /usr/bin/llvm-config-21 && \
+    ln -s /opt/llvm-21/bin/llvm-as /usr/bin/llvm-as-21
 
 # Get Rust (install rustup; toolchain installed from rust-toolchain.toml below)
 RUN curl -sSf -L https://sh.rustup.rs | bash -s -- -y --profile minimal --default-toolchain none
@@ -85,15 +85,15 @@ WORKDIR /data/rust-cuda
 RUN --mount=type=bind,source=rust-toolchain.toml,target=/data/rust-cuda/rust-toolchain.toml \
     rustup show
 
-# Add nvvm + LLVM 19 dylib to the runtime linker path.
-ENV LD_LIBRARY_PATH="/opt/llvm-19/lib:/usr/local/cuda/nvvm/lib64:${LD_LIBRARY_PATH}"
+# Add nvvm + LLVM 21 dylib to the runtime linker path.
+ENV LD_LIBRARY_PATH="/opt/llvm-21/lib:/usr/local/cuda/nvvm/lib64:${LD_LIBRARY_PATH}"
 
-# `rustc_codegen_nvvm`'s build.rs probes `LLVM_CONFIG_19` to locate the LLVM 19
-# toolchain when the `llvm19` cargo feature is on. The feature itself is gated;
+# `rustc_codegen_nvvm`'s build.rs probes `LLVM_CONFIG_21` to locate the LLVM 21
+# toolchain when the `llvm21` cargo feature is on. The feature itself is gated;
 # downstream crates that depend on `cuda_builder` must build with
-# `--features llvm19` for this to take effect — that propagates through to
-# `nvvm/llvm19` (default `NvvmArch` = Blackwell) and `rustc_codegen_nvvm/llvm19`
-# (LLVM 19 codegen path) per crates/cuda_builder/Cargo.toml.
-ENV LLVM_CONFIG_19=/opt/llvm-19/bin/llvm-config
+# `--features llvm21` for this to take effect — that propagates through to
+# `nvvm/llvm21` (default `NvvmArch` = Blackwell) and `rustc_codegen_nvvm/llvm21`
+# (LLVM 21 codegen path) per crates/cuda_builder/Cargo.toml.
+ENV LLVM_CONFIG_21=/opt/llvm-21/bin/llvm-config
 ENV LLVM_LINK_STATIC=1
 ENV RUST_LOG=info
diff --git a/container/ubuntu24-cuda13/Dockerfile b/container/ubuntu24-cuda13/Dockerfile
index be2a2f73..be2fbe3c 100644
--- a/container/ubuntu24-cuda13/Dockerfile
+++ b/container/ubuntu24-cuda13/Dockerfile
@@ -1,4 +1,4 @@
-FROM nvcr.io/nvidia/cuda:13.0.2-cudnn-devel-ubuntu24.04 AS llvm-builder
+FROM nvcr.io/nvidia/cuda:13.3.1-cudnn-devel-ubuntu24.04 AS llvm-builder
 
 RUN apt-get update && DEBIAN_FRONTEND=noninteractive apt-get -qq -y install \
     build-essential \
@@ -50,7 +50,7 @@ RUN curl -sSf -L -O https://github.com/llvm/llvm-project/releases/download/llvmo
     cd ../.. && \
     rm -rf llvm-7.1.0.src*
 
-FROM nvcr.io/nvidia/cuda:13.0.2-cudnn-devel-ubuntu24.04
+FROM nvcr.io/nvidia/cuda:13.3.1-cudnn-devel-ubuntu24.04
 
 RUN apt-get update && DEBIAN_FRONTEND=noninteractive apt-get -qq -y install \
     build-essential \
diff --git a/crates/cuda_builder/Cargo.toml b/crates/cuda_builder/Cargo.toml
index bd1b4e10..3e465388 100644
--- a/crates/cuda_builder/Cargo.toml
+++ b/crates/cuda_builder/Cargo.toml
@@ -16,12 +16,12 @@ default = []
 # HACK(see rust-gpu/spirv-builder): use `dep:` to avoid Cargo auto-creating a feature
 # with the dependency name. Consumers must explicitly opt-in to compiling the backend.
 rustc_codegen_nvvm = ["dep:rustc_codegen_nvvm"]
-# Build the backend against LLVM 19 instead of LLVM 7. Propagates to `nvvm` (which
+# Build the backend against LLVM 21 instead of LLVM 7. Propagates to `nvvm` (which
 # uses it to flip the default `NvvmArch` to `Compute100`) and, when the optional
 # `rustc_codegen_nvvm` dep is also enabled, to `rustc_codegen_nvvm` itself. Even
 # when the optional dep is disabled, the build script's nested `cargo build -p
-# rustc_codegen_nvvm` reads `cfg(feature = "llvm19")` here and forwards it.
-llvm19 = ["nvvm/llvm19", "rustc_codegen_nvvm?/llvm19"]
+# rustc_codegen_nvvm` reads `cfg(feature = "llvm21")` here and forwards it.
+llvm21 = ["nvvm/llvm21", "rustc_codegen_nvvm?/llvm21"]
 
 [dependencies]
 rustc_codegen_nvvm = { version = "0.3", path = "../rustc_codegen_nvvm", optional = true }
diff --git a/crates/cuda_builder/src/lib.rs b/crates/cuda_builder/src/lib.rs
index 8e8bf2b1..5d7c358a 100644
--- a/crates/cuda_builder/src/lib.rs
+++ b/crates/cuda_builder/src/lib.rs
@@ -51,6 +51,18 @@ impl DebugInfo {
     }
 }
 
+/// Experimental pre-NVVM optimization. Requires the LLVM 21 backend.
+/// The historical LLVM 19 API names are retained for caller compatibility.
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum Llvm19Cleanup {
+    /// Remove unreachable internal definitions without rewriting live function bodies.
+    GlobalDce,
+    /// Inline internal calls, then run scalar cleanup without correlated propagation.
+    InlineScalar,
+    Scalar,
+    Inline,
+}
+
 pub enum EmitOption {
     LlvmIr,
     Bitcode,
@@ -194,6 +206,12 @@ pub struct CudaBuilder {
     /// An optional path where to dump LLVM IR of the final output the codegen will feed to libnvvm. Usually
     /// used for debugging.
     pub final_module_path: Option<PathBuf>,
+    /// Whether the modern backend removes unreachable definitions at the merged handoff.
+    pub llvm19_global_dce: bool,
+    /// Additional opt-in modern LLVM cleanup; disabled by default.
+    pub llvm19_cleanup: Option<Llvm19Cleanup>,
+    /// Experimental scalar cleanup of each codegen unit before serialization.
+    pub llvm19_module_cleanup: bool,
 }
 
 impl CudaBuilder {
@@ -216,9 +234,33 @@ impl CudaBuilder {
             debug: DebugInfo::None,
             build_args: vec![],
             final_module_path: None,
+            llvm19_global_dce: true,
+            llvm19_cleanup: None,
+            llvm19_module_cleanup: false,
         }
     }
 
+    /// Enable or disable the default modern LLVM merged-module GlobalDCE pass.
+    /// Disabling is intended for compiler-output comparisons; LLVM 7 is unchanged.
+    pub fn llvm19_global_dce(mut self, enabled: bool) -> Self {
+        self.llvm19_global_dce = enabled;
+        self
+    }
+
+    /// Enable verified scalar cleanup before each codegen unit is serialized.
+    /// Disabled by default; independent of merged-module cleanup.
+    pub fn llvm19_module_cleanup(mut self, enabled: bool) -> Self {
+        self.llvm19_module_cleanup = enabled;
+        self
+    }
+
+    /// Enable a bounded modern LLVM cleanup pipeline before NVVM compilation.
+    /// This is experimental; compare numerical results and generated code.
+    pub fn llvm19_cleanup(mut self, cleanup: Llvm19Cleanup) -> Self {
+        self.llvm19_cleanup = Some(cleanup);
+        self
+    }
+
     /// Additional arguments passed to cargo during `cargo build`.
     pub fn build_args(mut self, args: &[impl AsRef<str>]) -> Self {
         self.build_args
@@ -354,9 +396,12 @@ impl CudaBuilder {
     /// Runs rustc to build the codegen and codegens the gpu crate, returning the path of the final
     /// ptx file. If [`ptx_file_copy_path`](Self::ptx_file_copy_path) is set, this returns the copied path.
     pub fn build(self) -> Result<PathBuf, CudaBuilderError> {
+        let _timing = timing::phase("cuda_builder", &self.path_to_crate.to_string_lossy());
+        println!("cargo:rerun-if-env-changed=NVVM_TIMING_DIR");
         println!("cargo:rerun-if-changed={}", self.path_to_crate.display());
         let path = invoke_rustc(&self)?;
         if let Some(copy_path) = self.ptx_file_copy_path {
+            let _timing = timing::phase("copy_ptx", &copy_path.to_string_lossy());
             std::fs::copy(path, &copy_path).map_err(CudaBuilderError::FailedToCopyPtxFile)?;
             Ok(copy_path)
         } else {
@@ -392,6 +437,7 @@ fn codegen_filename() -> String {
 }
 
 fn find_rustc_codegen_nvvm() -> PathBuf {
+    let _timing = timing::phase("find_backend", "");
     let filename = codegen_filename();
 
     if let Some(path) = search_backend_artifact(&filename) {
@@ -544,6 +590,7 @@ fn search_backend_artifact(filename: &str) -> Option<PathBuf> {
 }
 
 fn build_backend_and_find(filename: &str) -> Option<PathBuf> {
+    let _timing = timing::phase("build_backend_fallback", filename);
     let workspace_dir = workspace_root_dir()?;
 
     println!("cargo:warning=Building rustc_codegen_nvvm to satisfy cuda_builder requirements");
@@ -556,11 +603,11 @@ fn build_backend_and_find(filename: &str) -> Option<PathBuf> {
         .arg(&target_dir)
         .current_dir(&workspace_dir);
 
-    // Propagate the `llvm19` cargo feature to the nested backend build. Without this
+    // Propagate the `llvm21` cargo feature to the nested backend build. Without this
     // `rustc_codegen_nvvm`'s build script falls through to the prebuilt LLVM 7
-    // download, which the LLVM 19 codegen path can't link against.
-    if cfg!(feature = "llvm19") {
-        cmd.args(["--features", "llvm19"]);
+    // download, which the LLVM 21 codegen path can't link against.
+    if cfg!(feature = "llvm21") {
+        cmd.args(["--features", "llvm21"]);
     }
 
     let status = cmd.status().ok()?;
@@ -662,6 +709,7 @@ fn push_dir(path: PathBuf, dirs: &mut Vec<PathBuf>, seen: &mut HashSet<PathBuf>)
 }
 
 fn rustc_sysroot_lib_dirs() -> Vec<PathBuf> {
+    let _timing = timing::phase("find_sysroot", "");
     let mut dirs = Vec::new();
 
     let sysroot = match Command::new("rustc").args(["--print", "sysroot"]).output() {
@@ -698,6 +746,7 @@ fn rustc_sysroot_lib_dirs() -> Vec<PathBuf> {
 }
 
 fn invoke_rustc(builder: &CudaBuilder) -> Result<PathBuf, CudaBuilderError> {
+    let _timing = timing::phase("prepare_and_build_kernels", "");
     // see https://github.com/EmbarkStudios/rust-gpu/blob/main/crates/spirv-builder/src/lib.rs#L385-L392
     // on what this does
     let rustc_codegen_nvvm = find_rustc_codegen_nvvm();
@@ -723,6 +772,21 @@ fn invoke_rustc(builder: &CudaBuilder) -> Result<PathBuf, CudaBuilderError> {
     }
 
     let mut llvm_args = vec![NvvmOption::Arch(builder.arch).to_string()];
+    if !builder.llvm19_global_dce {
+        llvm_args.push("--disable-llvm19-global-dce".to_string());
+    }
+    if builder.llvm19_module_cleanup {
+        llvm_args.push("--llvm19-module-cleanup".to_string());
+    }
+    if let Some(mode) = builder.llvm19_cleanup {
+        let mode = match mode {
+            Llvm19Cleanup::GlobalDce => "dce",
+            Llvm19Cleanup::InlineScalar => "inline-scalar",
+            Llvm19Cleanup::Scalar => "scalar",
+            Llvm19Cleanup::Inline => "inline",
+        };
+        llvm_args.push(format!("--llvm19-cleanup={mode}"));
+    }
 
     if !builder.nvvm_opts {
         llvm_args.push("-opt=0".to_string());
@@ -769,6 +833,17 @@ fn invoke_rustc(builder: &CudaBuilder) -> Result<PathBuf, CudaBuilderError> {
     }
 
     let mut cargo = Command::new("cargo");
+    if let Some(directory) = env::var_os("NVVM_TIMING_DIR") {
+        let directory = PathBuf::from(directory).join("rustc");
+        // These files cover rustc query activity before and during backend work.
+        // Per-invocation filenames are generated by rustc itself.
+        if let Err(error) = fs::create_dir_all(&directory) {
+            eprintln!("Could not create rustc self-profile directory: {error}");
+        } else {
+            rustflags.push(format!("-Zself-profile={}", directory.display()));
+            rustflags.push("-Ztime-passes".into());
+        }
+    }
     extend_library_path_env(&mut cargo, &library_dirs);
     cargo.args([
         "build",
@@ -779,6 +854,9 @@ fn invoke_rustc(builder: &CudaBuilder) -> Result<PathBuf, CudaBuilderError> {
     ]);
 
     cargo.args(&builder.build_args);
+    if env::var_os("NVVM_TIMING_DIR").is_some() {
+        cargo.arg("--timings");
+    }
 
     if builder.release {
         cargo.arg("--release");
@@ -816,16 +894,19 @@ fn invoke_rustc(builder: &CudaBuilder) -> Result<PathBuf, CudaBuilderError> {
     // HACK(fee1-dead): didn't seem like there was a better way to disable f16/f128s, the `target_config`` did not work for some reason.
     cargo.env("CARGO_FEATURE_NO_F16_F128", "1");
 
+    let nested_timing = timing::phase("nested_cargo", &builder.path_to_crate.to_string_lossy());
     let build = cargo
         .stderr(Stdio::inherit())
         .current_dir(&builder.path_to_crate)
         .env("CARGO_ENCODED_RUSTFLAGS", cargo_encoded_rustflags)
         .output()
         .expect("failed to execute cargo build");
+    drop(nested_timing);
 
     // `get_last_artifact` has the side-effect of printing invalid lines, so
     // we do that even in case of an error, to let through any useful messages
     // that ended up on stdout instead of stderr.
+    let _timing = timing::phase("read_ptx_artifact", "");
     let stdout = String::from_utf8(build.stdout).unwrap();
     let artifact = get_last_artifact(&stdout);
     if build.status.success() {
diff --git a/crates/cuda_std/src/warp.rs b/crates/cuda_std/src/warp.rs
index 75da1d09..a3f2e3ed 100644
--- a/crates/cuda_std/src/warp.rs
+++ b/crates/cuda_std/src/warp.rs
@@ -8,6 +8,9 @@ use crate::gpu_only;
 use core::arch::asm;
 use half::{bf16, f16};
 
+#[path = "warp_control.rs"]
+mod control;
+
 /// Synchronizes all of the threads inside of this warp according to `mask`.
 ///
 /// # Safety
@@ -744,7 +747,7 @@ pub enum WarpShuffleMode {
 // The libintrinsics.ll wrappers pack their (value, predicate) result into a
 // single i64: low 32 bits = value, bit 32 = predicate. Returning a primitive
 // integer avoids the small-aggregate ABI path where rustc attaches `align N`
-// to the call's return value — an attribute LLVM 19's verifier rejects on
+// to the call's return value — an attribute LLVM 21's verifier rejects on
 // non-pointer returns.
 // Unused on host targets — every caller is `#[gpu_only]`.
 #[allow(dead_code)]
@@ -766,15 +769,7 @@ unsafe fn warp_shuffle_32(
         fn __nvvm_warp_shuffle(mask: u32, mode: u32, a: u32, b: u32, c: u32) -> u64;
     }
 
-    assert!(
-        !(width & (width - 1)) != 0 && width <= 32,
-        "width must be a power of 2 and less than or equal to 32"
-    );
-
-    // mimicking nvcc's behavior
-    let mut c = 0;
-    c |= 0b11111;
-    c |= (32 - width) << 8;
+    let c = control::shuffle_control(width, matches!(mode, WarpShuffleMode::Up));
 
     let result = unsafe { __nvvm_warp_shuffle(mask, mode as u32, value, b, c) };
     unpack_warp_result(result)
diff --git a/crates/cuda_std/src/warp_control.rs b/crates/cuda_std/src/warp_control.rs
new file mode 100644
index 00000000..1d1bb3f5
--- /dev/null
+++ b/crates/cuda_std/src/warp_control.rs
@@ -0,0 +1,57 @@
+//! PTX shuffle control encoding, shared by every shuffled value width.
+
+#[allow(dead_code)] // GPU-only callers are replaced with stubs on the host.
+#[inline(always)]
+pub(crate) fn shuffle_control(width: u32, is_up: bool) -> u32 {
+    assert!(
+        width.is_power_of_two() && width <= 32,
+        "width must be a power of 2 and less than or equal to 32"
+    );
+    // UP compares against a segment's lower bound. Other directions compare
+    // against its upper bound. The upper bits partition the 32-lane warp.
+    let clamp = if is_up { 0 } else { 31 };
+    ((32 - width) << 8) | clamp
+}
+
+#[cfg(test)]
+mod tests {
+    extern crate std;
+    use super::shuffle_control;
+
+    #[test]
+    fn control_bounds_match_logical_warp_segments() {
+        for width in [1, 2, 4, 8, 16, 32] {
+            for lane in 0..32_u32 {
+                for is_up in [false, true] {
+                    let control = shuffle_control(width, is_up);
+                    // Apply the PTX ISA's maxLane expression independently.
+                    let mask = (control >> 8) & 31;
+                    let bound = (lane & mask) | ((control & 31) & !mask);
+                    let segment_start = lane / width * width;
+                    assert_eq!(
+                        bound,
+                        if is_up {
+                            segment_start
+                        } else {
+                            segment_start + width - 1
+                        }
+                    );
+                    if is_up {
+                        assert_eq!(lane > bound, lane % width != 0);
+                    } else {
+                        assert_eq!(lane < bound, lane % width + 1 < width);
+                    }
+                }
+            }
+        }
+    }
+
+    #[test]
+    fn rejects_zero_non_power_of_two_and_oversized_widths() {
+        for width in [0, 3, 7, 15, 31, 33, 64, u32::MAX] {
+            for is_up in [false, true] {
+                assert!(std::panic::catch_unwind(|| shuffle_control(width, is_up)).is_err());
+            }
+        }
+    }
+}
diff --git a/crates/cust/build.rs b/crates/cust/build.rs
index d002cdc6..319e6ba0 100644
--- a/crates/cust/build.rs
+++ b/crates/cust/build.rs
@@ -10,6 +10,11 @@ fn main() {
     if driver_version >= 12030 {
         println!("cargo::rustc-cfg=conditional_node");
     }
+    // CUDA 13.3 headers add a reserved graph node discriminant.
+    println!("cargo::rustc-check-cfg=cfg(reserved_graph_node_16)");
+    if driver_version >= 13030 {
+        println!("cargo::rustc-cfg=reserved_graph_node_16");
+    }
     // In CUDA 13.0 several pairs/trios of functions were merged:
     // ```
     // CUresult cuMemAdvise(CUdeviceptr devPtr, size_t count, CUmem_advise advice, CUdevice device);
diff --git a/crates/cust/src/graph.rs b/crates/cust/src/graph.rs
index 9f04329e..8f6cea83 100644
--- a/crates/cust/src/graph.rs
+++ b/crates/cust/src/graph.rs
@@ -175,6 +175,9 @@ pub enum GraphNodeType {
     /// Conditional node.
     #[cfg(conditional_node)]
     Conditional,
+    /// Reserved by CUDA; this does not represent a supported graph operation.
+    #[cfg(reserved_graph_node_16)]
+    Reserved16,
 }
 
 impl GraphNodeType {
@@ -197,6 +200,8 @@ impl GraphNodeType {
             CU_GRAPH_NODE_TYPE_BATCH_MEM_OP => GraphNodeType::BatchMemoryOperation,
             #[cfg(conditional_node)]
             CU_GRAPH_NODE_TYPE_CONDITIONAL => GraphNodeType::Conditional,
+            #[cfg(reserved_graph_node_16)]
+            CU_GRAPH_NODE_TYPE_RESERVED_16 => GraphNodeType::Reserved16,
         }
     }
 
@@ -219,6 +224,8 @@ impl GraphNodeType {
             Self::BatchMemoryOperation => CU_GRAPH_NODE_TYPE_BATCH_MEM_OP,
             #[cfg(conditional_node)]
             Self::Conditional => CU_GRAPH_NODE_TYPE_CONDITIONAL,
+            #[cfg(reserved_graph_node_16)]
+            Self::Reserved16 => CU_GRAPH_NODE_TYPE_RESERVED_16,
         }
     }
 }
@@ -518,3 +525,26 @@ impl Drop for Graph {
         }
     }
 }
+
+#[cfg(test)]
+mod node_type_tests {
+    use super::{GraphNodeType, driver_sys::CUgraphNodeType};
+
+    #[test]
+    fn kernel_node_round_trip() {
+        let raw = CUgraphNodeType::CU_GRAPH_NODE_TYPE_KERNEL;
+        assert_eq!(
+            GraphNodeType::from_raw(raw),
+            GraphNodeType::KernelInvocation
+        );
+        assert_eq!(GraphNodeType::from_raw(raw).to_raw(), raw);
+    }
+
+    #[cfg(reserved_graph_node_16)]
+    #[test]
+    fn reserved_node_round_trip() {
+        let raw = CUgraphNodeType::CU_GRAPH_NODE_TYPE_RESERVED_16;
+        assert_eq!(GraphNodeType::from_raw(raw), GraphNodeType::Reserved16);
+        assert_eq!(GraphNodeType::from_raw(raw).to_raw(), raw);
+    }
+}
diff --git a/crates/cust/src/module.rs b/crates/cust/src/module.rs
index 41eaa953..adb90840 100644
--- a/crates/cust/src/module.rs
+++ b/crates/cust/src/module.rs
@@ -418,6 +418,23 @@ impl Module {
         }
     }
 
+    /// Takes ownership of an already loaded CUDA module without loading it again.
+    ///
+    /// The returned owner unloads the module when dropped. This allows callers
+    /// using raw loading APIs, for example to collect JIT logs, to retain the
+    /// loaded module with cust's normal function lifetimes and cleanup.
+    ///
+    /// # Safety
+    ///
+    /// `inner` must be a valid, non-null module handle loaded in the current CUDA
+    /// context. The caller must transfer exclusive ownership: no other owner may
+    /// unload the module, including another `Module` wrapping the same handle.
+    /// The context must remain alive while the returned module is in use and
+    /// must be current when accessing or dropping it.
+    pub unsafe fn from_raw(inner: driver_sys::CUmodule) -> Self {
+        Self { inner }
+    }
+
     // Get the inner `CUmodule` from the `Module`. If you use this handle elsewhere,
     // make sure not to use it after the module has been dropped. Or ManuallyDrop the struct to be safe.
     pub fn as_inner(&self) -> driver_sys::CUmodule {
diff --git a/crates/cust/tests/module_from_raw.rs b/crates/cust/tests/module_from_raw.rs
new file mode 100644
index 00000000..84ffba6c
--- /dev/null
+++ b/crates/cust/tests/module_from_raw.rs
@@ -0,0 +1,40 @@
+//! Exercise raw-handle ownership without requiring a GPU. This test executable
+//! supplies the unload entry point in place of the CUDA driver.
+
+use cust::module::Module;
+use cust_raw::driver_sys::{CUmodule, CUresult, cudaError_enum};
+use std::sync::atomic::{AtomicBool, AtomicUsize, Ordering};
+
+static UNLOADS: AtomicUsize = AtomicUsize::new(0);
+static FAIL_UNLOAD: AtomicBool = AtomicBool::new(false);
+
+#[unsafe(no_mangle)]
+unsafe extern "C" fn cuModuleUnload(module: CUmodule) -> CUresult {
+    assert_eq!(module, std::ptr::dangling_mut());
+    UNLOADS.fetch_add(1, Ordering::SeqCst);
+    if FAIL_UNLOAD.load(Ordering::SeqCst) {
+        cudaError_enum::CUDA_ERROR_INVALID_CONTEXT
+    } else {
+        cudaError_enum::CUDA_SUCCESS
+    }
+}
+
+#[test]
+fn adopted_module_owns_cleanup_and_survives_failed_explicit_drop() {
+    // SAFETY: the mock driver recognizes this handle and no other owner exists.
+    let module = unsafe { Module::from_raw(std::ptr::dangling_mut()) };
+    assert_eq!(module.as_inner(), std::ptr::dangling_mut());
+    assert_eq!(UNLOADS.load(Ordering::SeqCst), 0);
+    drop(module);
+    assert_eq!(UNLOADS.load(Ordering::SeqCst), 1);
+
+    // SAFETY: begin a new lifetime for the mock driver's handle.
+    let module = unsafe { Module::from_raw(std::ptr::dangling_mut()) };
+    FAIL_UNLOAD.store(true, Ordering::SeqCst);
+    let (_, module) = Module::drop(module).expect_err("mock unload should fail");
+    assert_eq!(module.as_inner(), std::ptr::dangling_mut());
+    assert_eq!(UNLOADS.load(Ordering::SeqCst), 2);
+    FAIL_UNLOAD.store(false, Ordering::SeqCst);
+    drop(module);
+    assert_eq!(UNLOADS.load(Ordering::SeqCst), 3);
+}
diff --git a/crates/nvvm/Cargo.toml b/crates/nvvm/Cargo.toml
index f260f35c..47998f6b 100644
--- a/crates/nvvm/Cargo.toml
+++ b/crates/nvvm/Cargo.toml
@@ -10,11 +10,11 @@ readme = "../../README.md"
 
 [features]
 default = []
-# Match the `llvm19` feature on `rustc_codegen_nvvm`. Currently only flips the
+# Match the `llvm21` feature on `rustc_codegen_nvvm`. Currently only flips the
 # default `NvvmArch` to the lowest Blackwell capability, since the LLVM 7
-# bitcode dialect can't target `compute_100+` and the LLVM 19 dialect can't
+# bitcode dialect can't target `compute_100+` and the LLVM 21 dialect can't
 # target pre-Blackwell archs.
-llvm19 = []
+llvm21 = []
 
 [dependencies]
 cust_raw = { version = "0.11.3", path = "../cust_raw", default-features = false, features = ["nvvm"] }
diff --git a/crates/nvvm/src/lib.rs b/crates/nvvm/src/lib.rs
index 9e0de2a0..9314dd12 100644
--- a/crates/nvvm/src/lib.rs
+++ b/crates/nvvm/src/lib.rs
@@ -13,6 +13,9 @@ use cust_raw::nvvm_sys;
 
 pub use cust_raw::nvvm_sys::LIBDEVICE_BITCODE;
 
+/// Optional compiler and build-driver timing records.
+pub mod timing;
+
 /// Get the major and minor NVVM IR version.
 pub fn ir_version() -> (i32, i32) {
     unsafe {
@@ -310,13 +313,13 @@ pub enum NvvmArch {
     Compute73,
     /// This default value of 7.5 corresponds to Turing and later devices. We default to this
     /// because it is the minimum supported by CUDA 13.0 while being in the middle of the range
-    /// supported by CUDA 12.x. Selected as the default only when the `llvm19` feature is off;
-    /// the LLVM 19 NVVM dialect can't target pre-Blackwell archs.
+    /// supported by CUDA 12.x. Selected as the default only when the `llvm21` feature is off;
+    /// the LLVM 21 NVVM dialect can't target pre-Blackwell archs.
     // WARNING: If you change the default, consider updating:
     // - The `--target-arch` values used for compiletests in `ci_linux.yml` and
     //   `.github/workflows/ci_{linux,windows}.yml`.
     // - The CUDA versions used in `setup_cuda_environment` in `compiletests`.
-    #[cfg_attr(not(feature = "llvm19"), default)]
+    #[cfg_attr(not(feature = "llvm21"), default)]
     Compute75,
     Compute80,
     Compute86,
@@ -326,11 +329,11 @@ pub enum NvvmArch {
     Compute90,
     Compute90a,
     /// First Blackwell arch and the cutoff for NVVM's modern IR dialect — everything at
-    /// or above this capability uses the LLVM 19-flavored bitcode accepted by CUDA 12.9+
+    /// or above this capability uses the LLVM 21-flavored bitcode accepted by CUDA 12.9+
     /// `libnvvm`. See [`NvvmArch::uses_modern_ir_dialect`]. Selected as the default when
-    /// the `llvm19` feature is enabled, since the LLVM 7 dialect can't target this and
-    /// the LLVM 19 dialect can't target anything below it.
-    #[cfg_attr(feature = "llvm19", default)]
+    /// the `llvm21` feature is enabled, since the LLVM 7 dialect can't target this and
+    /// the LLVM 21 dialect can't target anything below it.
+    #[cfg_attr(feature = "llvm21", default)]
     Compute100,
     Compute100f,
     Compute100a,
@@ -758,7 +761,7 @@ impl NvvmProgram {
 
     /// Like [`verify`](Self::verify), but runs the verifier with the same `NvvmOption`s that will
     /// be passed to [`compile`](Self::compile). Passing the user-selected `-arch=compute_XXX` in
-    /// particular matters for CUDA 12.9+ / LLVM 19 bitcode: without it the verifier can fall back
+    /// particular matters for CUDA 12.9+ / LLVM 21 bitcode: without it the verifier can fall back
     /// to the legacy LLVM 7 parser and reject modern-dialect bitcode that would otherwise compile
     /// fine.
     pub fn verify_with_options(&self, options: &[NvvmOption]) -> Result<(), NvvmError> {
diff --git a/crates/nvvm/src/timing.rs b/crates/nvvm/src/timing.rs
new file mode 100644
index 00000000..11f1c788
--- /dev/null
+++ b/crates/nvvm/src/timing.rs
@@ -0,0 +1,139 @@
+//! Opt-in, live compiler phase logs. One file per rustc process avoids contention
+//! between Cargo jobs. No tracing subscriber or additional dependency is needed.
+use std::{
+    fs::{self, File, OpenOptions},
+    io::Write,
+    sync::{Mutex, OnceLock},
+    time::{Instant, SystemTime, UNIX_EPOCH},
+};
+
+struct Log {
+    file: Mutex<File>,
+    epoch: Instant,
+}
+
+impl Log {
+    fn record(&self, event: &str, stage: &str, detail: &str, elapsed: f64) {
+        // File is unbuffered: each record is visible to tail immediately. Logging
+        // failures must not turn a successful compilation into a failed build.
+        if let Ok(mut file) = self.file.lock() {
+            let _ = writeln!(
+                file,
+                "unix_ms={} at_ms={:.3} pid={} thread={:?} event={} stage={:?} detail={:?} elapsed_ms={:.3}",
+                SystemTime::now()
+                    .duration_since(UNIX_EPOCH)
+                    .unwrap_or_default()
+                    .as_millis(),
+                self.epoch.elapsed().as_secs_f64() * 1000.0,
+                std::process::id(),
+                std::thread::current().id(),
+                event,
+                stage,
+                detail,
+                elapsed
+            );
+        }
+    }
+}
+
+fn log() -> Option<&'static Log> {
+    static LOG: OnceLock<Option<Log>> = OnceLock::new();
+    LOG.get_or_init(|| {
+        let directory = std::env::var_os("NVVM_TIMING_DIR")?;
+        let path = std::path::PathBuf::from(directory)
+            .join(format!("rust-cuda-{}.log", std::process::id()));
+        let result = (|| {
+            fs::create_dir_all(path.parent().unwrap())?;
+            OpenOptions::new().create(true).append(true).open(&path)
+        })();
+        match result {
+            Ok(file) => {
+                eprintln!("Rust-CUDA timing log: {}", path.display());
+                Some(Log {
+                    file: Mutex::new(file),
+                    epoch: Instant::now(),
+                })
+            }
+            Err(error) => {
+                eprintln!(
+                    "Could not create Rust-CUDA timing log {}: {error}",
+                    path.display()
+                );
+                None
+            }
+        }
+    })
+    .as_ref()
+}
+
+/// A phase emits its end record on drop, including during panic unwinding.
+pub struct Phase(Option<Active>);
+
+struct Active {
+    log: &'static Log,
+    stage: &'static str,
+    detail: String,
+    start: Instant,
+}
+
+/// Start a phase when `NVVM_TIMING_DIR` is set; otherwise this is inert.
+pub fn phase(stage: &'static str, detail: &str) -> Phase {
+    Phase(log().map(|log| {
+        log.record("begin", stage, detail, 0.0);
+        Active {
+            log,
+            stage,
+            detail: detail.to_owned(),
+            start: Instant::now(),
+        }
+    }))
+}
+
+impl Drop for Phase {
+    fn drop(&mut self) {
+        if let Some(active) = &self.0 {
+            active.log.record(
+                if std::thread::panicking() {
+                    "unwind"
+                } else {
+                    "end"
+                },
+                active.stage,
+                &active.detail,
+                active.start.elapsed().as_secs_f64() * 1000.0,
+            );
+        }
+    }
+}
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn records_are_visible_before_phase_ends() {
+        let path =
+            std::env::temp_dir().join(format!("nvvm-timing-test-{}.log", std::process::id()));
+        let log = Box::leak(Box::new(Log {
+            file: Mutex::new(File::create(&path).unwrap()),
+            epoch: Instant::now(),
+        }));
+        log.record("begin", "test", "module\nname", 0.0);
+        let scope = Phase(Some(Active {
+            log,
+            stage: "test",
+            detail: "module\nname".into(),
+            start: Instant::now(),
+        }));
+        let before = fs::read_to_string(&path).unwrap();
+        assert_eq!(before.lines().count(), 1);
+        assert!(before.contains("event=begin"));
+        assert!(!before.contains("event=end"));
+        drop(scope);
+        let after = fs::read_to_string(&path).unwrap();
+        assert_eq!(after.lines().count(), 2);
+        assert!(after.contains("event=end"));
+        assert!(after.contains("elapsed_ms="));
+        fs::remove_file(path).unwrap();
+    }
+}
diff --git a/crates/rustc_codegen_nvvm/Cargo.toml b/crates/rustc_codegen_nvvm/Cargo.toml
index bab4c499..5c22cf49 100644
--- a/crates/rustc_codegen_nvvm/Cargo.toml
+++ b/crates/rustc_codegen_nvvm/Cargo.toml
@@ -16,7 +16,7 @@ crate-type = ["dylib"]
 
 [features]
 default = []
-llvm19 = []
+llvm21 = []
 
 [dependencies]
 nvvm = { version = "0.1", path = "../nvvm" }
diff --git a/crates/rustc_codegen_nvvm/build.rs b/crates/rustc_codegen_nvvm/build.rs
index 973c3499..f3a49564 100644
--- a/crates/rustc_codegen_nvvm/build.rs
+++ b/crates/rustc_codegen_nvvm/build.rs
@@ -26,21 +26,22 @@ const LLVM7: LlvmFlavor = LlvmFlavor {
     prebuilt_url: PREBUILT_LLVM_URL_LLVM7,
 };
 
-const LLVM19: LlvmFlavor = LlvmFlavor {
-    major: 19,
-    config_env: "LLVM_CONFIG_19",
-    default_binary: "llvm-config-19",
+const LLVM21: LlvmFlavor = LlvmFlavor {
+    major: 21,
+    config_env: "LLVM_CONFIG_21",
+    default_binary: "llvm-config-21",
     probe_cuda_home: true,
-    prebuilt_url: PREBUILT_LLVM_URL_LLVM19,
+    prebuilt_url: PREBUILT_LLVM_URL_LLVM21,
 };
 
 static PREBUILT_LLVM_URL_LLVM7: &str =
     "https://github.com/rust-gpu/rustc_codegen_nvvm-llvm/releases/download/llvm-7.1.0/";
-static PREBUILT_LLVM_URL_LLVM19: &str =
-    "https://github.com/rust-gpu/rustc_codegen_nvvm-llvm/releases/download/llvm-19.1.7/";
+
+static PREBUILT_LLVM_URL_LLVM21: &str =
+    "https://github.com/rust-gpu/rustc_codegen_nvvm-llvm/releases/download/llvm-21.1.8/";
 
 fn main() {
-    let flavor = if llvm19_enabled() { &LLVM19 } else { &LLVM7 };
+    let flavor = if llvm21_enabled() { &LLVM21 } else { &LLVM7 };
     rustc_llvm_build(flavor);
 }
 
@@ -66,8 +67,8 @@ pub fn output(cmd: &mut Command) -> String {
     String::from_utf8(output.stdout).unwrap()
 }
 
-fn llvm19_enabled() -> bool {
-    tracked_env_var_os("CARGO_FEATURE_LLVM19").is_some()
+fn llvm21_enabled() -> bool {
+    tracked_env_var_os("CARGO_FEATURE_LLVM21").is_some()
 }
 
 fn command_version(path: &Path) -> Option<String> {
@@ -97,7 +98,7 @@ fn sibling_llvm_tool(llvm_config: &Path, tool_prefix: &str) -> Option<PathBuf> {
     // into /usr/bin/ but the rest of the toolchain stays in the install prefix
     // (e.g. /usr/bin/llvm-config -> /opt/llvm-7/bin/llvm-config, with /opt/llvm-7/bin
     // off PATH). It also handles source-built toolchains where tool names are
-    // unsuffixed (`llvm-as`) versus apt-packaged ones (`llvm-as-19`).
+    // unsuffixed (`llvm-as`) versus apt-packaged ones (`llvm-as-21`).
     let output = Command::new(llvm_config).arg("--bindir").output().ok()?;
     if !output.status.success() {
         return None;
@@ -112,7 +113,7 @@ fn target_to_llvm_prebuilt(target: &str) -> String {
         "x86_64-unknown-linux-gnu" => "linux-x86_64",
         "aarch64-unknown-linux-gnu" => "linux-aarch64",
         _ => panic!(
-            "Unsupported target with no matching prebuilt LLVM: `{target}`, install LLVM and set LLVM_CONFIG (or LLVM_CONFIG_19 when the `llvm19` feature is enabled)"
+            "Unsupported target with no matching prebuilt LLVM: `{target}`, install LLVM and set LLVM_CONFIG (or LLVM_CONFIG_21 when the `llvm21` feature is enabled)"
         ),
     };
     format!("{base}.tar.xz")
@@ -202,7 +203,7 @@ fn find_llvm_config(target: &str, flavor: &LlvmFlavor) -> PathBuf {
 
     let url = tracked_env_var_os("PREBUILT_LLVM_URL")
         .map(|x| x.to_string_lossy().to_string())
-        .unwrap_or_else(|| flavor.prebuilt_url.to_string());
+        .unwrap_or_else(|| flavor.prebuilt_url.to_owned());
     download_prebuilt_llvm(target, &url)
 }
 
@@ -256,9 +257,20 @@ fn configure_libintrinsics(llvm_config: &Path, flavor: &LlvmFlavor) {
 
     build_helper::rerun_if_changed(Path::new("libintrinsics.ll"));
 
-    let input = manifest_dir.join("libintrinsics.ll");
-    let output = PathBuf::from(env::var("OUT_DIR").expect("OUT_DIR was not set"))
-        .join(format!("libintrinsics_v{}.bc", flavor.major));
+    let shuffle_version = if flavor.major >= 19 { 19 } else { 7 };
+    let shuffle = format!("libintrinsics_shuffle_v{shuffle_version}.ll");
+    build_helper::rerun_if_changed(Path::new(&shuffle));
+    let out_dir = PathBuf::from(env::var("OUT_DIR").expect("OUT_DIR was not set"));
+    let input = out_dir.join(format!("libintrinsics_v{}.ll", flavor.major));
+    let output = out_dir.join(format!("libintrinsics_v{}.bc", flavor.major));
+    // Modern NVVM encodes the shuffle operation in the intrinsic name. Keep
+    // the legacy wrapper separate so LLVM 7 retains its original interface.
+    let common = std::fs::read_to_string(manifest_dir.join("libintrinsics.ll"))
+        .expect("could not read common NVVM intrinsic wrappers");
+    let shuffle = std::fs::read_to_string(manifest_dir.join(shuffle))
+        .expect("could not read dialect-specific shuffle wrappers");
+    std::fs::write(&input, format!("{common}\n{shuffle}"))
+        .expect("could not write assembled NVVM intrinsic source");
     let llvm_as = find_llvm_as(llvm_config, flavor);
 
     let status = Command::new(&llvm_as)
@@ -294,7 +306,11 @@ fn rustc_llvm_build(flavor: &LlvmFlavor) {
 
     configure_libintrinsics(&llvm_config, flavor);
 
-    let required_components = &["ipo", "bitreader", "bitwriter", "lto", "nvptx"];
+    let required_components: &[&str] = if flavor.major >= 19 {
+        &["ipo", "bitreader", "bitwriter", "lto", "nvptx", "passes"]
+    } else {
+        &["ipo", "bitreader", "bitwriter", "lto", "nvptx"]
+    };
 
     let components = output(Command::new(&llvm_config).arg("--components"));
     let mut components = components.split_whitespace().collect::<Vec<_>>();
diff --git a/crates/rustc_codegen_nvvm/libintrinsics.ll b/crates/rustc_codegen_nvvm/libintrinsics.ll
index ef60b884..709ad677 100644
--- a/crates/rustc_codegen_nvvm/libintrinsics.ll
+++ b/crates/rustc_codegen_nvvm/libintrinsics.ll
@@ -6,7 +6,7 @@
 ; LLVM 7 path, regenerate the .bc with `llvm-as-7` (older or newer llvm-as will emit a
 ; bitcode format libnvvm rejects).
 ;
-; The LLVM 19 path assembles this same source at build time with `llvm-as-19`; no
+; The LLVM 21 path assembles this same source at build time with `llvm-as-19`; no
 ; regeneration required, just edit and rebuild.
 source_filename = "libintrinsics"
 ; This data layout must match `DATA_LAYOUT` in `crates/rustc_codegen_nvvm/src/target.rs`.
@@ -156,24 +156,10 @@ declare {i16, i1} @llvm.umul.with.overflow.i16(i16, i16) #0
 ; small two-field aggregate — produces { i32, i8 }, which libnvvm rejects. We
 ; used to bridge by re-packing into { i32, i8 } here, but that aggregate return
 ; causes rustc's call-site ABI to attach `align N` to the return value, which
-; LLVM 19's verifier rejects (align is only valid on pointer returns). So we
+; LLVM 21's verifier rejects (align is only valid on pointer returns). So we
 ; pack into a plain i64 instead: low 32 bits = value, bit 32 = predicate.
 ; Primitive integer return ⇒ no struct ABI ⇒ no spurious return-attribute.
 
-define i64 @__nvvm_warp_shuffle(i32, i32, i32, i32, i32) #1 {
-start:
-  %r = call { i32, i1 } @llvm.nvvm.shfl.sync.i32(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
-  %val = extractvalue { i32, i1 } %r, 0
-  %pred = extractvalue { i32, i1 } %r, 1
-  %val64 = zext i32 %val to i64
-  %pred64 = zext i1 %pred to i64
-  %pred_hi = shl i64 %pred64, 32
-  %packed = or i64 %val64, %pred_hi
-  ret i64 %packed
-}
-
-declare { i32, i1 } @llvm.nvvm.shfl.sync.i32(i32, i32, i32, i32, i32) #1
-
 define i64 @__nvvm_warp_match_all_32(i32, i32) {
 start:
   %r = call { i32, i1 } @llvm.nvvm.match.all.sync.i32(i32 %0, i32 %1)
diff --git a/crates/rustc_codegen_nvvm/libintrinsics_shuffle_v19.ll b/crates/rustc_codegen_nvvm/libintrinsics_shuffle_v19.ll
new file mode 100644
index 00000000..37b3112f
--- /dev/null
+++ b/crates/rustc_codegen_nvvm/libintrinsics_shuffle_v19.ll
@@ -0,0 +1,39 @@
+; LLVM 19 / modern NVVM dialect: the operation is encoded in the intrinsic
+; name, not an extra mode operand. Preserve the Rust-facing packed i64 ABI.
+define i64 @__nvvm_warp_shuffle(i32 %mask, i32 %mode, i32 %value, i32 %offset, i32 %clamp) convergent #1 {
+start:
+  switch i32 %mode, label %invalid [
+    i32 0, label %idx
+    i32 1, label %up
+    i32 2, label %down
+    i32 3, label %bfly
+  ]
+idx:
+  %ri = call { i32, i1 } @llvm.nvvm.shfl.sync.idx.i32p(i32 %mask, i32 %value, i32 %offset, i32 %clamp)
+  br label %pack
+up:
+  %ru = call { i32, i1 } @llvm.nvvm.shfl.sync.up.i32p(i32 %mask, i32 %value, i32 %offset, i32 %clamp)
+  br label %pack
+down:
+  %rd = call { i32, i1 } @llvm.nvvm.shfl.sync.down.i32p(i32 %mask, i32 %value, i32 %offset, i32 %clamp)
+  br label %pack
+bfly:
+  %rb = call { i32, i1 } @llvm.nvvm.shfl.sync.bfly.i32p(i32 %mask, i32 %value, i32 %offset, i32 %clamp)
+  br label %pack
+invalid:
+  unreachable
+pack:
+  %r = phi { i32, i1 } [ %ri, %idx ], [ %ru, %up ], [ %rd, %down ], [ %rb, %bfly ]
+  %val = extractvalue { i32, i1 } %r, 0
+  %pred = extractvalue { i32, i1 } %r, 1
+  %val64 = zext i32 %val to i64
+  %pred64 = zext i1 %pred to i64
+  %pred_hi = shl i64 %pred64, 32
+  %packed = or i64 %val64, %pred_hi
+  ret i64 %packed
+}
+
+declare { i32, i1 } @llvm.nvvm.shfl.sync.idx.i32p(i32, i32, i32, i32) convergent
+declare { i32, i1 } @llvm.nvvm.shfl.sync.up.i32p(i32, i32, i32, i32) convergent
+declare { i32, i1 } @llvm.nvvm.shfl.sync.down.i32p(i32, i32, i32, i32) convergent
+declare { i32, i1 } @llvm.nvvm.shfl.sync.bfly.i32p(i32, i32, i32, i32) convergent
diff --git a/crates/rustc_codegen_nvvm/libintrinsics_shuffle_v7.ll b/crates/rustc_codegen_nvvm/libintrinsics_shuffle_v7.ll
new file mode 100644
index 00000000..49be3985
--- /dev/null
+++ b/crates/rustc_codegen_nvvm/libintrinsics_shuffle_v7.ll
@@ -0,0 +1,14 @@
+define i64 @__nvvm_warp_shuffle(i32, i32, i32, i32, i32) #1 {
+start:
+  %r = call { i32, i1 } @llvm.nvvm.shfl.sync.i32(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4)
+  %val = extractvalue { i32, i1 } %r, 0
+  %pred = extractvalue { i32, i1 } %r, 1
+  %val64 = zext i32 %val to i64
+  %pred64 = zext i1 %pred to i64
+  %pred_hi = shl i64 %pred64, 32
+  %packed = or i64 %val64, %pred_hi
+  ret i64 %packed
+}
+
+declare { i32, i1 } @llvm.nvvm.shfl.sync.i32(i32, i32, i32, i32, i32) #1
+
diff --git a/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/PassWrapper.cpp b/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/PassWrapper.cpp
index e03bdaa6..fa9aa23a 100644
--- a/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/PassWrapper.cpp
+++ b/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/PassWrapper.cpp
@@ -13,6 +13,7 @@
 #include <vector>
 #include <set>
 #include <optional>
+#include <memory>
 #include <string>
 
 #include "rustllvm.h"
@@ -25,6 +26,9 @@
 #include "llvm/Support/FileSystem.h"
 #if LLVM_VERSION_MAJOR >= 19
 #include "llvm/Transforms/IPO/Internalize.h"
+#include "llvm/Passes/PassBuilder.h"
+#include "llvm/IR/Verifier.h"
+#include "llvm/Support/Error.h"
 #endif
 #if LLVM_VERSION_MAJOR >= 19
 #include "llvm/TargetParser/Host.h"
@@ -166,10 +170,79 @@ extern "C" void LLVMPassManagerBuilderPopulateLTOPassManager(
 }
 #endif
 
+// Explicit, bounded modern-PM cleanup at the final NVVM handoff. This is
+// separate from the legacy compatibility builder and remains opt-in.
+// Keep discriminants in sync with llvm::NvvmCleanup on the Rust side.
+enum class LLVMRustNvvmCleanup : uint32_t { Scalar = 0, Inline = 1, GlobalDce = 2, InlineScalar = 3 };
+
+extern "C" LLVMRustResult LLVMRustRunNvvmCleanup(LLVMModuleRef M, LLVMRustNvvmCleanup Mode)
+{
+#if LLVM_VERSION_MAJOR >= 19
+  Module &Mod = *unwrap(M);
+  std::string Diagnostics;
+  raw_string_ostream OS(Diagnostics);
+  if (verifyModule(Mod, &OS)) {
+    LLVMRustSetLastError(OS.str().c_str());
+    return LLVMRustResult::Failure;
+  }
+  LoopAnalysisManager LAM;
+  FunctionAnalysisManager FAM;
+  CGSCCAnalysisManager CGAM;
+  ModuleAnalysisManager MAM;
+  // Match opt's target-aware analyses. Without a TargetMachine the inliner
+  // uses generic costs and can disagree with replay even on identical IR.
+  // Use the module's NVPTX triple and generic CPU, as the existing backend
+  // does; NVVM remains responsible for the selected compute architecture.
+  std::string TargetError;
+  const Target *T = TargetRegistry::lookupTarget(Mod.getTargetTriple(), TargetError);
+  if (!T) {
+    LLVMRustSetLastError(TargetError.c_str());
+    return LLVMRustResult::Failure;
+  }
+  std::unique_ptr<TargetMachine> TM(T->createTargetMachine(
+      Mod.getTargetTriple(), "", "", TargetOptions(), std::nullopt));
+  if (!TM) {
+    LLVMRustSetLastError("Could not create cleanup TargetMachine");
+    return LLVMRustResult::Failure;
+  }
+  PassBuilder PB(TM.get());
+  PB.registerModuleAnalyses(MAM);
+  PB.registerCGSCCAnalyses(CGAM);
+  PB.registerFunctionAnalyses(FAM);
+  PB.registerLoopAnalyses(LAM);
+  PB.crossRegisterProxies(LAM, FAM, CGAM, MAM);
+  ModulePassManager PM;
+  // Prune unreachable functions before inlining, then expose and simplify
+  // branch-correlated iterator values. Keep this identical to offline replay.
+  const char *Pipeline = Mode == LLVMRustNvvmCleanup::GlobalDce
+      ? "globaldce,verify"
+      : Mode == LLVMRustNvvmCleanup::InlineScalar
+      ? "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify"
+      : Mode == LLVMRustNvvmCleanup::Inline
+      ? "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),"
+        "globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify"
+      : "function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify";
+  if (auto Error = PB.parsePassPipeline(PM, Pipeline)) {
+    LLVMRustSetLastError(toString(std::move(Error)).c_str());
+    return LLVMRustResult::Failure;
+  }
+  PM.run(Mod, MAM);
+  Diagnostics.clear();
+  if (verifyModule(Mod, &OS)) {
+    LLVMRustSetLastError(OS.str().c_str());
+    return LLVMRustResult::Failure;
+  }
+  return LLVMRustResult::Success;
+#else
+  LLVMRustSetLastError("NVVM cleanup requires LLVM 19");
+  return LLVMRustResult::Failure;
+#endif
+}
+
 extern "C" void LLVMInitializePasses()
 {
 #if LLVM_VERSION_MAJOR >= 19
-  // LLVM 19's pass pipeline is driven through PassBuilder, so the legacy
+  // LLVM 21's pass pipeline is driven through PassBuilder, so the legacy
   // registry initialization hooks are not needed here.
 #else
   PassRegistry &Registry = *PassRegistry::getPassRegistry();
@@ -641,7 +714,11 @@ extern "C" void LLVMRustAddBuilderLibraryInfo(LLVMPassManagerBuilderRef PMBR,
 {
 #if LLVM_VERSION_MAJOR >= 19
   auto *Builder = unwrap(PMBR);
+#if LLVM_VERSION_MAJOR >= 21
+  Builder->TargetTriple = unwrap(M)->getTargetTriple().str();
+#else
   Builder->TargetTriple = unwrap(M)->getTargetTriple();
+#endif
   Builder->DisableSimplifyLibCalls = DisableSimplifyLibCalls;
 #else
   Triple TargetTriple(unwrap(M)->getTargetTriple());
@@ -1134,7 +1211,7 @@ LLVMRustWriteThinBitcodeToFile(LLVMPassManagerRef PMR,
   (void)M;
   (void)BcFile;
   (void)BcFileLen;
-  LLVMRustSetLastError("ThinLTO bitcode writing is not implemented for LLVM 19 yet");
+  LLVMRustSetLastError("ThinLTO bitcode writing is not implemented for LLVM 21 yet");
   return false;
 }
 
@@ -1159,7 +1236,7 @@ LLVMRustCreateThinLTOData(LLVMRustThinLTOModule *modules,
   (void)num_modules;
   (void)preserved_symbols;
   (void)num_symbols;
-  LLVMRustSetLastError("ThinLTO indexing is not implemented for LLVM 19 yet");
+  LLVMRustSetLastError("ThinLTO indexing is not implemented for LLVM 21 yet");
   return nullptr;
 }
 
@@ -1174,7 +1251,7 @@ LLVMRustPrepareThinLTORename(const LLVMRustThinLTOData *Data, LLVMModuleRef M)
 {
   (void)Data;
   (void)M;
-  LLVMRustSetLastError("ThinLTO rename is not implemented for LLVM 19 yet");
+  LLVMRustSetLastError("ThinLTO rename is not implemented for LLVM 21 yet");
   return false;
 }
 
@@ -1183,7 +1260,7 @@ LLVMRustPrepareThinLTOResolveWeak(const LLVMRustThinLTOData *Data, LLVMModuleRef
 {
   (void)Data;
   (void)M;
-  LLVMRustSetLastError("ThinLTO weak resolution is not implemented for LLVM 19 yet");
+  LLVMRustSetLastError("ThinLTO weak resolution is not implemented for LLVM 21 yet");
   return false;
 }
 
@@ -1192,7 +1269,7 @@ LLVMRustPrepareThinLTOInternalize(const LLVMRustThinLTOData *Data, LLVMModuleRef
 {
   (void)Data;
   (void)M;
-  LLVMRustSetLastError("ThinLTO internalization is not implemented for LLVM 19 yet");
+  LLVMRustSetLastError("ThinLTO internalization is not implemented for LLVM 21 yet");
   return false;
 }
 
@@ -1201,7 +1278,7 @@ LLVMRustPrepareThinLTOImport(const LLVMRustThinLTOData *Data, LLVMModuleRef M)
 {
   (void)Data;
   (void)M;
-  LLVMRustSetLastError("ThinLTO importing is not implemented for LLVM 19 yet");
+  LLVMRustSetLastError("ThinLTO importing is not implemented for LLVM 21 yet");
   return false;
 }
 
diff --git a/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/RustWrapper.cpp b/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/RustWrapper.cpp
index 5abe7900..34568c15 100644
--- a/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/RustWrapper.cpp
+++ b/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/RustWrapper.cpp
@@ -197,7 +197,11 @@ extern "C" LLVMContextRef LLVMRustContextCreate(bool shouldDiscardNames)
 extern "C" void LLVMRustSetNormalizedTarget(LLVMModuleRef M,
                                             const char *Triple)
 {
-  unwrap(M)->setTargetTriple(Triple::normalize(Triple));
+#if LLVM_VERSION_MAJOR >= 21
+  unwrap(M)->setTargetTriple(llvm::Triple(llvm::Triple::normalize(Triple)));
+#else
+  unwrap(M)->setTargetTriple(llvm::Triple::normalize(Triple));
+#endif
 }
 
 extern "C" void LLVMRustPrintPassTimings()
@@ -264,7 +268,11 @@ static Attribute::AttrKind fromRust(LLVMRustAttribute Kind)
   case NoAlias:
     return Attribute::NoAlias;
   case NoCapture:
+#if LLVM_VERSION_MAJOR >= 21
+    return Attribute::Captures;
+#else
     return Attribute::NoCapture;
+#endif
   case NoInline:
     return Attribute::NoInline;
   case NonNull:
@@ -285,7 +293,7 @@ static Attribute::AttrKind fromRust(LLVMRustAttribute Kind)
     return Attribute::SExt;
   case StructRet:
 #if LLVM_VERSION_MAJOR >= 19
-    report_fatal_error("StructRet not supported without a type on LLVM 19+");
+    report_fatal_error("StructRet not supported without a type on LLVM 21+");
 #else
     return Attribute::StructRet;
 #endif
@@ -307,6 +315,17 @@ static Attribute::AttrKind fromRust(LLVMRustAttribute Kind)
   report_fatal_error("bad AttributeKind");
 }
 
+// LLVM 21 replaced the enum attribute nocapture with captures(none).
+// Construct its payload explicitly for both function and call-site attributes.
+static Attribute rustAttribute(LLVMContext &Ctx, LLVMRustAttribute Kind)
+{
+#if LLVM_VERSION_MAJOR >= 21
+  if (Kind == NoCapture)
+    return Attribute::getWithCaptureInfo(Ctx, CaptureInfo::none());
+#endif
+  return Attribute::get(Ctx, fromRust(Kind));
+}
+
 extern "C" void LLVMRustAddCallSiteAttribute(LLVMValueRef Instr, unsigned Index,
                                              LLVMRustAttribute RustAttr)
 {
@@ -314,11 +333,11 @@ extern "C" void LLVMRustAddCallSiteAttribute(LLVMValueRef Instr, unsigned Index,
   CallBase *Call = unwrap<CallBase>(Instr);
   LLVMContext &Ctx = Call->getContext();
   AttrBuilder B(Ctx);
-  B.addAttribute(Attribute::get(Ctx, fromRust(RustAttr)));
+  B.addAttribute(rustAttribute(Ctx, RustAttr));
   Call->setAttributes(Call->getAttributes().addAttributesAtIndex(Ctx, Index, B));
 #else
   CallSite Call = CallSite(unwrap<Instruction>(Instr));
-  Attribute Attr = Attribute::get(Call->getContext(), fromRust(RustAttr));
+  Attribute Attr = rustAttribute(Call->getContext(), RustAttr);
 #if LLVM_VERSION_GE(5, 0)
   Call.addAttribute(Index, Attr);
 #else
@@ -412,11 +431,11 @@ extern "C" void LLVMRustAddFunctionAttribute(LLVMValueRef Fn, unsigned Index,
   Function *A = unwrap<Function>(Fn);
   LLVMContext &Ctx = A->getContext();
   AttrBuilder B(Ctx);
-  B.addAttribute(Attribute::get(Ctx, fromRust(RustAttr)));
+  B.addAttribute(rustAttribute(Ctx, RustAttr));
   A->setAttributes(A->getAttributes().addAttributesAtIndex(Ctx, Index, B));
 #else
   Function *A = unwrap<Function>(Fn);
-  Attribute Attr = Attribute::get(A->getContext(), fromRust(RustAttr));
+  Attribute Attr = rustAttribute(A->getContext(), RustAttr);
   AttrBuilder B(Attr);
 #if LLVM_VERSION_GE(5, 0)
   A->addAttributes(Index, B);
@@ -439,16 +458,16 @@ extern "C" void LLVMRustAddFunctionAttributeWithType(LLVMValueRef Fn, unsigned I
   } else if (RustAttr == ByVal) {
     B.addByValAttr(unwrap(Ty));
   } else {
-    B.addAttribute(Attribute::get(Ctx, fromRust(RustAttr)));
+    B.addAttribute(rustAttribute(Ctx, RustAttr));
   }
   A->setAttributes(A->getAttributes().addAttributesAtIndex(Ctx, Index, B));
 #else
   // LLVM 7's StructRet/ByVal are plain attribute kinds with no type payload,
-  // so the Ty argument is only meaningful on the LLVM 19 path above. Fall through
+  // so the Ty argument is only meaningful on the LLVM 21 path above. Fall through
   // to the kind-only add on legacy LLVM.
   (void)Ty;
   Function *A = unwrap<Function>(Fn);
-  Attribute Attr = Attribute::get(A->getContext(), fromRust(RustAttr));
+  Attribute Attr = rustAttribute(A->getContext(), RustAttr);
   AttrBuilder B(Attr);
 #if LLVM_VERSION_GE(5, 0)
   A->addAttributes(Index, B);
@@ -557,7 +576,7 @@ extern "C" void LLVMRustRemoveFunctionAttributes(LLVMValueRef Fn,
   F->setAttributes(PALNew);
 #else
   Function *F = unwrap<Function>(Fn);
-  Attribute Attr = Attribute::get(F->getContext(), fromRust(RustAttr));
+  Attribute Attr = rustAttribute(F->getContext(), RustAttr);
   AttrBuilder B(Attr);
   auto PAL = F->getAttributes();
 #if LLVM_VERSION_GE(5, 0)
@@ -588,7 +607,7 @@ LLVMRustBuildAtomicLoad(LLVMBuilderRef B, LLVMValueRef Source, const char *Name,
                         LLVMAtomicOrdering Order)
 {
 #if LLVM_VERSION_MAJOR >= 19
-  report_fatal_error("LLVMRustBuildAtomicLoad requires a type-aware LLVM 19 wrapper");
+  report_fatal_error("LLVMRustBuildAtomicLoad requires a type-aware LLVM 21 wrapper");
 #else
   LoadInst *LI = new LoadInst(unwrap(Source), 0);
   LI->setAtomic(fromRust(Order));
@@ -1643,8 +1662,10 @@ extern "C" LLVMTypeKind LLVMRustGetTypeKind(LLVMTypeRef Ty)
   case Type::VectorTyID:
     return LLVMVectorTypeKind;
 #endif
+#if LLVM_VERSION_MAJOR < 21
   case Type::X86_MMXTyID:
     return LLVMX86_MMXTypeKind;
+#endif
   case Type::TokenTyID:
     return LLVMTokenTypeKind;
   }
@@ -1743,7 +1764,7 @@ static FunctionType *LLVMRustGetFunctionTypeForCallee(Value *Callee)
   if (Function *Fn = dyn_cast<Function>(Callee->stripPointerCasts()))
     return Fn->getFunctionType();
 
-  report_fatal_error("LLVMRustBuildCall requires an explicit callee type on LLVM 19");
+  report_fatal_error("LLVMRustBuildCall requires an explicit callee type on LLVM 21");
 }
 #endif
 
@@ -2030,7 +2051,7 @@ extern "C" LLVMRustModuleBuffer *
 LLVMRustModuleBufferCreate(LLVMModuleRef M)
 {
   // Longhand form avoids std::make_unique (C++14) so this compiles under
-  // LLVM 7's `-std=c++11` llvm-config cxxflags as well as LLVM 19's C++17.
+  // LLVM 7's `-std=c++11` llvm-config cxxflags as well as LLVM 21's C++17.
   auto Ret = std::unique_ptr<LLVMRustModuleBuffer>(new LLVMRustModuleBuffer());
   {
     raw_string_ostream OS(Ret->data);
@@ -2263,3 +2284,36 @@ extern "C" LLVMValueRef LLVMBuildInBoundsGEP2(LLVMBuilderRef B, LLVMTypeRef Ty,
 }
 
 #endif
+
+// LLVM 21 upgrades NVVM kernel metadata to PTX_Kernel while reading bitcode.
+// Keep the legacy annotations used by internalization and the NVVM handoff.
+extern "C" void LLVMRustRestoreNvvmKernelAnnotations(LLVMModuleRef Mod) {
+#if LLVM_VERSION_MAJOR >= 21
+  Module &M = *unwrap(Mod);
+  auto *Annotations = M.getOrInsertNamedMetadata("nvvm.annotations");
+  for (Function &F : M) {
+    if (F.getCallingConv() != CallingConv::PTX_Kernel)
+      continue;
+    bool Found = false;
+    for (MDNode *Node : Annotations->operands()) {
+      if (Node->getNumOperands() < 2)
+        continue;
+      auto *Value = dyn_cast_or_null<ValueAsMetadata>(Node->getOperand(0));
+      auto *Kind = dyn_cast_or_null<MDString>(Node->getOperand(1));
+      if (Value && Value->getValue() == &F && Kind && Kind->getString() == "kernel") {
+        Found = true;
+        break;
+      }
+    }
+    if (!Found) {
+      Metadata *Fields[] = {ValueAsMetadata::get(&F),
+                            MDString::get(M.getContext(), "kernel"),
+                            ConstantAsMetadata::get(ConstantInt::get(
+                                Type::getInt32Ty(M.getContext()), 1))};
+      Annotations->addOperand(MDNode::get(M.getContext(), Fields));
+    }
+  }
+#else
+  (void)Mod;
+#endif
+}
diff --git a/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/rustllvm.h b/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/rustllvm.h
index 653c7818..cefd53a7 100644
--- a/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/rustllvm.h
+++ b/crates/rustc_codegen_nvvm/rustc_llvm_wrapper/rustllvm.h
@@ -49,7 +49,11 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Transforms/IPO.h"
+// Only the legacy pass registry uses the instrumentation umbrella header.
+// LLVM 21 removed it; modern pipelines use PassBuilder instead.
+#if LLVM_VERSION_MAJOR < 19
 #include "llvm/Transforms/Instrumentation.h"
+#endif
 #include "llvm/Transforms/Scalar.h"
 #if LLVM_VERSION_MAJOR < 19
 #include "llvm/Transforms/Vectorize.h"
diff --git a/crates/rustc_codegen_nvvm/src/abi.rs b/crates/rustc_codegen_nvvm/src/abi.rs
index b24cc543..5fb9a6f1 100644
--- a/crates/rustc_codegen_nvvm/src/abi.rs
+++ b/crates/rustc_codegen_nvvm/src/abi.rs
@@ -443,13 +443,13 @@ impl<'ll, 'tcx> FnAbiLlvmExt<'ll, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
             } => {
                 assert!(!on_stack);
                 let i = apply(attrs);
-                #[cfg(feature = "llvm19")]
+                #[cfg(feature = "llvm21")]
                 llvm::Attribute::StructRet.apply_llfn_with_type(
                     llvm::AttributePlace::Argument(i),
                     llfn,
                     self.ret.memory_ty(cx),
                 );
-                #[cfg(not(feature = "llvm19"))]
+                #[cfg(not(feature = "llvm21"))]
                 llvm::Attribute::StructRet.apply_llfn(llvm::AttributePlace::Argument(i), llfn);
             }
             _ => {}
diff --git a/crates/rustc_codegen_nvvm/src/back.rs b/crates/rustc_codegen_nvvm/src/back.rs
index 23548063..761f22a8 100644
--- a/crates/rustc_codegen_nvvm/src/back.rs
+++ b/crates/rustc_codegen_nvvm/src/back.rs
@@ -214,7 +214,7 @@ pub(crate) unsafe fn codegen(
     let _bc_timer =
         prof.generic_activity_with_arg("NVVM_module_codegen_make_bitcode", &module.name[..]);
 
-    #[cfg(feature = "llvm19")]
+    #[cfg(feature = "llvm21")]
     if let Err(err) = llvm::verify_module(llmod) {
         return Err(dcx.fatal(format!(
             "LLVM module verification failed for {module_name}: {err}"
@@ -252,6 +252,7 @@ pub(crate) unsafe fn codegen(
 /// codegen on all the modules at once) and then link it (once again, nvvm does linking and codegen
 /// in a single step)
 pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol) -> (ModuleCodegen<LlvmMod>, u64) {
+    let _timing = crate::timing::phase("codegen_unit", cgu_name.as_str());
     let dep_node = tcx.codegen_unit(cgu_name).codegen_dep_node(tcx);
     let (module, _) = tcx.dep_graph.with_task(
         dep_node,
@@ -328,6 +329,47 @@ pub fn compile_codegen_unit(tcx: TyCtxt<'_>, cgu_name: Symbol) -> (ModuleCodegen
             }
         }
 
+        // Run only after definitions, used globals and debug metadata are
+        // finalized. Scalar cleanup preserves cross-module linkage; no DCE or
+        // inlining is performed here. Merged-module cleanup remains independent.
+        let args = crate::context::CodegenArgs::from_session(tcx.sess);
+        if args.llvm19_module_cleanup {
+            let llmod = unsafe { &*llvm_module.llmod };
+            let dump = |stage: &str| {
+                if let Some(final_path) = &args.final_module_path {
+                    let directory = final_path.parent().unwrap().join("per-module");
+                    std::fs::create_dir_all(&directory).unwrap_or_else(|error| {
+                        tcx.sess
+                            .dcx()
+                            .fatal(format!("cannot create module IR directory: {error}"))
+                    });
+                    let path = directory.join(format!("{cgu_name}.{stage}.ll"));
+                    let path = path.to_str().unwrap();
+                    unsafe {
+                        llvm::LLVMRustPrintModule(
+                            llmod,
+                            path.as_c_char_ptr(),
+                            path.len(),
+                            demangle_callback,
+                        )
+                        .into_result()
+                        .unwrap_or_else(|_| {
+                            llvm_err(tcx.sess.dcx(), "cannot save per-module IR").raise();
+                        });
+                    }
+                }
+            };
+            dump("before");
+            unsafe {
+                llvm::LLVMRustRunNvvmCleanup(llmod, llvm::NvvmCleanup::Scalar)
+                    .into_result()
+                    .unwrap_or_else(|_| {
+                        llvm_err(tcx.sess.dcx(), "LLVM 19 per-module cleanup failed").raise();
+                    });
+            }
+            dump("after");
+        }
+
         ModuleCodegen::new_regular(cgu_name.to_string(), llvm_module)
     }
 
@@ -349,6 +391,7 @@ pub(crate) unsafe fn optimize(
     let dcx = DiagCtxt::new(Box::new(shared_emitter.clone()));
     let diag_handler = dcx.handle();
     let _timer = prof.generic_activity_with_arg("LLVM_module_optimize", &module.name[..]);
+    let _timing = crate::timing::phase("llvm_module_optimize", &module.name);
 
     let llmod = unsafe { &*module.module_llvm.llmod };
 
diff --git a/crates/rustc_codegen_nvvm/src/builder.rs b/crates/rustc_codegen_nvvm/src/builder.rs
index b864e0ab..1c60195d 100644
--- a/crates/rustc_codegen_nvvm/src/builder.rs
+++ b/crates/rustc_codegen_nvvm/src/builder.rs
@@ -231,7 +231,7 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
                 v = transmute_llval(self.llbuilder, self.cx, v, new_ty);
             }
 
-            #[cfg(not(feature = "llvm19"))]
+            #[cfg(not(feature = "llvm21"))]
             {
                 // Get the return type.
                 let sig = llvm::LLVMGetElementType(self.val_ty(self.llfn()));
@@ -511,9 +511,9 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
         trace!("Load {ty:?} {:?}", ptr);
         let ptr = self.pointercast(ptr, self.cx.type_ptr_to(ty));
         unsafe {
-            #[cfg(feature = "llvm19")]
+            #[cfg(feature = "llvm21")]
             let load = llvm::LLVMBuildLoad2(self.llbuilder, ty, ptr, UNNAMED);
-            #[cfg(not(feature = "llvm19"))]
+            #[cfg(not(feature = "llvm21"))]
             let load = llvm::LLVMBuildLoad(self.llbuilder, ptr, UNNAMED);
             llvm::LLVMSetAlignment(load, align.bytes() as c_uint);
             load
@@ -524,9 +524,9 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
         trace!("Volatile load `{:?}`", ptr);
         let ptr = self.pointercast(ptr, self.cx.type_ptr_to(ty));
         unsafe {
-            #[cfg(feature = "llvm19")]
+            #[cfg(feature = "llvm21")]
             let load = llvm::LLVMBuildLoad2(self.llbuilder, ty, ptr, UNNAMED);
-            #[cfg(not(feature = "llvm19"))]
+            #[cfg(not(feature = "llvm21"))]
             let load = llvm::LLVMBuildLoad(self.llbuilder, ptr, UNNAMED);
             llvm::LLVMSetVolatile(load, llvm::True);
             load
@@ -1230,11 +1230,11 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
                 // Local space is only accessible to the current thread.
                 // So, there are no synchronization issues, and we can emulate it using a simple load / compare / store.
                 let load: &'ll Value = unsafe {
-                    #[cfg(feature = "llvm19")]
+                    #[cfg(feature = "llvm21")]
                     {
                         llvm::LLVMBuildLoad2(builder.llbuilder, builder.val_ty(cmp), dst, UNNAMED)
                     }
-                    #[cfg(not(feature = "llvm19"))]
+                    #[cfg(not(feature = "llvm21"))]
                     {
                         llvm::LLVMBuildLoad(builder.llbuilder, dst, UNNAMED)
                     }
@@ -1290,11 +1290,11 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
                 // Local space is only accessible to the current thread. So, there are no
                 // synchronization issues, and we can emulate it using a simple load/compare/store.
                 let load: &'ll Value = unsafe {
-                    #[cfg(feature = "llvm19")]
+                    #[cfg(feature = "llvm21")]
                     {
                         llvm::LLVMBuildLoad2(builder.llbuilder, builder.val_ty(src), dst, UNNAMED)
                     }
-                    #[cfg(not(feature = "llvm19"))]
+                    #[cfg(not(feature = "llvm21"))]
                     {
                         llvm::LLVMBuildLoad(builder.llbuilder, dst, UNNAMED)
                     }
@@ -1362,16 +1362,16 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
     }
 
     fn lifetime_start(&mut self, ptr: &'ll Value, size: Size) {
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         self.call_lifetime_intrinsic("llvm.lifetime.start.p0", ptr, size);
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         self.call_lifetime_intrinsic("llvm.lifetime.start.p0i8", ptr, size);
     }
 
     fn lifetime_end(&mut self, ptr: &'ll Value, size: Size) {
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         self.call_lifetime_intrinsic("llvm.lifetime.end.p0", ptr, size);
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         self.call_lifetime_intrinsic("llvm.lifetime.end.p0i8", ptr, size);
     }
 
@@ -1389,9 +1389,9 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
         self.cx.last_call_llfn.set(None);
         let args = self.check_call("call", llty, llfn, args);
 
-        // On LLVM 7 we must ensure the callee has a pointer-to-FnTy type; LLVM 19's
+        // On LLVM 7 we must ensure the callee has a pointer-to-FnTy type; LLVM 21's
         // opaque pointers make this a no-op, so skip the cast on that path entirely.
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         let llfn = unsafe {
             let llfn_ptr_ty = llvm::LLVMPointerType(llty, 0);
             if self.val_ty(llfn) == llfn_ptr_ty {
@@ -1417,11 +1417,11 @@ impl<'ll, 'tcx, 'a> BuilderMethods<'a, 'tcx> for Builder<'a, 'll, 'tcx> {
 
         // bitcast return type if the type was remapped
         let map = self.cx.remapped_integer_args.borrow();
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         let fn_ty = llty;
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         let mut fn_ty = self.val_ty(llfn);
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         while self.cx.type_kind(fn_ty) == TypeKind::Pointer {
             fn_ty = self.cx.element_type(fn_ty);
         }
diff --git a/crates/rustc_codegen_nvvm/src/consts.rs b/crates/rustc_codegen_nvvm/src/consts.rs
index b21a3b88..b8a6c834 100644
--- a/crates/rustc_codegen_nvvm/src/consts.rs
+++ b/crates/rustc_codegen_nvvm/src/consts.rs
@@ -354,13 +354,13 @@ impl<'ll> StaticCodegenMethods for CodegenCx<'ll, '_> {
             let mut val_llty = self.val_ty(v);
             let v = if val_llty == self.type_i1() {
                 val_llty = self.type_i8();
-                #[cfg(feature = "llvm19")]
+                #[cfg(feature = "llvm21")]
                 {
                     let const_int = v as *const llvm::Value as *const llvm::ConstantInt;
                     let const_val = llvm::LLVMConstIntGetZExtValue(&*const_int);
                     llvm::LLVMConstInt(val_llty, const_val, 0)
                 }
-                #[cfg(not(feature = "llvm19"))]
+                #[cfg(not(feature = "llvm21"))]
                 {
                     llvm::LLVMConstZExt(v, val_llty)
                 }
diff --git a/crates/rustc_codegen_nvvm/src/context.rs b/crates/rustc_codegen_nvvm/src/context.rs
index 4087f7a7..9d5d9628 100644
--- a/crates/rustc_codegen_nvvm/src/context.rs
+++ b/crates/rustc_codegen_nvvm/src/context.rs
@@ -651,6 +651,10 @@ pub struct CodegenArgs {
     pub override_libm: bool,
     pub use_constant_memory_space: bool,
     pub final_module_path: Option<PathBuf>,
+    // None leaves the existing NVVM handoff unchanged.
+    pub llvm19_cleanup: Option<crate::llvm::NvvmCleanup>,
+    pub llvm19_module_cleanup: bool,
+    pub disable_llvm19_global_dce: bool,
     pub disassemble: Option<DisassembleMode>,
 }
 
@@ -675,6 +679,32 @@ impl CodegenArgs {
                 cg_args.override_libm = true;
             } else if arg == "--use-constant-memory-space" {
                 cg_args.use_constant_memory_space = true;
+            } else if arg == "--disable-llvm19-global-dce" {
+                if !cfg!(feature = "llvm21") {
+                    sess.dcx()
+                        .fatal("--disable-llvm19-global-dce requires the llvm21 backend feature");
+                }
+                cg_args.disable_llvm19_global_dce = true;
+            } else if arg == "--llvm19-module-cleanup" {
+                if !cfg!(feature = "llvm21") {
+                    sess.dcx()
+                        .fatal("--llvm19-module-cleanup requires the llvm21 backend feature");
+                }
+                cg_args.llvm19_module_cleanup = true;
+            } else if let Some(mode) = arg.strip_prefix("--llvm19-cleanup=") {
+                if !cfg!(feature = "llvm21") {
+                    sess.dcx()
+                        .fatal("--llvm19-cleanup requires the llvm21 backend feature");
+                }
+                cg_args.llvm19_cleanup = Some(match mode {
+                    "scalar" => crate::llvm::NvvmCleanup::Scalar,
+                    "inline" => crate::llvm::NvvmCleanup::Inline,
+                    "dce" => crate::llvm::NvvmCleanup::GlobalDce,
+                    "inline-scalar" => crate::llvm::NvvmCleanup::InlineScalar,
+                    _ => sess
+                        .dcx()
+                        .fatal("--llvm19-cleanup expects scalar, inline, inline-scalar, or dce"),
+                });
             } else if arg == "--final-module-path" {
                 let path = match args.get(idx + 1) {
                     Some(p) => p,
diff --git a/crates/rustc_codegen_nvvm/src/ctx_intrinsics.rs b/crates/rustc_codegen_nvvm/src/ctx_intrinsics.rs
index 3da09599..5af07124 100644
--- a/crates/rustc_codegen_nvvm/src/ctx_intrinsics.rs
+++ b/crates/rustc_codegen_nvvm/src/ctx_intrinsics.rs
@@ -137,13 +137,13 @@ impl<'ll> CodegenCx<'ll, '_> {
         ifn!(map, "llvm.cttz.i32", fn(t_i32, i1) -> t_i32);
         ifn!(map, "llvm.cttz.i64", fn(t_i64, i1) -> t_i64);
 
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         ifn!(map, "llvm.lifetime.start.p0", fn(t_i64, i8p) -> void);
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         ifn!(map, "llvm.lifetime.start.p0i8", fn(t_i64, i8p) -> void);
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         ifn!(map, "llvm.lifetime.end.p0", fn(t_i64, i8p) -> void);
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         ifn!(map, "llvm.lifetime.end.p0i8", fn(t_i64, i8p) -> void);
 
         ifn!(map, "llvm.expect.i1", fn(i1, i1) -> i1);
diff --git a/crates/rustc_codegen_nvvm/src/init.rs b/crates/rustc_codegen_nvvm/src/init.rs
index 60fef46f..5db1ec4a 100644
--- a/crates/rustc_codegen_nvvm/src/init.rs
+++ b/crates/rustc_codegen_nvvm/src/init.rs
@@ -105,8 +105,8 @@ unsafe fn configure_llvm(sess: &Session) {
         );
 
         // This tuning flag isn't guaranteed to be registered in the dylib-loaded
-        // LLVM19 backend configuration, and it is not required for correctness.
-        #[cfg(not(feature = "llvm19"))]
+        // LLVM21 backend configuration, and it is not required for correctness.
+        #[cfg(not(feature = "llvm21"))]
         add("-import-cold-multiplier=0.1", false);
 
         // for arg in sess_args {
diff --git a/crates/rustc_codegen_nvvm/src/lib.rs b/crates/rustc_codegen_nvvm/src/lib.rs
index 61fe4894..2a620b9f 100644
--- a/crates/rustc_codegen_nvvm/src/lib.rs
+++ b/crates/rustc_codegen_nvvm/src/lib.rs
@@ -46,6 +46,7 @@ mod llvm;
 mod lto;
 mod mono_item;
 mod nvvm;
+use ::nvvm::timing;
 mod override_fns;
 mod ptx_filter;
 mod target;
@@ -108,6 +109,7 @@ impl CodegenBackend for NvvmCodegenBackend {
     }
 
     fn init(&self, sess: &Session) {
+        let _timing = timing::phase("backend_init", "");
         let filter = tracing_subscriber::EnvFilter::from_env("NVVM_LOG");
         let subscriber = tracing_subscriber::fmt()
             .with_env_filter(filter)
@@ -177,6 +179,7 @@ impl CodegenBackend for NvvmCodegenBackend {
     }
 
     fn codegen_crate(&self, tcx: TyCtxt<'_>, crate_info: &CrateInfo) -> Box<dyn std::any::Any> {
+        let _timing = timing::phase("codegen_crate", "");
         debug!("Codegen crate");
         Box::new(rustc_codegen_ssa::base::codegen_crate(
             Self, tcx, crate_info,
@@ -190,6 +193,7 @@ impl CodegenBackend for NvvmCodegenBackend {
         _outputs: &OutputFilenames,
     ) -> (CompiledModules, FxIndexMap<WorkProductId, WorkProduct>) {
         debug!("Join codegen");
+        let _timing = timing::phase("join_codegen", "");
         let (compiled_modules, work_products) = ongoing_codegen
             .downcast::<OngoingCodegen<Self>>()
             .expect("Expected OngoingCodegen, found Box<Any>")
@@ -206,6 +210,7 @@ impl CodegenBackend for NvvmCodegenBackend {
         metadata: rustc_metadata::EncodedMetadata,
         outputs: &config::OutputFilenames,
     ) {
+        let _timing = timing::phase("link", "");
         link::link(sess, compiled_modules, crate_info, metadata, outputs);
     }
 
diff --git a/crates/rustc_codegen_nvvm/src/llvm.rs b/crates/rustc_codegen_nvvm/src/llvm.rs
index 9f315cc3..5160079f 100644
--- a/crates/rustc_codegen_nvvm/src/llvm.rs
+++ b/crates/rustc_codegen_nvvm/src/llvm.rs
@@ -28,6 +28,16 @@ use std::ptr::{self};
 use crate::{builder::unnamed, common::AsCCharPtr};
 pub use debuginfo::*;
 
+// Keep discriminants in sync with LLVMRustNvvmCleanup in PassWrapper.cpp.
+#[repr(u32)]
+#[derive(Clone, Copy)]
+pub enum NvvmCleanup {
+    Scalar = 0,
+    Inline = 1,
+    GlobalDce = 2,
+    InlineScalar = 3,
+}
+
 impl PartialEq for Value {
     fn eq(&self, other: &Self) -> bool {
         ptr::eq(self, other)
@@ -97,7 +107,7 @@ impl Attribute {
         unsafe { LLVMRustAddFunctionAttribute(llfn, idx.as_uint(), *self) }
     }
 
-    #[cfg(feature = "llvm19")]
+    #[cfg(feature = "llvm21")]
     pub fn apply_llfn_with_type(&self, idx: AttributePlace, llfn: &Value, ty: &Type) {
         unsafe { LLVMRustAddFunctionAttributeWithType(llfn, idx.as_uint(), *self, ty) }
     }
@@ -1331,6 +1341,7 @@ unsafe extern "C" {
     ) -> Option<&'a DILocation>;
 
     pub(crate) fn LLVMRustRunFunctionPassManager(PM: &PassManager, M: &Module);
+    pub(crate) fn LLVMRustRunNvvmCleanup(M: &Module, mode: NvvmCleanup) -> LLVMRustResult;
     pub(crate) fn LLVMRustAddAlwaysInlinePass(P: &PassManagerBuilder, AddLifetimes: bool);
 
     pub(crate) fn LLVMRustAddBuilderLibraryInfo(
@@ -1500,7 +1511,7 @@ unsafe extern "C" {
 
     // Operations on array, pointer, and vector types (sequence types)
     pub(crate) fn LLVMRustArrayType(ElementType: &Type, ElementCount: u64) -> &Type;
-    #[cfg(feature = "llvm19")]
+    #[cfg(feature = "llvm21")]
     pub(crate) fn LLVMPointerTypeInContext(C: &Context, AddressSpace: c_uint) -> &Type;
     pub(crate) fn LLVMPointerType(ElementType: &Type, AddressSpace: c_uint) -> &Type;
     pub(crate) fn LLVMVectorType(ElementType: &Type, ElementCount: c_uint) -> &Type;
@@ -1629,7 +1640,7 @@ unsafe extern "C" {
     pub(crate) fn LLVMSetFunctionCallConv(Fn: &Value, CC: c_uint);
     pub(crate) fn LLVMRustAddAlignmentAttr(Fn: &Value, index: c_uint, bytes: u32);
     pub(crate) fn LLVMRustAddFunctionAttribute(Fn: &Value, index: c_uint, attr: Attribute);
-    #[cfg(feature = "llvm19")]
+    #[cfg(feature = "llvm21")]
     pub(crate) fn LLVMRustAddFunctionAttributeWithType(
         Fn: &Value,
         index: c_uint,
@@ -1894,7 +1905,7 @@ unsafe extern "C" {
         Val: &'a Value,
         Name: *const c_char,
     ) -> &'a Value;
-    #[cfg(feature = "llvm19")]
+    #[cfg(feature = "llvm21")]
     pub(crate) fn LLVMBuildLoad2<'a>(
         B: &Builder<'a>,
         Ty: &'a Type,
@@ -2216,6 +2227,8 @@ unsafe extern "C" {
     pub(crate) fn LLVMRustPrepareThinLTOResolveWeak(Data: &ThinLTOData, Module: &Module) -> bool;
     pub(crate) fn LLVMRustPrepareThinLTOInternalize(Data: &ThinLTOData, Module: &Module) -> bool;
     pub(crate) fn LLVMRustFreeThinLTOData(Data: &'static mut ThinLTOData);
+    pub(crate) fn LLVMRustRestoreNvvmKernelAnnotations(M: &Module);
+
     pub(crate) fn LLVMRustParseBitcodeForLTO(
         Context: &Context,
         Data: *const u8,
diff --git a/crates/rustc_codegen_nvvm/src/nvvm.rs b/crates/rustc_codegen_nvvm/src/nvvm.rs
index fafb4afb..888560a9 100644
--- a/crates/rustc_codegen_nvvm/src/nvvm.rs
+++ b/crates/rustc_codegen_nvvm/src/nvvm.rs
@@ -43,9 +43,9 @@ impl Display for CodegenErr {
     }
 }
 
-#[cfg(feature = "llvm19")]
+#[cfg(feature = "llvm21")]
 fn is_known_nvvm_verify_false_negative(log: &str) -> bool {
-    log.contains("Producer: 'LLVM19")
+    log.contains("Producer: 'LLVM21")
         && log.contains("Reader: 'LLVM 7.0.1'")
         && log.contains("parse Invalid value")
 }
@@ -72,6 +72,7 @@ pub fn codegen_bitcode_modules(
     modules: Vec<Vec<u8>>,
     llcx: &Context,
 ) -> Result<Vec<u8>, CodegenErr> {
+    let _total = crate::timing::phase("bitcode_to_ptx", "");
     debug!("Codegenning bitcode to PTX");
     let target_arch = selected_arch(args);
     debug!(
@@ -91,10 +92,20 @@ pub fn codegen_bitcode_modules(
     // First, create the nvvm program we will add modules to.
     let prog = NvvmProgram::new()?;
 
-    let module = merge_llvm_modules(modules, llcx);
+    let module = {
+        let _timing = crate::timing::phase("merge_modules", "");
+        merge_llvm_modules(modules, llcx)
+    };
     unsafe {
+        let internalize_timing = crate::timing::phase("internalize", "");
+        LLVMRustRestoreNvvmKernelAnnotations(module);
         internalize_pass(module, llcx);
-        dce_pass(module);
+        drop(internalize_timing);
+        #[cfg(not(feature = "llvm21"))]
+        {
+            let _timing = crate::timing::phase("legacy_dce", "");
+            dce_pass(module);
+        }
 
         if sess.opts.debuginfo != DebugInfo::None {
             cleanup_dicompileunit(module);
@@ -114,7 +125,43 @@ pub fn codegen_bitcode_modules(
 
         LLVMAddNamedMetadataOperand(module, c"nvvmir.version".as_ptr().cast(), node);
 
+        // Inline pipelines already contain GlobalDCE; avoid running it twice.
+        // Keep the default pass at the verified handoff, after debug/IR metadata
+        // is finalized, exactly where the opt-in implementation was validated.
+        let run_default_dce = cfg!(feature = "llvm21")
+            && !args.disable_llvm19_global_dce
+            && matches!(args.llvm19_cleanup, None | Some(NvvmCleanup::Scalar));
+        if run_default_dce || args.llvm19_cleanup.is_some() {
+            if let Some(path) = &args.final_module_path {
+                let _timing = crate::timing::phase("write_pre_cleanup_ir", "");
+                let before = path.with_extension("before-cleanup.ll");
+                let before = before.to_str().unwrap();
+                LLVMRustPrintModule(
+                    module,
+                    before.as_c_char_ptr(),
+                    before.len(),
+                    demangle_callback,
+                )
+                .into_result()
+                .expect("failed to write pre-cleanup LLVM IR");
+            }
+            let modes = run_default_dce
+                .then_some(NvvmCleanup::GlobalDce)
+                .into_iter()
+                .chain(args.llvm19_cleanup);
+            for mode in modes {
+                let _timing = crate::timing::phase("llvm_cleanup", "");
+                if LLVMRustRunNvvmCleanup(module, mode).into_result().is_err() {
+                    sess.dcx().fatal(format!(
+                        "LLVM 19 cleanup failed: {}",
+                        crate::llvm::last_error().unwrap_or_else(|| "unknown LLVM error".into())
+                    ));
+                }
+            }
+        }
+
         if let Some(path) = &args.final_module_path {
+            let _timing = crate::timing::phase("write_final_ir", "");
             let out = path.to_str().unwrap();
             let result =
                 LLVMRustPrintModule(module, out.as_c_char_ptr(), out.len(), demangle_callback);
@@ -124,11 +171,16 @@ pub fn codegen_bitcode_modules(
         }
     }
 
-    let buf = ModuleBuffer::new(module, false);
+    let buf = {
+        let _timing = crate::timing::phase("serialize_bitcode", "");
+        ModuleBuffer::new(module, false)
+    };
 
+    let add_timing = crate::timing::phase("nvvm_add_modules", "");
     prog.add_module(buf.data(), "merged".to_string())?;
     prog.add_lazy_module(LIBDEVICE_BITCODE, "libdevice".to_string())?;
     prog.add_lazy_module(LIBINTRINSICS, "libintrinsics".to_string())?;
+    drop(add_timing);
 
     // for now, while the codegen is young, we always run verification on the program.
     // This is to make debugging much easier, libnvvm tends to infinitely loop or segfault on invalid programs
@@ -136,21 +188,23 @@ pub fn codegen_bitcode_modules(
     // giving it to libnvvm. Then to debug codegen failures, we can just ask the user to provide the corresponding llvm ir
     // file with --emit=llvm-ir
 
-    // On the llvm19 path, pass the same options we'll hand to `compile` so the verifier uses
+    // On the llvm21 path, pass the same options we'll hand to `compile` so the verifier uses
     // the same arch-specific parser. Without this libnvvm can default to the legacy LLVM 7
-    // reader and reject LLVM 19 dialect bitcode that would otherwise compile fine (see
+    // reader and reject LLVM 21 dialect bitcode that would otherwise compile fine (see
     // `is_known_nvvm_verify_false_negative` for the resulting log signature). On the LLVM 7
-    // path we keep the original option-less verify to avoid drift from the pre-llvm19 baseline.
-    #[cfg(feature = "llvm19")]
+    // path we keep the original option-less verify to avoid drift from the pre-llvm21 baseline.
+    let verify_timing = crate::timing::phase("nvvm_verify", "");
+    #[cfg(feature = "llvm21")]
     let verification_res = prog.verify_with_options(&args.nvvm_options);
-    #[cfg(not(feature = "llvm19"))]
+    #[cfg(not(feature = "llvm21"))]
     let verification_res = prog.verify();
+    drop(verify_timing);
     if verification_res.is_err() {
         let log = prog.compiler_log().unwrap().unwrap_or_default();
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         if target_arch.uses_modern_ir_dialect() && is_known_nvvm_verify_false_negative(&log) {
             sess.dcx().warn(
-                "libnvvm verification rejected LLVM 19 bitcode with the known legacy-reader message; proceeding to compilation anyway on the llvm19 path"
+                "libnvvm verification rejected LLVM 21 bitcode with the known legacy-reader message; proceeding to compilation anyway on the llvm21 path"
             );
         } else {
             let footer = "If you plan to submit a bug report please re-run the codegen with `RUSTFLAGS=\"--emit=llvm-ir\" and include the .ll file corresponding to the .o file mentioned in the log";
@@ -158,7 +212,7 @@ pub fn codegen_bitcode_modules(
                 "Malformed NVVM IR program rejected by libnvvm, dumping verifier log:\n\n{log}\n\n{footer}"
             );
         }
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         {
             let footer = "If you plan to submit a bug report please re-run the codegen with `RUSTFLAGS=\"--emit=llvm-ir\" and include the .ll file corresponding to the .o file mentioned in the log";
             panic!(
@@ -167,6 +221,7 @@ pub fn codegen_bitcode_modules(
         }
     }
 
+    let _compile_timing = crate::timing::phase("nvvm_compile", "");
     let res = match prog.compile(&args.nvvm_options) {
         Ok(b) => b,
         Err(error) => {
@@ -340,29 +395,22 @@ unsafe fn internalize_pass(module: &Module, cx: &Context) {
         }
 
         let iter = GlobalIter::new(&module);
-        for func in iter {
-            let is_decl = LLVMIsDeclaration(func) == True;
-
-            if !is_decl {
-                LLVMRustSetLinkage(func, Linkage::InternalLinkage);
-                LLVMRustSetVisibility(func, Visibility::Default);
+        for global in iter {
+            let is_decl = LLVMIsDeclaration(global) == True;
+            // llvm.used, llvm.compiler.used and other appending globals have
+            // special linker/optimizer semantics. Internalizing them produces
+            // invalid LLVM IR and prevents verified pre-NVVM optimization.
+            let is_appending = LLVMRustGetLinkage(global) == Linkage::AppendingLinkage;
+            if !is_decl && !is_appending {
+                LLVMRustSetLinkage(global, Linkage::InternalLinkage);
+                LLVMRustSetVisibility(global, Visibility::Default);
             }
         }
     }
 }
 
+#[cfg(not(feature = "llvm21"))]
 unsafe fn dce_pass(module: &Module) {
-    #[cfg(feature = "llvm19")]
-    {
-        // The legacy C API entrypoint used below (`LLVMAddGlobalDCEPass`) is not
-        // available on our current LLVM 19 runtime path. Keep the backend loadable
-        // by skipping this cleanup for now; revisit if LLVM 19 smoke tests show we
-        // need an explicit replacement pass.
-        let _ = module;
-        return;
-    }
-
-    #[cfg(not(feature = "llvm19"))]
     unsafe {
         let pass_manager = LLVMCreatePassManager();
 
diff --git a/crates/rustc_codegen_nvvm/src/override_fns.rs b/crates/rustc_codegen_nvvm/src/override_fns.rs
index 8534d790..38c405fb 100644
--- a/crates/rustc_codegen_nvvm/src/override_fns.rs
+++ b/crates/rustc_codegen_nvvm/src/override_fns.rs
@@ -44,7 +44,12 @@ fn should_override<'tcx>(func: Instance<'tcx>, cx: &CodegenCx<'_, 'tcx>) -> bool
         return false;
     }
 
-    let sym = cx.tcx.item_name(func.def_id());
+    // Closures can remain as separate codegen items (for example libm's
+    // rint_round at opt-level=s). They have no item name and cannot name a
+    // libdevice intrinsic. item_name would ICE instead of compiling them.
+    let Some(sym) = cx.tcx.opt_item_name(func.def_id()) else {
+        return false;
+    };
     let name = sym.as_str();
 
     if is_unsupported_libdevice_fn(name) {
diff --git a/crates/rustc_codegen_nvvm/src/target.rs b/crates/rustc_codegen_nvvm/src/target.rs
index 562cd412..866d061d 100644
--- a/crates/rustc_codegen_nvvm/src/target.rs
+++ b/crates/rustc_codegen_nvvm/src/target.rs
@@ -2,7 +2,7 @@ use crate::llvm::{self, Type};
 use rustc_target::spec::{MergeFunctions, Target, TargetTuple};
 
 // This data layout must match `datalayout` in `crates/rustc_codegen_nvvm/libintrinsics.ll`.
-// Both LLVM 7 and LLVM 19 accept this string; the explicit specs are equivalent to the
+// Both LLVM 7 and LLVM 21 accept this string; the explicit specs are equivalent to the
 // defaults LLVM would fill in from the shorter `clang-19 -target nvptx64-nvidia-cuda`
 // output.
 pub const DATA_LAYOUT: &str = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-i128:128:128-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64";
diff --git a/crates/rustc_codegen_nvvm/src/ty.rs b/crates/rustc_codegen_nvvm/src/ty.rs
index b1e74365..c058d67f 100644
--- a/crates/rustc_codegen_nvvm/src/ty.rs
+++ b/crates/rustc_codegen_nvvm/src/ty.rs
@@ -56,12 +56,12 @@ impl Type {
 impl<'ll> CodegenCx<'ll, '_> {
     pub(crate) fn voidp(&self) -> &'ll Type {
         // llvm uses i8* for void ptrs, void* is invalid
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         {
             self.type_ptr_ext(AddressSpace::ZERO)
         }
 
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         {
             let i8_ty = self.type_i8();
             self.type_ptr_to_ext(i8_ty, AddressSpace::ZERO)
@@ -105,12 +105,12 @@ impl<'ll> CodegenCx<'ll, '_> {
     }
 
     pub(crate) fn type_i8p_ext(&self, address_space: AddressSpace) -> &'ll Type {
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         {
             self.type_ptr_ext(address_space)
         }
 
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         {
             self.type_ptr_to_ext(self.type_i8(), address_space)
         }
@@ -126,13 +126,13 @@ impl<'ll> CodegenCx<'ll, '_> {
     }
 
     pub(crate) fn type_ptr_to(&self, ty: &'ll Type) -> &'ll Type {
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         {
             let _ = ty;
             self.type_ptr_ext(AddressSpace::ZERO)
         }
 
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         {
             assert_ne!(
                 self.type_kind(ty),
@@ -145,13 +145,13 @@ impl<'ll> CodegenCx<'ll, '_> {
     }
 
     pub(crate) fn type_ptr_to_ext(&self, ty: &'ll Type, address_space: AddressSpace) -> &'ll Type {
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         {
             let _ = ty;
             self.type_ptr_ext(address_space)
         }
 
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         {
             unsafe { llvm::LLVMPointerType(ty, address_space.0) }
         }
@@ -245,24 +245,24 @@ impl<'ll, 'tcx> BaseTypeCodegenMethods for CodegenCx<'ll, 'tcx> {
     }
 
     fn type_ptr(&self) -> Self::Type {
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         unsafe {
             return llvm::LLVMPointerTypeInContext(self.llcx, AddressSpace::ZERO.0);
         }
 
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         {
             self.type_ptr_ext(AddressSpace::ZERO)
         }
     }
 
     fn type_ptr_ext(&self, address_space: AddressSpace) -> Self::Type {
-        #[cfg(feature = "llvm19")]
+        #[cfg(feature = "llvm21")]
         unsafe {
             return llvm::LLVMPointerTypeInContext(self.llcx, address_space.0);
         }
 
-        #[cfg(not(feature = "llvm19"))]
+        #[cfg(not(feature = "llvm21"))]
         {
             self.type_ptr_to_ext(self.type_i8(), address_space)
         }
diff --git a/examples/ptx_export/Cargo.toml b/examples/ptx_export/Cargo.toml
new file mode 100644
index 00000000..9c2b34cf
--- /dev/null
+++ b/examples/ptx_export/Cargo.toml
@@ -0,0 +1,12 @@
+[package]
+name = "ptx_export"
+version = "0.1.0"
+edition = "2024"
+publish = false
+
+[features]
+default = []
+llvm21 = ["cuda_builder/llvm21"]
+
+[dependencies]
+cuda_builder = { workspace = true }
diff --git a/examples/ptx_export/README.md b/examples/ptx_export/README.md
new file mode 100644
index 00000000..658fe5c5
--- /dev/null
+++ b/examples/ptx_export/README.md
@@ -0,0 +1,77 @@
+# Export PTX without a GPU host application
+
+This example compiles four Rust kernels to PTX without linking a CUDA host
+application or launching an NVIDIA GPU. Compilation still requires the normal
+Rust-CUDA Linux toolchain, CUDA toolkit, and NVVM libraries.
+
+```sh
+nix develop .#v21 --command cargo run -p ptx_export --features llvm21 -- artifacts/ptx
+```
+
+The exporter uses `CudaBuilder`'s feature-dependent target default: `compute_100`
+with `llvm21`, or `compute_75` without it. This keeps the target compatible with
+the selected NVVM IR dialect; overriding it to `compute_89` on the modern LLVM path
+selects NVVM's legacy reader and fails to parse the generated bitcode.
+
+The output `rust_kernels.ptx` contains:
+
+- `rust_vecadd(a: pointer, b: pointer, out: pointer, count: u32)`
+- `rust_sha256_32(input: pointer, out: pointer, count: u32)`
+- `rust_filtered_select(table: pointer, limits: pointer, out: pointer, count: u32)`
+- `rust_guarded_select(table: pointer, limits: pointer, initials: pointer, out: pointer, count: u32)`
+
+Pointers are 64-bit PTX addresses. Each SHA-256 work item reads exactly 32 bytes
+and writes the corresponding 32-byte digest. All kernels bounds-check the
+thread index so callers can round their dispatch size up. Inputs and outputs
+must not overlap. These explicit pointer/count interfaces avoid requiring a
+consumer to infer Rust slice or aggregate layouts.
+
+Keep the generated PTX unchanged when testing another PTX consumer. Successful
+export alone does not establish compatibility or numerical GPU correctness.
+
+The guarded-select experiment has a separate [test guide](guarded-select.md).
+
+This branch builds on `experiment/cuda13.3-llvm21` and uses the `llvm21` feature
+and `v21` shell. The linked experiment reports and checked-in result files record
+**historical LLVM 19 measurements**, not LLVM 21 validation. Re-run the workflows
+to establish results for this stack. The experimental `Llvm19Cleanup` and
+`llvm19_*` builder/option names are retained for caller compatibility; on this
+branch they require and control the LLVM 21 backend.
+
+## Experimental modern LLVM cleanup
+
+The exporter accepts `default` (the default), `none`, `dce`, `scalar`, `inline-scalar`, or `inline` after the output
+directory. For example:
+
+```sh
+nix develop .#v21 --command cargo run -p ptx_export --features llvm21 -- artifacts/ptx-inline inline
+```
+
+The builder API is `CudaBuilder::llvm19_cleanup(...)`, with
+`Llvm19Cleanup::{GlobalDce, Scalar, InlineScalar, Inline}`. These use bounded pass pipelines with verification at
+the merged-module handoff. GlobalDce removes unreachable internal definitions
+without scalar cleanup or inlining. InlineScalar combines target-aware inlining
+and scalar cleanup; Inline additionally runs branch-correlated cleanup. These modes are experimental and disabled by default.
+
+[Run 34786097065](https://github.com/brandonros/Rust-CUDA/actions/runs/34786097065)
+verified both modes on LLVM 19 against standalone replay and packages IR, PTX, SASS,
+resource reports and numerical IR checks. The filtered helper loses two SASS
+selects, but the combined filtered/stepped kernel grows in instruction count;
+this is not an established performance win. See the [measured results and
+correctness limits](guarded-select.md#validated-integration) before using either
+mode for a workload.
+
+Merged-module GlobalDCE is enabled by default on the modern backend. Use
+`CudaBuilder::llvm19_global_dce(false)` or exporter mode `none` to disable it.
+The other transformations remain opt-in. The [wave-2 report](optimization-wave2.md)
+records retention checks, all four mining comparisons and the reasons not to
+promote inlining as a general default.
+
+The [five-area investigation](optimization-roadmap.md) includes default-off
+per-module cleanup, inlining policy and size-oriented builds, memory cleanup,
+and a pinned Solana mining workload. Static Solana results favor inlining plus
+scalar cleanup; additional memory passes have not shown an advantage. Runtime
+performance on NVIDIA remains unmeasured.
+
+The consolidated [optimization results](optimization-results.md) record which
+passes helped, which did not, and the remaining runtime-validation limits.
diff --git a/examples/ptx_export/check_cleanup_ir.py b/examples/ptx_export/check_cleanup_ir.py
new file mode 100644
index 00000000..8888b065
--- /dev/null
+++ b/examples/ptx_export/check_cleanup_ir.py
@@ -0,0 +1,98 @@
+#!/usr/bin/env python3
+"""Check extracted integer-only LLVM helpers on the host, not on a GPU.
+
+llvm-extract preserves their bodies and makes their linkage usable by the C
+oracle. Only the target triple/data layout are changed in the host copy.
+This supplements, and never substitutes for, validation of NVIDIA PTX/SASS.
+"""
+import argparse
+import hashlib
+import json
+from pathlib import Path
+import re
+import shutil
+import subprocess
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('ir', type=Path)
+    parser.add_argument('--out', type=Path, required=True)
+    parser.add_argument('--llvm-bin', type=Path)
+    parser.add_argument('--cc', default='cc')
+    args = parser.parse_args()
+    out = args.out.resolve(); out.mkdir(parents=True, exist_ok=True)
+    llvm = args.llvm_bin or Path(shutil.which('llvm-extract') or '').parent
+    commands = []
+
+    def run(command, filename):
+        commands.append([str(x) for x in command])
+        (out/'commands.json').write_text(json.dumps(commands, indent=2)+'\n')
+        with (out/filename).open('w') as log:
+            subprocess.run(command, stdout=log, stderr=subprocess.STDOUT, check=True)
+        return (out/filename).read_text()
+
+    version = run([llvm/'llc', '--version'], 'llvm-version.txt')
+    if not re.search(r'LLVM version 21\.', version): raise RuntimeError('requires LLVM 21')
+    triple = re.search(r'Default target:\s*(\S+)', version)[1]
+    run([args.cc, '--version'], 'cc-version.txt')
+    source = args.ir.read_text()
+    symbols = {}
+    for name in ('filtered', 'stepped', 'preserved', 'direct', 'observed'):
+        found = re.findall(r'^define [^\n]*@([\w]+guarded_select\d+'+name+r')\(', source, re.M)
+        if len(found) != 1: raise RuntimeError(f'expected one {name} definition')
+        symbols[name] = found[0]
+    # --recursive follows function calls, but does not retain referenced global
+    # initializers. Before scalar cleanup, panic paths still reference source
+    # locations. Include those globals and their transitive data dependencies
+    # unchanged instead of substituting dummy definitions or dropping paths.
+    globals_to_keep = set()
+    while True:
+        run([llvm/'llvm-extract', *['--func='+s for s in symbols.values()],
+             *['--glob='+s for s in sorted(globals_to_keep)], '--recursive',
+             '-S', args.ir.resolve(), '-o', out/'extracted-gpu.ll'], 'extract.log')
+        extracted = (out/'extracted-gpu.ll').read_text()
+        external = re.findall(r'^@("[^"\\]*"|[-\w.$]+) = external ', extracted, re.M)
+        if not external:
+            break
+        names = {s.strip('"') for s in external}
+        if names <= globals_to_keep:
+            raise RuntimeError(f'host extraction contains unresolved globals: {sorted(names)}')
+        globals_to_keep.update(names)
+    # These five helpers use only integer arithmetic and ordinary table loads.
+    # Reject a changed reproducer that acquires GPU-specific or external calls.
+    declarations = re.findall(r'^declare [^\n]*@([^ (]+)\(', extracted, re.M)
+    # DCE-only retains ordinary lifetime markers and assumptions that scalar
+    # cleanup removes. Preserve their semantics in the host copy; these are
+    # target-independent LLVM intrinsics, not GPU operations or external calls.
+    allowed = {'llvm.trap', 'llvm.umin.i32', 'llvm.umin.i64', 'llvm.assume', 'llvm.expect.i1',
+               'llvm.lifetime.start.p0', 'llvm.lifetime.end.p0',
+               'llvm.experimental.noalias.scope.decl'}
+    if any(s not in allowed for s in declarations):
+        raise RuntimeError(f'host extraction contains unexpected declarations: {declarations}')
+    host = re.sub(r'^target datalayout = .*$', 'target datalayout = ""', extracted, flags=re.M)
+    host = re.sub(r'^target triple = .*$', f'target triple = "{triple}"', host, flags=re.M)
+    (out/'host.ll').write_text(host)
+    run([llvm/'opt', '-passes=verify', '-disable-output', out/'host.ll'], 'verify.log')
+    # Linux's host compiler links PIE by default. Referenced source-location
+    # data requires PIC relocations; this affects only the host oracle object.
+    run([llvm/'llc', '-relocation-model=pic', '-filetype=obj', out/'host.ll', '-o', out/'helpers.o'], 'llc.log')
+    header = []
+    for name, symbol in symbols.items():
+        parameters = 'const uint64_t *, uint32_t'
+        if name in ('preserved', 'observed'): parameters += ', uint64_t'
+        header += [f'#define {name} {symbol}', f'extern uint64_t {name}({parameters});']
+    (out/'helpers.h').write_text('\n'.join(header)+'\n')
+    oracle = Path(__file__).with_name('cleanup_ir_oracle.c').resolve()
+    run([args.cc, '-I', out, oracle, out/'helpers.o', '-o', out/'oracle'], 'link.log')
+    output = run([out/'oracle'], 'numerical.log')
+    if 'HOST_IR_NUMERICAL_PASS: 1608 cases' not in output: raise RuntimeError('missing numerical result')
+    result = {'input_sha256': hashlib.sha256(args.ir.read_bytes()).hexdigest(),
+              'oracle_sha256': hashlib.sha256(oracle.read_bytes()).hexdigest(),
+              'host_triple': triple, 'gpu_execution': False, 'result': output.strip()}
+    (out/'result.json').write_text(json.dumps(result, indent=2)+'\n')
+    print(output, end='')
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/check_default_dce.py b/examples/ptx_export/check_default_dce.py
new file mode 100644
index 00000000..dd7a1909
--- /dev/null
+++ b/examples/ptx_export/check_default_dce.py
@@ -0,0 +1,84 @@
+#!/usr/bin/env python3
+"""Validate default GlobalDCE through Rust codegen, internalization and NVVM."""
+import argparse
+import hashlib
+import json
+from pathlib import Path
+import re
+import subprocess
+import sys
+from replay_cleanup import normalized_functions
+
+
+def definitions(ir):
+    return set(re.findall(r'^define [^\n]*@([\w.$]+)\(', ir, re.M))
+
+
+def globals_defined(ir):
+    return {name: body for name, body in re.findall(r'^@([\w.$]+) = ([^\n]+)', ir, re.M)
+            if not body.startswith('external ')}
+
+
+def check_retention(before, after):
+    live_functions = {'retention_probe', 'retention_external', 'retention_table_target', 'retention_used_target', 'retention_linker_target'}
+    live_globals = {'RETENTION_TABLE', 'RETENTION_USED', 'RETENTION_DATA', 'RETENTION_DATA_REF', 'RETENTION_LINKER_USED'}
+    for phase, ir in [('before', before), ('after', after)]:
+        if not live_functions <= definitions(ir):
+            raise RuntimeError(f'{phase}: missing retained functions: {live_functions - definitions(ir)}')
+        if not live_globals <= globals_defined(ir).keys():
+            raise RuntimeError(f'{phase}: missing retained initialized data')
+    for symbol in live_globals:
+        if globals_defined(before)[symbol] != globals_defined(after)[symbol]:
+            raise RuntimeError(f'GlobalDCE changed initializer/linkage: {symbol}')
+    if 'retention_unreachable' not in definitions(before) or 'RETENTION_UNREACHABLE_DATA' not in globals_defined(before):
+        raise RuntimeError('negative controls were not emitted before GlobalDCE')
+    if 'retention_unreachable' in definitions(after) or 'RETENTION_UNREACHABLE_DATA' in globals_defined(after):
+        raise RuntimeError('default GlobalDCE did not remove unreachable controls')
+    for used in ('llvm.used', 'llvm.compiler.used'):
+        if not re.search(r'^@'+re.escape(used)+r' = appending ', after, re.M):
+            raise RuntimeError(f'missing appending-linkage {used}')
+    if not re.search(r'^define (?!internal\b)[^\n]*@retention_external\(', after, re.M):
+        raise RuntimeError('explicit external function was internalized')
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('artifacts', type=Path)
+    args = parser.parse_args()
+    root = args.artifacts.resolve()/'default-dce'
+    scripts = Path(__file__).resolve().parent
+    root.mkdir(parents=True, exist_ok=True)
+    results = []
+    for fixture, extra in [('small', []), ('retention', [str(scripts/'retention-kernels')])]:
+        modules = {}
+        for mode in ('none', 'default'):
+            out = root/fixture/mode; out.mkdir(parents=True, exist_ok=True)
+            command = ['cargo', 'run', '-vv', '-p', 'ptx_export', '--features', 'llvm21', '--', str(out), mode, *extra]
+            (out/'compiler-command.json').write_text(json.dumps(command, indent=2)+'\n')
+            with (out/'build.log').open('w') as log:
+                subprocess.run(command, stdout=log, stderr=subprocess.STDOUT, check=True)
+            subprocess.run(['opt-21', '-passes=verify', '-disable-output', str(out/'final-module.ll')], check=True)
+            subprocess.run([sys.executable, str(scripts/'inspect_codegen.py'), str(out)], check=True)
+            modules[mode] = out
+        raw = (modules['none']/'final-module.ll').read_text()
+        default = (modules['default']/'final-module.ll').read_text()
+        before = (modules['default']/'final-module.before-cleanup.ll').read_text()
+        if not len(definitions(default)) < len(definitions(raw)):
+            raise RuntimeError('default did not prune definitions relative to explicit disable')
+        for left, right in [(modules['none'], modules['default'])]:
+            if normalized_functions((left/'rust_kernels.ptx').read_text()) != normalized_functions((right/'rust_kernels.ptx').read_text()):
+                raise RuntimeError(f'{fixture}: default changes baseline PTX function bodies')
+        if fixture == 'retention':
+            check_retention(before, default)
+        else:
+            subprocess.run([sys.executable, str(scripts/'check_cleanup_ir.py'), str(modules['default']/'final-module.ll'),
+                            '--out', str(modules['default']/'host-ir-check')], check=True)
+        results.append({'fixture':fixture, 'definitions_before_after':[len(definitions(raw)), len(definitions(default))],
+                        'matches_disabled_ptx_function_bodies':True,
+                        'ptx_sha256':{m:hashlib.sha256((p/'rust_kernels.ptx').read_bytes()).hexdigest() for m,p in modules.items()}})
+        (root/'comparison.json').write_text(json.dumps(results, indent=2)+'\n')
+        print(f'{fixture}: default GlobalDCE verified against explicit disable', flush=True)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/check_integrated_cleanup.py b/examples/ptx_export/check_integrated_cleanup.py
new file mode 100644
index 00000000..f8c6d9f6
--- /dev/null
+++ b/examples/ptx_export/check_integrated_cleanup.py
@@ -0,0 +1,67 @@
+#!/usr/bin/env python3
+"""Compile through the real backend and compare against the offline pass replay."""
+import argparse
+import json
+import re
+from pathlib import Path
+import subprocess
+import sys
+from replay_cleanup import normalized_functions
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('artifacts', type=Path)
+    args = parser.parse_args()
+    root = args.artifacts.resolve()
+    results = []
+    for mode, replay in [('inline-scalar', 'inline-only'), ('dce', 'dce-only'), ('scalar', 'local-cleanup'), ('inline', 'inline-cleanup')]:
+        dest = root/'integrated-cleanup'/mode
+        dest.mkdir(parents=True, exist_ok=True)
+        command = ['cargo', 'run', '-vv', '-p', 'ptx_export', '--features', 'llvm21', '--', str(dest), mode]
+        (dest/'compiler-command.json').write_text(json.dumps(command, indent=2)+'\n')
+        with (dest/'build.log').open('w') as log:
+            subprocess.run(command, stdout=log, stderr=subprocess.STDOUT, check=True)
+        subprocess.run(['opt-21', '-passes=verify', '-disable-output', str(dest/'final-module.ll')], check=True)
+        before = dest/'final-module.before-cleanup.ll'
+        if not before.is_file(): raise RuntimeError('backend did not record the pre-cleanup IR')
+        actual = normalized_functions((dest/'rust_kernels.ptx').read_text())
+        expected = normalized_functions((root/'cleanup-experiment'/replay/'rust_kernels.ptx').read_text())
+        matches = actual == expected
+        required = {'rust_vecadd', 'rust_sha256_32', 'rust_guarded_select', 'rust_filtered_select'}
+        if not required <= actual.keys(): raise RuntimeError('cleanup removed an exported kernel')
+        result = {'mode': mode, 'matches_replay_function_bodies': matches}
+        if mode == 'dce':
+            baseline = normalized_functions((root/'rust_kernels.ptx').read_text())
+            if actual != baseline:
+                raise RuntimeError('DCE-only changed baseline PTX function bodies')
+            before_count = len(re.findall(r'^define ', before.read_text(), re.M))
+            after_count = len(re.findall(r'^define ', (dest/'final-module.ll').read_text(), re.M))
+            if not 0 < after_count < before_count:
+                raise RuntimeError('DCE-only did not prune unused definitions')
+            result['definitions_before_after'] = [before_count, after_count]
+        if mode == 'inline':
+            # Check the real compiler output, not a hand-written substitute.
+            # The negative control must still carry its observable dependency.
+            ir = (dest/'final-module.ll').read_text()
+            counts = {}
+            for helper in ('filtered', 'observed'):
+                bodies = re.findall(r'^define [^\n]*guarded_select\d+' + helper +
+                                    r'\([^\n]*\{\n(.*?)^}', ir, re.M | re.S)
+                if len(bodies) != 1: raise RuntimeError(f'expected one {helper} IR definition')
+                counts[helper] = len(re.findall(r'= select ', bodies[0]))
+            result['ir_select_counts'] = counts
+            if counts != {'filtered': 0, 'observed': 1}:
+                raise RuntimeError(f'guarded-select cleanup regression: {counts}')
+        results.append(result)
+        (root/'integrated-cleanup'/'comparison.json').write_text(json.dumps(results, indent=2)+'\n')
+        if not matches: raise RuntimeError(f'{mode}: integrated cleanup differs from replay')
+        subprocess.run([sys.executable, str(Path(__file__).with_name('inspect_codegen.py')), str(dest)], check=True)
+        if mode in ('dce', 'inline', 'inline-scalar'):
+            subprocess.run([sys.executable, str(Path(__file__).with_name('check_cleanup_ir.py')),
+                            str(dest/'final-module.ll'), '--out', str(dest/'host-ir-check')], check=True)
+        print(f'{mode}: real backend matches replay; LLVM verified and PTX assembled', flush=True)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/check_module_cleanup.py b/examples/ptx_export/check_module_cleanup.py
new file mode 100644
index 00000000..42abe4b5
--- /dev/null
+++ b/examples/ptx_export/check_module_cleanup.py
@@ -0,0 +1,100 @@
+#!/usr/bin/env python3
+"""Compare opt-in per-codegen-unit cleanup with independent LLVM replay."""
+import argparse
+import hashlib
+import json
+import re
+from pathlib import Path
+import subprocess
+import sys
+from optimization_pipelines import SCALAR
+
+
+def canonical_phi(line):
+    # PHI incoming pairs are unordered. Keep each value attached to its block;
+    # this is applied only after LLVM has verified and stripped local names.
+    if ' = phi ' not in line:
+        return line
+    groups = []
+    depth = 0
+    quoted = escaped = False
+    start = 0
+    for index, char in enumerate(line):
+        if not quoted:
+            if char == '[':
+                if depth == 0: start = index
+                depth += 1
+            elif char == ']':
+                depth -= 1
+                if depth == 0:
+                    group = line[start:index + 1]
+                    if re.search(r',\s*%[\w.$-]+\s*\]$', group):
+                        groups.append((start, index + 1, group))
+        if char == '"' and not escaped: quoted = not quoted
+        escaped = char == "\\" and not escaped
+    if len(groups) < 2:
+        return line
+    if any(line[a[1]:b[0]].strip() != ',' for a, b in zip(groups, groups[1:])):
+        return line
+    return line[:groups[0][0]] + ', '.join(sorted(g[2] for g in groups)) + line[groups[-1][1]:]
+
+
+def canonical(ir):
+    # Ignore LLVM printer comments (including predecessor order), but preserve
+    # semicolons inside quoted identifiers, inline assembly and string constants.
+    lines = []
+    for line in ir.splitlines():
+        quoted = escaped = False
+        end = len(line)
+        for index, char in enumerate(line):
+            if char == ';' and not quoted:
+                end = index
+                break
+            if char == '"' and not escaped:
+                quoted = not quoted
+            escaped = char == "\\" and not escaped
+        text = line[:end].rstrip()
+        if text.strip(): lines.append(canonical_phi(text))
+    return '\n'.join(lines)
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('artifacts', type=Path)
+    args = parser.parse_args()
+    root = args.artifacts.resolve()
+    results = []
+    for mode in ('module-scalar', 'module-inline'):
+        out = root/'module-cleanup'/mode; out.mkdir(parents=True, exist_ok=True)
+        command = ['cargo', 'run', '-vv', '-p', 'ptx_export', '--features', 'llvm21', '--', str(out), mode]
+        (out/'compiler-command.json').write_text(json.dumps(command, indent=2)+'\n')
+        with (out/'build.log').open('w') as log:
+            subprocess.run(command, stdout=log, stderr=subprocess.STDOUT, check=True)
+        before = sorted((out/'per-module').glob('*.before.ll'))
+        if not before: raise RuntimeError('no per-module before/after evidence')
+        checked = []
+        for path in before:
+            after = path.with_name(path.name.replace('.before.ll', '.after.ll'))
+            replay = path.with_name(path.name.replace('.before.ll', '.replay.ll'))
+            normalized = path.with_name(path.name.replace('.before.ll', '.normalized.ll'))
+            subprocess.run(['opt-21', '-passes='+SCALAR+',strip-nondebug,verify', '-verify-each', '-S', str(path), '-o', str(replay)], check=True)
+            subprocess.run(['opt-21', '-passes=strip-nondebug,verify', '-S', str(after), '-o', str(normalized)], check=True)
+            if canonical(replay.read_text()) != canonical(normalized.read_text()):
+                raise RuntimeError(f'per-module replay mismatch: {path.name}')
+            checked.append({'module':path.name.removesuffix('.before.ll'),
+                            'before_sha256':hashlib.sha256(path.read_bytes()).hexdigest(),
+                            'after_sha256':hashlib.sha256(after.read_bytes()).hexdigest()})
+        if not any(x['module'].startswith('core') for x in checked):
+            raise RuntimeError('missing dependency module coverage')
+        subprocess.run(['opt-21', '-passes=verify', '-disable-output', str(out/'final-module.ll')], check=True)
+        subprocess.run([sys.executable, str(Path(__file__).with_name('inspect_codegen.py')), str(out)], check=True)
+        if mode == 'module-inline':
+            subprocess.run([sys.executable, str(Path(__file__).with_name('check_cleanup_ir.py')),
+                            str(out/'final-module.ll'), '--out', str(out/'host-ir-check')], check=True)
+        results.append({'mode':mode, 'checked_modules':checked})
+        (root/'module-cleanup'/'comparison.json').write_text(json.dumps(results, indent=2)+'\n')
+        print(f'{mode}: {len(checked)} modules match standalone replay; final PTX assembled', flush=True)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/check_workloads.py b/examples/ptx_export/check_workloads.py
new file mode 100644
index 00000000..ec77874e
--- /dev/null
+++ b/examples/ptx_export/check_workloads.py
@@ -0,0 +1,76 @@
+#!/usr/bin/env python3
+"""Build size-oriented reproducers or pinned, unmodified Solana kernel sources."""
+import argparse
+import json
+from pathlib import Path
+import re
+import shutil
+import subprocess
+import sys
+from replay_cleanup import normalized_functions
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('artifacts', type=Path)
+    parser.add_argument('--miner', type=Path)
+    args = parser.parse_args()
+    root = args.artifacts.resolve()
+    scripts = Path(__file__).resolve().parent
+    if args.miner:
+        miner = args.miner.resolve()
+        out = root/'mining-solana'; out.mkdir(parents=True, exist_ok=True)
+        commit = subprocess.check_output(['git', '-C', str(miner), 'rev-parse', 'HEAD'], text=True).strip()
+        if commit != '9791234249fc8cb762c296c4fda4503d2686ff77':
+            raise RuntimeError('unexpected mining workload revision')
+        manifest = miner/'kernels/Cargo.toml'
+        original = manifest.read_text()
+        shutil.copy2(manifest, out/'Cargo.toml.original')
+        shutil.copy2(miner/'kernels/Cargo.lock', out/'Cargo.lock.original')
+        # Use this backend's cuda_std while retaining the mining algorithm source.
+        replacement = 'cuda_std = { path = '+json.dumps(str(scripts.parents[1]/'crates/cuda_std'))+' }'
+        patched, count = re.subn(r'^cuda_std = \{ git = "https://github.com/brandonros/Rust-CUDA.git", rev = "2f4fd1d" \}$', replacement, original, flags=re.M)
+        if count != 1: raise RuntimeError('unexpected cuda_std dependency; review workload pin')
+        manifest.write_text(patched)
+        shutil.copy2(manifest, out/'Cargo.toml.patched')
+        (out/'workload.json').write_text(json.dumps({'repository':'brandonros/vanity-miner-rs', 'commit':commit,
+            'features':['solana'], 'source_change':'cuda_std dependency path only; algorithm source unchanged'}, indent=2)+'\n')
+        builds = [('none', out, [str(miner/'kernels'), 'solana'])]
+    else:
+        builds = [(mode, root/'size-builds'/mode, []) for mode in ('size-s', 'size-z')]
+    for mode, out, extra in builds:
+        out.mkdir(parents=True, exist_ok=True)
+        command = ['cargo', 'run', '-vv', '-p', 'ptx_export', '--features', 'llvm21', '--', str(out), mode, *extra]
+        (out/'compiler-command.json').write_text(json.dumps(command, indent=2)+'\n')
+        with (out/'build.log').open('w') as log:
+            subprocess.run(command, stdout=log, stderr=subprocess.STDOUT, check=True)
+        subprocess.run(['opt-21', '-passes=verify', '-disable-output', str(out/'final-module.ll')], check=True)
+        subprocess.run([sys.executable, str(scripts/'inspect_codegen.py'), str(out)], check=True)
+        if not args.miner:
+            subprocess.run([sys.executable, str(scripts/'check_cleanup_ir.py'), str(out/'final-module.ll'),
+                            '--out', str(out/'host-ir-check')], check=True)
+    if args.miner:
+        shutil.copy2(miner/'kernels/Cargo.lock', out/'Cargo.lock.resolved')
+        subprocess.run([sys.executable, str(scripts/'replay_cleanup.py'), str(out), '--extended', '--only',
+                        'baseline,dce-only,inline-only,inline-cleanup,memory-early-cse,memory-gvn,memory-stores,memory-combined'], check=True)
+        results = []
+        for mode, replay in [('dce', 'dce-only'), ('inline-scalar', 'inline-only')]:
+            dest = out/'integrated-cleanup'/mode
+            dest.mkdir(parents=True, exist_ok=True)
+            command = ['cargo', 'run', '-vv', '-p', 'ptx_export', '--features', 'llvm21', '--',
+                       str(dest), mode, str(miner/'kernels'), 'solana']
+            (dest/'compiler-command.json').write_text(json.dumps(command, indent=2)+'\n')
+            with (dest/'build.log').open('w') as log:
+                subprocess.run(command, stdout=log, stderr=subprocess.STDOUT, check=True)
+            subprocess.run(['opt-21', '-passes=verify', '-disable-output', str(dest/'final-module.ll')], check=True)
+            actual = normalized_functions((dest/'rust_kernels.ptx').read_text())
+            expected = normalized_functions((out/'cleanup-experiment'/replay/'rust_kernels.ptx').read_text())
+            if 'kernel_find_solana_vanity_private_key' not in actual or actual != expected:
+                raise RuntimeError(f'Solana {mode}: integrated cleanup differs from replay')
+            subprocess.run([sys.executable, str(scripts/'inspect_codegen.py'), str(dest)], check=True)
+            results.append({'mode':mode, 'matches_replay_function_bodies':True})
+            (out/'integrated-cleanup/comparison.json').write_text(json.dumps(results, indent=2)+'\n')
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/cleanup_ir_oracle.c b/examples/ptx_export/cleanup_ir_oracle.c
new file mode 100644
index 00000000..cf255da9
--- /dev/null
+++ b/examples/ptx_export/cleanup_ir_oracle.c
@@ -0,0 +1,30 @@
+// Independent index oracle for the five actual compiler-emitted helpers.
+// The generated header binds their Rust symbol names; no Rust source is rebuilt.
+#include <stdint.h>
+#include <stdio.h>
+#include "helpers.h"
+
+int main(void) {
+ uint64_t seeds[] = {0, 1, UINT64_C(1)<<63, UINT64_MAX};
+ uint64_t initials[] = {0,1,17,63,64,UINT64_MAX};
+ unsigned cases=0;
+ for (unsigned t=0;t<4;t++) {
+  uint64_t table[64];
+  for (unsigned i=0;i<64;i++) table[i]=UINT64_C(0x9e3779b97f4a7c15)*i+seeds[t];
+  for (unsigned l=0;l<67;l++) for (unsigned a=0;a<6;a++) {
+   uint32_t limit=l==66?UINT32_MAX:l;
+   unsigned n=limit<64?limit:64;
+   uint64_t odd=0,live=0;
+   for (unsigned i=1;i<n;i+=2) odd+=table[i];
+   for (unsigned i=0;i<n;i++) live+=table[i==0?(initials[a]&63):((i-1)|1)];
+   if (filtered(table,limit)!=odd || stepped(table,limit)!=odd ||
+       preserved(table,limit,initials[a])!=odd || direct(table,limit)!=odd ||
+       observed(table,limit,initials[a])!=live) {
+    fprintf(stderr,"FAIL table=%u limit=%u initial=%llu\n",t,limit,(unsigned long long)initials[a]); return 1;
+   }
+   cases++;
+  }
+ }
+ printf("HOST_IR_NUMERICAL_PASS: %u cases across five extracted helpers\n",cases);
+ return 0;
+}
diff --git a/examples/ptx_export/diagnose_wave2_nvvm.py b/examples/ptx_export/diagnose_wave2_nvvm.py
new file mode 100644
index 00000000..c640c53b
--- /dev/null
+++ b/examples/ptx_export/diagnose_wave2_nvvm.py
@@ -0,0 +1,61 @@
+#!/usr/bin/env python3
+"""Isolate representative entry points without suppressing NVVM verification.
+
+Run each NVIDIA invocation in a child process so a verifier crash does not
+prevent retaining evidence for the remaining kernels. No production IR changes.
+"""
+import argparse
+import hashlib
+import json
+import os
+from pathlib import Path
+import re
+import subprocess
+import sys
+from replay_cleanup import compile_nvvm
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('ir', type=Path)
+    parser.add_argument('--out', type=Path, required=True)
+    parser.add_argument('--worker', action='store_true')
+    args = parser.parse_args()
+    candidates = list(Path('target/cuda-builder-codegen').rglob('libintrinsics_v21.bc'))
+    unique = {hashlib.sha256(p.read_bytes()).hexdigest():p for p in candidates}
+    if len(unique) != 1: raise RuntimeError('expected one distinct LLVM 21 intrinsic library')
+    libraries = [Path(os.environ['CUDA_HOME'])/'nvvm/libdevice/libdevice.10.bc',next(iter(unique.values()))]
+    if args.worker:
+        compile_nvvm(args.ir,libraries,args.out)
+        return
+    args.out.mkdir(parents=True,exist_ok=True)
+    llvm_bin = Path(subprocess.check_output([os.environ['LLVM_CONFIG_21'],'--bindir'],text=True).strip())
+    report = {'input_sha256':hashlib.sha256(args.ir.read_bytes()).hexdigest(),
+              'libraries':{str(p):hashlib.sha256(p.read_bytes()).hexdigest() for p in libraries},'kernels':{}}
+    for kernel in ('wave2_float','wave2_shared','wave2_atomic','wave2_shuffle'):
+        out = args.out/kernel;out.mkdir(exist_ok=True)
+        globals_to_keep = set()
+        commands = []
+        while True:
+            command = [str(llvm_bin/'llvm-extract'),'--recursive','--func='+kernel,
+                       *['--glob='+s for s in sorted(globals_to_keep)],'-S',str(args.ir),'-o',str(out/'extracted.ll')]
+            commands.append(command);subprocess.run(command,check=True)
+            source = (out/'extracted.ll').read_text()
+            names = {s.strip('"') for s in re.findall(r'^@("[^"\\]*"|[-\w.$]+) = external (?:addrspace\(\d+\) )?',source,re.M)}
+            if not names: break
+            if names <= globals_to_keep: raise RuntimeError(f'unresolved globals: {names}')
+            globals_to_keep.update(names)
+        command = ['opt-21','-passes=verify',str(out/'extracted.ll'),'-o',str(out/'module.bc')]
+        commands.append(command);subprocess.run(command,check=True)
+        command = [sys.executable,str(Path(__file__).resolve()),str(out/'module.bc'),'--out',str(out),'--worker']
+        commands.append(command)
+        with (out/'nvvm.log').open('w') as log:
+            result = subprocess.run(command,stdout=log,stderr=subprocess.STDOUT)
+        (out/'commands.json').write_text(json.dumps(commands,indent=2)+'\n')
+        report['kernels'][kernel] = {'exit_code':result.returncode,'compiled':result.returncode==0,
+                                    'ir_sha256':hashlib.sha256((out/'extracted.ll').read_bytes()).hexdigest()}
+        (args.out/'diagnosis.json').write_text(json.dumps(report,indent=2)+'\n')
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/evidence/cleanup-baseline-apple.json b/examples/ptx_export/evidence/cleanup-baseline-apple.json
new file mode 100644
index 00000000..4d99b142
--- /dev/null
+++ b/examples/ptx_export/evidence/cleanup-baseline-apple.json
@@ -0,0 +1,41 @@
+{
+  "artifact_run": 34784267526,
+  "device": "Apple M5",
+  "consumer": "CuMetal generic PTX lowering",
+  "nvidia_execution": false,
+  "performance_measurement": false,
+  "workload_specializations": false,
+  "sha256": {
+    "ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+    "cumetalc": "16220050a5913d98be424c3001e20a44180dd90e998e4c684abf4e1c9ec53c7e",
+    "libcumetal": "eae463ca27f839d1a514249e5b34f571376aad99fa2d7cdc9a3cbc8dab3f6e62",
+    "vector_sha_runner_source": "bd62e6f8e55770f677697eb546569479a637796afc3bfa5e23e3821b57204992",
+    "vector_sha_harness": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448",
+    "guarded_runner": "165cad8e45b1fdc9f9c41ed2a69ae4fe3fc9d0d940b876aedd821c8ef87d8286"
+  },
+  "numerical_results": {
+    "vector_add": [
+      "NUMERICAL_PASS kernel=rust_vecadd count=1",
+      "NUMERICAL_PASS kernel=rust_vecadd count=31",
+      "NUMERICAL_PASS kernel=rust_vecadd count=32",
+      "NUMERICAL_PASS kernel=rust_vecadd count=33",
+      "NUMERICAL_PASS kernel=rust_vecadd count=257"
+    ],
+    "sha256": [
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=1",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=31",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=32",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=33",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=257"
+    ],
+    "guarded_select": [
+      "NUMERICAL_PASS rust_guarded_select: 1608 cases, independent oracle and guards; device=Apple M5 driver=/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib"
+    ]
+  },
+  "filtered_select": "Not executed: CuMetal rejects trap in stepped helper",
+  "commands": [
+    "python3 cuda-metal/demos/rust-ptx/run.py BASELINE_PTX --build-dir cuda-metal/build-rust-ptx-apple --out OUTPUT_DIR",
+    "cumetalc BASELINE_PTX --backend=cumetal-ir --ptx-strict --overwrite --entry rust_guarded_select --emit=msl -o GUARDED_METAL",
+    "python3 examples/ptx_export/run_guarded_select.py GUARDED_METAL --kernel rust_guarded_select --driver LIBCUMETAL_PATH"
+  ]
+}
diff --git a/examples/ptx_export/evidence/cleanup-comparison.json b/examples/ptx_export/evidence/cleanup-comparison.json
new file mode 100644
index 00000000..e4bd39e2
--- /dev/null
+++ b/examples/ptx_export/evidence/cleanup-comparison.json
@@ -0,0 +1,84 @@
+{
+  "artifact_run": 34785534228,
+  "stage": "standalone LLVM replay followed by NVVM and ptxas",
+  "integrated_backend_status": "scalar matches; inline SHA-256 mismatch under investigation",
+  "gpu_performance_measured": false,
+  "nvidia_execution": false,
+  "variants": {
+    "baseline": {
+      "ptx_sha256": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+      "sass_sha256": "8d474156fc6f2ce503ebff55efd5dc86520ff66ed222674e6e553ddea02c43d4",
+      "filtered_kernel": {
+        "non_nop_instructions": 103,
+        "selects": 4,
+        "global_load_sites": 3,
+        "registers": 17
+      },
+      "resources": "Resource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:17 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0"
+    },
+    "local-cleanup": {
+      "ptx_sha256": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+      "sass_sha256": "1dc72e0571108773ead3aa2a8b1f8ba454c5f2b44c731a3abd9a2f9241b25dfa",
+      "filtered_kernel": {
+        "non_nop_instructions": 115,
+        "selects": 4,
+        "global_load_sites": 3,
+        "registers": 16
+      },
+      "resources": "Resource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:16 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0"
+    },
+    "inline-only": {
+      "ptx_sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+      "sass_sha256": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc",
+      "filtered_kernel": {
+        "non_nop_instructions": 114,
+        "selects": 4,
+        "global_load_sites": 3,
+        "registers": 19
+      },
+      "resources": "Resource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:19 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0"
+    },
+    "inline-cleanup": {
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "filtered_kernel": {
+        "non_nop_instructions": 124,
+        "selects": 2,
+        "global_load_sites": 3,
+        "registers": 18
+      },
+      "resources": "Resource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0"
+    }
+  },
+  "correlated_apple_numerical": {
+    "device": "Apple M5",
+    "consumer": "CuMetal generic lowering, workload specializations disabled",
+    "tool_sha256": {
+      "cumetalc": "a78ec2cc6d4825f6a1fad41e785de60fb4f7c50915c2d6cd93253ea95335c7ad",
+      "libcumetal": "eae463ca27f839d1a514249e5b34f571376aad99fa2d7cdc9a3cbc8dab3f6e62",
+      "vector_sha_runner": "bd62e6f8e55770f677697eb546569479a637796afc3bfa5e23e3821b57204992",
+      "vector_sha_harness": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448",
+      "guarded_runner": "165cad8e45b1fdc9f9c41ed2a69ae4fe3fc9d0d940b876aedd821c8ef87d8286"
+    },
+    "results": {
+      "vector_add": [
+        "NUMERICAL_PASS kernel=rust_vecadd count=1",
+        "NUMERICAL_PASS kernel=rust_vecadd count=31",
+        "NUMERICAL_PASS kernel=rust_vecadd count=32",
+        "NUMERICAL_PASS kernel=rust_vecadd count=33",
+        "NUMERICAL_PASS kernel=rust_vecadd count=257"
+      ],
+      "sha256": [
+        "NUMERICAL_PASS kernel=rust_sha256_32 count=1",
+        "NUMERICAL_PASS kernel=rust_sha256_32 count=31",
+        "NUMERICAL_PASS kernel=rust_sha256_32 count=32",
+        "NUMERICAL_PASS kernel=rust_sha256_32 count=33",
+        "NUMERICAL_PASS kernel=rust_sha256_32 count=257"
+      ],
+      "guarded_select": [
+        "NUMERICAL_PASS rust_guarded_select: 1608 cases, independent oracle and guards; device=Apple M5 driver=/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib"
+      ]
+    },
+    "filtered_select": "Not executed: CuMetal rejects trap in stepped helper"
+  }
+}
diff --git a/examples/ptx_export/evidence/cleanup-validated.json b/examples/ptx_export/evidence/cleanup-validated.json
new file mode 100644
index 00000000..a4772783
--- /dev/null
+++ b/examples/ptx_export/evidence/cleanup-validated.json
@@ -0,0 +1,96 @@
+{
+  "run": 34786097065,
+  "source_commit": "973e0ae8fdfedf3460825594a11886fc3f943a08",
+  "integrated_comparison": [
+    {
+      "mode": "scalar",
+      "matches_replay_function_bodies": true
+    },
+    {
+      "mode": "inline",
+      "matches_replay_function_bodies": true,
+      "ir_select_counts": {
+        "filtered": 0,
+        "observed": 1
+      }
+    }
+  ],
+  "host_ir_numerical": {
+    "input_sha256": "424794225dc0c3483e5303f39d2d3234a92df3bf9c9a8ccb9ebe46365b6afaa2",
+    "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+    "host_triple": "x86_64-unknown-linux-gnu",
+    "gpu_execution": false,
+    "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+  },
+  "variants": {
+    "baseline": {
+      "ptx_sha256": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+      "sass_sha256": "8d474156fc6f2ce503ebff55efd5dc86520ff66ed222674e6e553ddea02c43d4",
+      "filtered_kernel_non_nop_instructions": 103,
+      "filtered_kernel_selects": 4,
+      "filtered_kernel_registers": 17
+    },
+    "local-cleanup": {
+      "ptx_sha256": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+      "sass_sha256": "1dc72e0571108773ead3aa2a8b1f8ba454c5f2b44c731a3abd9a2f9241b25dfa",
+      "filtered_kernel_non_nop_instructions": 115,
+      "filtered_kernel_selects": 4,
+      "filtered_kernel_registers": 16
+    },
+    "inline-only": {
+      "ptx_sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+      "sass_sha256": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc",
+      "filtered_kernel_non_nop_instructions": 114,
+      "filtered_kernel_selects": 4,
+      "filtered_kernel_registers": 19
+    },
+    "inline-cleanup": {
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "filtered_kernel_non_nop_instructions": 124,
+      "filtered_kernel_selects": 2,
+      "filtered_kernel_registers": 18
+    },
+    "constrained-cleanup": {
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "filtered_kernel_non_nop_instructions": 124,
+      "filtered_kernel_selects": 2,
+      "filtered_kernel_registers": 18
+    }
+  },
+  "nvidia_execution": false,
+  "gpu_performance_measured": false,
+  "filtered_stepped_gpu_status": "CuMetal rejects stepped helper trap; extracted integer IR checked on host",
+  "integrated_ptx_sha256": {
+    "scalar": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+    "inline": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf"
+  },
+  "inline_apple_numerical_evidence": "cleanup-comparison.json: byte-identical PTX SHA-256",
+  "scalar_apple_numerical": {
+    "vector_add": [
+      "NUMERICAL_PASS kernel=rust_vecadd count=1",
+      "NUMERICAL_PASS kernel=rust_vecadd count=31",
+      "NUMERICAL_PASS kernel=rust_vecadd count=32",
+      "NUMERICAL_PASS kernel=rust_vecadd count=33",
+      "NUMERICAL_PASS kernel=rust_vecadd count=257"
+    ],
+    "sha256": [
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=1",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=31",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=32",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=33",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=257"
+    ],
+    "guarded_select": [
+      "NUMERICAL_PASS rust_guarded_select: 1608 cases, independent oracle and guards; device=Apple M5 driver=/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib"
+    ]
+  },
+  "scalar_apple_tool_sha256": {
+    "cumetalc": "a78ec2cc6d4825f6a1fad41e785de60fb4f7c50915c2d6cd93253ea95335c7ad",
+    "libcumetal": "eae463ca27f839d1a514249e5b34f571376aad99fa2d7cdc9a3cbc8dab3f6e62",
+    "vector_sha_runner": "bd62e6f8e55770f677697eb546569479a637796afc3bfa5e23e3821b57204992",
+    "vector_sha_harness": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448",
+    "guarded_runner": "165cad8e45b1fdc9f9c41ed2a69ae4fe3fc9d0d940b876aedd821c8ef87d8286"
+  }
+}
diff --git a/examples/ptx_export/evidence/extended-sweep.json b/examples/ptx_export/evidence/extended-sweep.json
new file mode 100644
index 00000000..a2dfeff0
--- /dev/null
+++ b/examples/ptx_export/evidence/extended-sweep.json
@@ -0,0 +1,3851 @@
+{
+  "run": 34787085815,
+  "scope": "four exported repro/SHA/vector kernels; larger mining workload pending",
+  "gpu_performance_measured": false,
+  "results": [
+    {
+      "name": "baseline",
+      "passes": "verify",
+      "opt_options": [],
+      "opt_seconds": 0.67886297900003,
+      "total_seconds": 3.1374597770000037,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 13107292,
+      "ir_definitions": 3299,
+      "ptx_bytes": 106204,
+      "cubin_bytes": 57984,
+      "ptx_sha256": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+      "sass_sha256": "8d474156fc6f2ce503ebff55efd5dc86520ff66ed222674e6e553ddea02c43d4",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 17,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
+            "LDC": 2,
+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
+            "IADD3": 65,
+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 18,
+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 6,
+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "CS2R": 1,
+            "ISETP.GT.U32.AND": 1,
+            "ISETP.GT.U32.AND.EX": 1,
+            "BRA": 3,
+            "LDC.64": 2,
+            "IMAD.MOV.U32": 4,
+            "LOP3.LUT": 1,
+            "SEL": 2,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "ISETP.GE.U32.AND": 1,
+            "ISETP.GE.U32.AND.EX": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 9
+          },
+          "non_nop_instructions": 28,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "local-cleanup",
+      "passes": "function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 1.8997491760000003,
+      "total_seconds": 4.065221500000007,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 8315841,
+      "ir_definitions": 3299,
+      "ptx_bytes": 106352,
+      "cubin_bytes": 58240,
+      "ptx_sha256": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+      "sass_sha256": "1dc72e0571108773ead3aa2a8b1f8ba454c5f2b44c731a3abd9a2f9241b25dfa",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 16,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
+            "LDC": 2,
+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
+            "IADD3": 65,
+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 18,
+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 6,
+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_56"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "IMAD.MOV.U32": 15,
+            "CS2R": 1,
+            "LDCU.64": 2,
+            "ISETP.GT.U32.AND": 1,
+            "BSSY.RECONVERGENT": 1,
+            "ISETP.GT.U32.AND.EX": 1,
+            "SEL": 2,
+            "ISETP.NE.U32.AND": 1,
+            "ISETP.NE.U32.AND.EX": 1,
+            "BRA": 5,
+            "LOP3.LUT": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "BSYNC.RECONVERGENT": 1,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 13
+          },
+          "non_nop_instructions": 42,
+          "scope": "helper",
+          "end_label": ".L_x_58"
+        }
+      }
+    },
+    {
+      "name": "inline-only",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+      "opt_options": [],
+      "opt_seconds": 0.7327765550000436,
+      "total_seconds": 2.275106316000006,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 231893,
+      "ir_definitions": 10,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "ptx_sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+      "sass_sha256": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 19,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
+            "IADD3": 65,
+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "IMAD.MOV.U32": 18,
+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 6,
+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "IMAD.MOV.U32": 13,
+            "ISETP.GT.U32.AND": 2,
+            "ISETP.GT.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 2,
+            "SEL": 2,
+            "LOP3.LUT": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "RET.REL.NODEC": 1,
+            "NOP": 14
+          },
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "inline-cleanup",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7481869169999982,
+      "total_seconds": 2.298125383000013,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 228711,
+      "ir_definitions": 10,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 18,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
+            "LDC": 2,
+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
+            "IADD3": 65,
+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 18,
+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 6,
+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "BSSY.RECONVERGENT": 2,
+            "VIMNMX.U32": 1,
+            "CS2R": 1,
+            "IMAD.MOV.U32": 14,
+            "ISETP.LT.U32.AND": 2,
+            "LOP3.LUT": 2,
+            "ISETP.LT.U32.AND.EX": 2,
+            "IADD3": 3,
+            "IMAD.X": 3,
+            "BRA": 5,
+            "BSYNC.RECONVERGENT": 2,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "LDC.64": 1,
+            "LDCU.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      }
+    },
+    {
+      "name": "constrained-cleanup",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),function(constraint-elimination,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7751149850000161,
+      "total_seconds": 2.3224075640000024,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 227792,
+      "ir_definitions": 10,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 18,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
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+            "S2R": 1,
+            "S2UR": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
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+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
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+            "UIADD3.X": 3,
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+            "R2UR": 98,
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+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "6direct": {
+          "opcode_histogram": {
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+            "ISETP.GE.U32.AND": 3,
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+            "VIMNMX.U32": 1,
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+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
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+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "BRA": 9,
+            "LDC.64": 1,
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+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
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+            "R2UR": 34,
+            "LDG.E.64": 22,
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+            "LEA": 1,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
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+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
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+            "BREAK.RELIABLE": 3,
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+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
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+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
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+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
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+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
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+            "CS2R": 1,
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+            "ISETP.LT.U32.AND": 2,
+            "LOP3.LUT": 2,
+            "ISETP.LT.U32.AND.EX": 2,
+            "IADD3": 3,
+            "IMAD.X": 3,
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+            "BSYNC.RECONVERGENT": 2,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "LDC.64": 1,
+            "LDCU.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      }
+    },
+    {
+      "name": "cfg-no-final",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7444033479999916,
+      "total_seconds": 2.290429046999975,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 229676,
+      "ir_definitions": 10,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 18,
+      "helpers": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
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+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
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+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "LDC.64": 1,
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+            "VIMNMX.U32": 1,
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+            "IMAD.MOV": 2,
+            "UIADD3": 1,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
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+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "BSSY.RECONVERGENT": 2,
+            "VIMNMX.U32": 1,
+            "CS2R": 1,
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+            "ISETP.LT.U32.AND": 2,
+            "LOP3.LUT": 2,
+            "ISETP.LT.U32.AND.EX": 2,
+            "IADD3": 3,
+            "IMAD.X": 3,
+            "BRA": 5,
+            "BSYNC.RECONVERGENT": 2,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "LDC.64": 1,
+            "LDCU.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      }
+    },
+    {
+      "name": "cfg-before-combine",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,simplifycfg,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7499609319999649,
+      "total_seconds": 2.294008887000018,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 228607,
+      "ir_definitions": 10,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 18,
+      "helpers": {
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+            "LDCU": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
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+            "BRA": 28,
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+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
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+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 6,
+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "BSSY.RECONVERGENT": 2,
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+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "BSSY.RECONVERGENT": 2,
+            "VIMNMX.U32": 1,
+            "CS2R": 1,
+            "IMAD.MOV.U32": 14,
+            "ISETP.LT.U32.AND": 2,
+            "LOP3.LUT": 2,
+            "ISETP.LT.U32.AND.EX": 2,
+            "IADD3": 3,
+            "IMAD.X": 3,
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+            "BSYNC.RECONVERGENT": 2,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "LDC.64": 1,
+            "LDCU.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      }
+    },
+    {
+      "name": "cfg-no-both",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7537888790000125,
+      "total_seconds": 2.2895374930000116,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 287158,
+      "ir_definitions": 10,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "ptx_sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+      "sass_sha256": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 19,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
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+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
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+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
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+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "BSSY.RECONVERGENT": 2,
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+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
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+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
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+            "ISETP.GT.U32.AND": 2,
+            "ISETP.GT.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 2,
+            "SEL": 2,
+            "LOP3.LUT": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "RET.REL.NODEC": 1,
+            "NOP": 14
+          },
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "dce-only",
+      "passes": "globaldce,verify",
+      "opt_options": [],
+      "opt_seconds": 0.40906770800000913,
+      "total_seconds": 2.1470532840000374,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 257877,
+      "ir_definitions": 93,
+      "ptx_bytes": 106204,
+      "cubin_bytes": 57984,
+      "ptx_sha256": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+      "sass_sha256": "8d474156fc6f2ce503ebff55efd5dc86520ff66ed222674e6e553ddea02c43d4",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 17,
+      "helpers": {
+        "": {
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+            "LDCU": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
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+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "VIADD": 6,
+            "IMAD.X": 15,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "LDC.64": 1,
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+            "VIMNMX.U32": 1,
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+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
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+            "LEA": 1,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
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+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
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+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
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+            "ISETP.GT.U32.AND.EX": 1,
+            "BRA": 3,
+            "LDC.64": 2,
+            "IMAD.MOV.U32": 4,
+            "LOP3.LUT": 1,
+            "SEL": 2,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "ISETP.GE.U32.AND": 1,
+            "ISETP.GE.U32.AND.EX": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 9
+          },
+          "non_nop_instructions": 28,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "dce-scalar",
+      "passes": "globaldce,function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+      "opt_options": [],
+      "opt_seconds": 0.42940284399998063,
+      "total_seconds": 2.156174716999999,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 223282,
+      "ir_definitions": 93,
+      "ptx_bytes": 106352,
+      "cubin_bytes": 58240,
+      "ptx_sha256": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+      "sass_sha256": "1dc72e0571108773ead3aa2a8b1f8ba454c5f2b44c731a3abd9a2f9241b25dfa",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 16,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
+            "LDC": 2,
+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
+            "IADD3": 65,
+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 18,
+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 6,
+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_56"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "IMAD.MOV.U32": 15,
+            "CS2R": 1,
+            "LDCU.64": 2,
+            "ISETP.GT.U32.AND": 1,
+            "BSSY.RECONVERGENT": 1,
+            "ISETP.GT.U32.AND.EX": 1,
+            "SEL": 2,
+            "ISETP.NE.U32.AND": 1,
+            "ISETP.NE.U32.AND.EX": 1,
+            "BRA": 5,
+            "LOP3.LUT": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "BSYNC.RECONVERGENT": 1,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 13
+          },
+          "non_nop_instructions": 42,
+          "scope": "helper",
+          "end_label": ".L_x_58"
+        }
+      }
+    },
+    {
+      "name": "memory-early-cse",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7518337000000201,
+      "total_seconds": 2.2802160830000275,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 229111,
+      "ir_definitions": 10,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "ptx_sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+      "sass_sha256": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 19,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
+            "IADD3": 65,
+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "IMAD.MOV.U32": 13,
+            "ISETP.GT.U32.AND": 2,
+            "ISETP.GT.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 2,
+            "SEL": 2,
+            "LOP3.LUT": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "RET.REL.NODEC": 1,
+            "NOP": 14
+          },
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "memory-gvn",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(gvn,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7440140829999677,
+      "total_seconds": 2.2641184679999924,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 229868,
+      "ir_definitions": 10,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "ptx_sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+      "sass_sha256": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 19,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
+            "IADD3": 65,
+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 18,
+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 6,
+            "LDCU.64": 5,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "IMAD.MOV.U32": 13,
+            "ISETP.GT.U32.AND": 2,
+            "ISETP.GT.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 2,
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+            "LOP3.LUT": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "RET.REL.NODEC": 1,
+            "NOP": 14
+          },
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "memory-stores",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.7421901199999752,
+      "total_seconds": 2.2817004639999823,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 224492,
+      "ir_definitions": 10,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "ptx_sha256": "cf300fae8780b140c476f40c40e1ca4f3a81900f2fb39e79ddfb75650e4b66a2",
+      "sass_sha256": "0c4deecb105ad0e83cd94193fee3eb3f1c1174f4089c37d6d1f02272aea0c97a",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 19,
+      "helpers": {
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+            "S2R": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
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+            "LDG.E": 2,
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+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
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+            "VIMNMX.U32": 3,
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+            "R2UR": 98,
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+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
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+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
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+            "R2UR": 32,
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+            "IMAD.X": 15,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "BRA": 9,
+            "LDC.64": 1,
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+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
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+            "R2UR": 34,
+            "LDG.E.64": 22,
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+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
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+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
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+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
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+            "ISETP.GT.U32.AND": 2,
+            "ISETP.GT.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 2,
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+            "LOP3.LUT": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
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+            "ISETP.GE.U32.AND.EX": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "RET.REL.NODEC": 1,
+            "NOP": 14
+          },
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "memory-combined",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,gvn,memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_seconds": 0.8250974879999831,
+      "total_seconds": 2.348144542,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 219383,
+      "ir_definitions": 10,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "ptx_sha256": "cf300fae8780b140c476f40c40e1ca4f3a81900f2fb39e79ddfb75650e4b66a2",
+      "sass_sha256": "0c4deecb105ad0e83cd94193fee3eb3f1c1174f4089c37d6d1f02272aea0c97a",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 19,
+      "helpers": {
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
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+            "BRA": 28,
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+            "VIMNMX.U32": 3,
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+            "IMAD.MOV": 6,
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+            "UIADD3.X": 3,
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+            "R2UR": 98,
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+            "BSYNC.RECONVERGENT": 6,
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+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "VIMNMX.U32": 1,
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+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
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+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IMAD.X": 15,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
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+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
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+            "LDG.E.64": 22,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
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+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "LDC.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
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+            "ISETP.GT.U32.AND": 2,
+            "ISETP.GT.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 2,
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+            "LOP3.LUT": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "IADD3": 2,
+            "IMAD.X": 2,
+            "RET.REL.NODEC": 1,
+            "NOP": 14
+          },
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      }
+    },
+    {
+      "name": "inline-threshold-0",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [
+        "-inline-threshold=0",
+        "-inlinehint-threshold=0"
+      ],
+      "opt_seconds": 0.5684845789999713,
+      "total_seconds": 2.123109602999989,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 205995,
+      "ir_definitions": 18,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "ptx_sha256": "f34bc3b4af9685fe364633253ffd06b18b7803dcd246c931cba26df00f33fc2f",
+      "sass_sha256": "b7a6578e69048175ce68e1dcc0ee8ff799038776b0a268da05f191f4d440126d",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 18,
+      "helpers": {
+        "": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
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+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
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+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 18,
+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "BSSY.RECONVERGENT": 2,
+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 21,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
+            "IMAD.SHL.U32": 14,
+            "IADD3": 27,
+            "IADD3.X": 9,
+            "IMAD.X": 18,
+            "VIADD": 18,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
+            "BSSY.RECONVERGENT": 2,
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+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
+            "ISETP.GT.U32.AND": 1,
+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
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+            "CS2R": 1,
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+            "ISETP.LT.U32.AND": 2,
+            "LOP3.LUT": 2,
+            "ISETP.LT.U32.AND.EX": 2,
+            "IADD3": 3,
+            "IMAD.X": 3,
+            "BRA": 5,
+            "BSYNC.RECONVERGENT": 2,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "LDC.64": 1,
+            "LDCU.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      }
+    },
+    {
+      "name": "inline-threshold-50",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [
+        "-inline-threshold=50",
+        "-inlinehint-threshold=50"
+      ],
+      "opt_seconds": 0.7042207679999706,
+      "total_seconds": 2.269854228999975,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 208564,
+      "ir_definitions": 11,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "ptx_sha256": "9a21aeb6452b85a42f0a0af662bec0ffcd11ada25264eff22197e506236f6503",
+      "sass_sha256": "6570dc0181a77ee583b77c0a0f1dd15782efaeda915f1628a005c2305255d425",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 18,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
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+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
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+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
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+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "ISETP.GE.U32.AND": 3,
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+            "VIMNMX.U32": 1,
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+            "LDCU.64": 1,
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+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "BRA": 9,
+            "LDC.64": 1,
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+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
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+            "IMAD.X": 18,
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+            "LEA": 1,
+            "LEA.HI.X": 1,
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+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "IMAD.MOV.U32": 16,
+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "7stepped": {
+          "opcode_histogram": {
+            "VIMNMX.U32": 1,
+            "LDCU.64": 1,
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+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "BSSY.RECONVERGENT": 2,
+            "VIMNMX.U32": 1,
+            "CS2R": 1,
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+            "ISETP.LT.U32.AND": 2,
+            "LOP3.LUT": 2,
+            "ISETP.LT.U32.AND.EX": 2,
+            "IADD3": 3,
+            "IMAD.X": 3,
+            "BRA": 5,
+            "BSYNC.RECONVERGENT": 2,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "LDC.64": 1,
+            "LDCU.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      }
+    },
+    {
+      "name": "inline-threshold-450",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [
+        "-inline-threshold=450",
+        "-inlinehint-threshold=450"
+      ],
+      "opt_seconds": 0.75107974499997,
+      "total_seconds": 2.286789821999946,
+      "status": "compiled_and_assembled",
+      "ir_bytes": 228717,
+      "ir_definitions": 10,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "ptx_sha256": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+      "sass_sha256": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625",
+      "sha256_non_nop_instructions": 1623,
+      "filtered_registers": 18,
+      "helpers": {
+        "": {
+          "opcode_histogram": {
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+            "S2R": 1,
+            "S2UR": 1,
+            "LDCU": 1,
+            "IMAD": 1,
+            "ISETP.GE.U32.AND": 10,
+            "EXIT": 2,
+            "LDC.64": 12,
+            "LDCU.64": 8,
+            "IMAD.WIDE.U32": 9,
+            "LDG.E": 2,
+            "MOV": 3,
+            "CALL.REL.NOINC": 3,
+            "IMAD.MOV.U32": 52,
+            "STG.E.64": 3,
+            "ISETP.NE.U32.AND": 26,
+            "BSSY.RECONVERGENT": 6,
+            "BRA": 28,
+            "BSSY.RELIABLE": 9,
+            "VIMNMX.U32": 3,
+            "LOP3.LUT": 35,
+            "IMAD.MOV": 6,
+            "UIADD3": 3,
+            "UIADD3.X": 3,
+            "IMAD.U32": 6,
+            "R2UR": 98,
+            "LDG.E.64": 64,
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+            "IADD3.X": 17,
+            "VIADD": 30,
+            "IMAD.X": 48,
+            "BSYNC.RECONVERGENT": 6,
+            "BREAK.RELIABLE": 9,
+            "BSYNC.RELIABLE": 9,
+            "WARPSYNC.ALL": 3,
+            "RET.REL.NODEC": 3,
+            "IMAD.SHL.U32": 14,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "SEL": 11,
+            "NOP": 10
+          },
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "6direct": {
+          "opcode_histogram": {
+            "ISETP.NE.U32.AND": 10,
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+            "BRA": 9,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
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+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "8observed": {
+          "opcode_histogram": {
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+            "IMAD.MOV.U32": 16,
+            "BRA": 9,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
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+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 34,
+            "LDG.E.64": 22,
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+            "IADD3.X": 9,
+            "IMAD.X": 18,
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+            "LEA.HI.X": 1,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "SEL": 11,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "9preserved": {
+          "opcode_histogram": {
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+            "BRA": 10,
+            "LDC.64": 4,
+            "ISETP.GE.U32.AND": 3,
+            "BSSY.RELIABLE": 3,
+            "VIMNMX.U32": 1,
+            "LOP3.LUT": 7,
+            "LDCU.64": 1,
+            "IMAD.MOV": 2,
+            "UIADD3": 1,
+            "UIADD3.X": 1,
+            "IMAD.U32": 2,
+            "R2UR": 32,
+            "LDG.E.64": 21,
+            "IADD3": 19,
+            "IADD3.X": 4,
+            "VIADD": 6,
+            "IMAD.X": 15,
+            "BSYNC.RECONVERGENT": 2,
+            "BREAK.RELIABLE": 3,
+            "BSYNC.RELIABLE": 3,
+            "IMAD.WIDE.U32": 3,
+            "WARPSYNC.ALL": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "7stepped": {
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+            "IMAD.MOV.U32": 9,
+            "IADD3": 6,
+            "SEL": 2,
+            "IMAD.X": 4,
+            "LOP3.LUT": 1,
+            "SHF.R.U64": 1,
+            "SHF.R.U32.HI": 1,
+            "ISETP.NE.U32.AND": 2,
+            "ISETP.NE.U32.AND.EX": 2,
+            "BRA": 3,
+            "LDC.64": 1,
+            "ISETP.GE.U32.AND": 1,
+            "IADD3.X": 2,
+            "ISETP.GE.U32.AND.EX": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "BPT.TRAP": 1
+          },
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "8filtered": {
+          "opcode_histogram": {
+            "BSSY.RECONVERGENT": 2,
+            "VIMNMX.U32": 1,
+            "CS2R": 1,
+            "IMAD.MOV.U32": 14,
+            "ISETP.LT.U32.AND": 2,
+            "LOP3.LUT": 2,
+            "ISETP.LT.U32.AND.EX": 2,
+            "IADD3": 3,
+            "IMAD.X": 3,
+            "BRA": 5,
+            "BSYNC.RECONVERGENT": 2,
+            "ISETP.GE.U32.AND": 2,
+            "ISETP.GE.U32.AND.EX": 2,
+            "LDC.64": 1,
+            "LDCU.64": 1,
+            "R2UR": 2,
+            "LEA": 1,
+            "LEA.HI.X": 1,
+            "LDG.E.64": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      }
+    }
+  ]
+}
diff --git a/examples/ptx_export/evidence/inline-scalar-apple.json b/examples/ptx_export/evidence/inline-scalar-apple.json
new file mode 100644
index 00000000..abb1ee6c
--- /dev/null
+++ b/examples/ptx_export/evidence/inline-scalar-apple.json
@@ -0,0 +1,36 @@
+{
+  "run": 34788545905,
+  "mode": "offline inline-only (inline-scalar pipeline)",
+  "producer_note": "This run reused the prior cached backend; evidence describes the hashed offline replay PTX, not validation of new backend source.",
+  "consumer": "CuMetal generic PTX lowering",
+  "device": "Apple M5",
+  "nvidia_execution": false,
+  "performance_measurement": false,
+  "sha256": {
+    "ptx": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+    "cumetalc": "5d6dfdb0b26231d991226cf98d5d565c05e1a92cd374d2a1e71453a83531f45e",
+    "libcumetal": "a101fdff598e160af5ec6e9d5fffdb65b88bb19f47a9ae8364224abed1a7fdb0",
+    "vector_sha_runner": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448",
+    "vector_sha_harness": "bd62e6f8e55770f677697eb546569479a637796afc3bfa5e23e3821b57204992",
+    "guarded_runner": "165cad8e45b1fdc9f9c41ed2a69ae4fe3fc9d0d940b876aedd821c8ef87d8286"
+  },
+  "results": {
+    "vector_add": [
+      "NUMERICAL_PASS kernel=rust_vecadd count=1",
+      "NUMERICAL_PASS kernel=rust_vecadd count=31",
+      "NUMERICAL_PASS kernel=rust_vecadd count=32",
+      "NUMERICAL_PASS kernel=rust_vecadd count=33",
+      "NUMERICAL_PASS kernel=rust_vecadd count=257"
+    ],
+    "sha256": [
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=1",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=31",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=32",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=33",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=257"
+    ],
+    "guarded_select": [
+      "NUMERICAL_PASS rust_guarded_select: 1608 cases, independent oracle and guards; device=Apple M5 driver=/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib"
+    ]
+  }
+}
diff --git a/examples/ptx_export/evidence/llvm19-filtered-helper.ptx b/examples/ptx_export/evidence/llvm19-filtered-helper.ptx
new file mode 100644
index 00000000..2437de13
--- /dev/null
+++ b/examples/ptx_export/evidence/llvm19-filtered-helper.ptx
@@ -0,0 +1,41 @@
+// Exact helper definition extracted from CI run 34783117581.
+// This is an inspection fixture, not a standalone launchable module.
+// Full PTX SHA-256: d97b462c4c17e9390b82f676d39d3359dd5a438598b10382fef8705ab9379f37
+.func  (.param .b64 func_retval0) _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered(
+	.param .b64 _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered_param_0,
+	.param .b32 _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered_param_1
+)
+{
+	.reg .pred 	%p<3>;
+	.reg .b32 	%r<3>;
+	.reg .b64 	%rd<12>;
+
+	ld.param.b64 	%rd4, [_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered_param_0];
+	ld.param.b32 	%r1, [_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered_param_1];
+	cvta.to.global.u64 	%rd1, %rd4;
+	min.u32 	%r2, %r1, 64;
+	cvt.u64.u32 	%rd2, %r2;
+	mov.b64 	%rd10, 0;
+	mov.b64 	%rd9, %rd10;
+$L__BB1_1:
+	setp.ge.u64 	%p1, %rd10, %rd2;
+	@%p1 bra 	$L__BB1_4;
+	add.s64 	%rd3, %rd10, 1;
+	and.b64 	%rd5, %rd10, 1;
+	setp.ne.b64 	%p2, %rd5, 0;
+	selp.b64 	%rd11, %rd10, %rd11, %p2;
+	mov.b64 	%rd10, %rd3;
+	@%p2 bra 	$L__BB1_3;
+	bra.uni 	$L__BB1_1;
+$L__BB1_3:
+	shl.b64 	%rd6, %rd11, 3;
+	add.s64 	%rd7, %rd1, %rd6;
+	ld.global.b64 	%rd8, [%rd7];
+	add.s64 	%rd9, %rd8, %rd9;
+	mov.b64 	%rd10, %rd3;
+	bra.uni 	$L__BB1_1;
+$L__BB1_4:
+	st.param.b64 	[func_retval0], %rd9;
+	ret;
+
+}
diff --git a/examples/ptx_export/evidence/module-scalar-apple.json b/examples/ptx_export/evidence/module-scalar-apple.json
new file mode 100644
index 00000000..2ce56d73
--- /dev/null
+++ b/examples/ptx_export/evidence/module-scalar-apple.json
@@ -0,0 +1,35 @@
+{
+  "run": 34787242514,
+  "mode": "module-scalar",
+  "consumer": "CuMetal generic PTX lowering",
+  "device": "Apple M5",
+  "nvidia_execution": false,
+  "performance_measurement": false,
+  "sha256": {
+    "ptx": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+    "cumetalc": "d6ef847eb73cb40d6c54b83503a2a7e7d44d6eab51853ed1fa518483538b72a1",
+    "libcumetal": "0da70ad5cd41355c3ecb69d8e0671e504551e358f90f9514a4db13c8d9681610",
+    "vector_sha_runner": "bd62e6f8e55770f677697eb546569479a637796afc3bfa5e23e3821b57204992",
+    "vector_sha_harness": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448",
+    "guarded_runner": "165cad8e45b1fdc9f9c41ed2a69ae4fe3fc9d0d940b876aedd821c8ef87d8286"
+  },
+  "results": {
+    "vector_add": [
+      "NUMERICAL_PASS kernel=rust_vecadd count=1",
+      "NUMERICAL_PASS kernel=rust_vecadd count=31",
+      "NUMERICAL_PASS kernel=rust_vecadd count=32",
+      "NUMERICAL_PASS kernel=rust_vecadd count=33",
+      "NUMERICAL_PASS kernel=rust_vecadd count=257"
+    ],
+    "sha256": [
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=1",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=31",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=32",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=33",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=257"
+    ],
+    "guarded_select": [
+      "NUMERICAL_PASS rust_guarded_select: 1608 cases, independent oracle and guards; device=Apple M5 driver=/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib"
+    ]
+  }
+}
diff --git a/examples/ptx_export/evidence/optimization-final.json b/examples/ptx_export/evidence/optimization-final.json
new file mode 100644
index 00000000..89261f47
--- /dev/null
+++ b/examples/ptx_export/evidence/optimization-final.json
@@ -0,0 +1,5523 @@
+{
+  "run_url": "https://github.com/brandonros/Rust-CUDA/actions/runs/34789945556",
+  "source_commit": "11f26a438c47a2afaf472dcd108c077924d1f0c0",
+  "backend_sha256": "fe99352dc6af56df65435e6d8341822755e8c74f8c52514efa18c2e2012e4da7",
+  "baseline": {
+    "ptx_bytes": 106204,
+    "cubin_bytes": 57984,
+    "entries": {
+      "rust_vecadd": {
+        "non_nop": 21,
+        "selects": 0,
+        "loads": 9,
+        "stores": 1,
+        "calls": 0
+      },
+      "rust_sha256_32": {
+        "non_nop": 1623,
+        "selects": 0,
+        "loads": 45,
+        "stores": 71,
+        "calls": 0
+      },
+      "rust_guarded_select": {
+        "non_nop": 614,
+        "selects": 11,
+        "loads": 89,
+        "stores": 3,
+        "calls": 3
+      },
+      "rust_filtered_select": {
+        "non_nop": 103,
+        "selects": 4,
+        "loads": 13,
+        "stores": 2,
+        "calls": 2
+      }
+    },
+    "symbols": {
+      "rust_vecadd": {
+        "non_nop_instructions": 21,
+        "scope": "entry_including_helpers",
+        "end_label": ".L_x_56"
+      },
+      "rust_sha256_32": {
+        "non_nop_instructions": 1623,
+        "scope": "entry_including_helpers",
+        "end_label": ".L_x_57"
+      },
+      "rust_guarded_select": {
+        "non_nop_instructions": 614,
+        "scope": "entry_including_helpers",
+        "end_label": ".L_x_53"
+      },
+      "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+        "non_nop_instructions": 174,
+        "scope": "helper",
+        "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+      },
+      "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+        "non_nop_instructions": 238,
+        "scope": "helper",
+        "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+      },
+      "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+        "non_nop_instructions": 173,
+        "scope": "helper",
+        "end_label": ".L_x_53"
+      },
+      "rust_filtered_select": {
+        "non_nop_instructions": 103,
+        "scope": "entry_including_helpers",
+        "end_label": ".L_x_55"
+      },
+      "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+        "non_nop_instructions": 46,
+        "scope": "helper",
+        "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+      },
+      "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+        "non_nop_instructions": 28,
+        "scope": "helper",
+        "end_label": ".L_x_55"
+      }
+    },
+    "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:17 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+    "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.017 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.838 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 22.990 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 17 registers, used 0 barriers\nptxas info    : Compile time = 5.557 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+    "hashes": {
+      "final-module.ll": "04a2316664236dfdc9842c38c76b7c40ffd4ec9fa507f9a33ff7ca93c75c16cc",
+      "rust_kernels.ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+      "rust_kernels.cubin": "d4d4bad56fe1566f987d6dc906d86a7917466def28952491c2b65b22ab4640bb",
+      "sass.txt": "8d474156fc6f2ce503ebff55efd5dc86520ff66ed222674e6e553ddea02c43d4"
+    },
+    "ir_bytes": 13851120,
+    "ir_definitions": 3299
+  },
+  "small_sweep": {
+    "baseline": {
+      "name": "baseline",
+      "passes": "verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/baseline/module.bc"
+      ],
+      "opt_seconds": 0.6423442800000032,
+      "matches_original_function_bodies": true,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 4,
+            "setp.ge.u64": 1,
+            "bra": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "selp.b64": 1,
+            "bra.uni": 2,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd11, %rd10, %rd11, %p2;"
+          ]
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.954558509000009,
+      "ptx_bytes": 106204,
+      "cubin_bytes": 57984,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 103,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 103,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 28,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:17 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.015 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 67.144 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.054 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 17 registers, used 0 barriers\nptxas info    : Compile time = 5.587 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "a4583a3438e4e32f35324bbb49db3ecda46dcf7789a3ae319c83f5850196299e",
+        "rust_kernels.ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+        "rust_kernels.cubin": "d4d4bad56fe1566f987d6dc906d86a7917466def28952491c2b65b22ab4640bb",
+        "sass.txt": "8d474156fc6f2ce503ebff55efd5dc86520ff66ed222674e6e553ddea02c43d4"
+      },
+      "ir_bytes": 13107292,
+      "ir_definitions": 3299
+    },
+    "dce-only": {
+      "name": "dce-only",
+      "passes": "globaldce,verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/dce-only/module.bc"
+      ],
+      "opt_seconds": 0.35791343399998254,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 4,
+            "setp.ge.u64": 1,
+            "bra": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "selp.b64": 1,
+            "bra.uni": 2,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd11, %rd10, %rd11, %p2;"
+          ]
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 1.9655828829999962,
+      "ptx_bytes": 106204,
+      "cubin_bytes": 57984,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 103,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 103,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 28,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:17 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.131 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 67.632 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.071 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 17 registers, used 0 barriers\nptxas info    : Compile time = 5.649 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "fe30829fc2214127c84df8e9a8cd3edbb5b2466d91460e083140f09e566e9678",
+        "rust_kernels.ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+        "rust_kernels.cubin": "d4d4bad56fe1566f987d6dc906d86a7917466def28952491c2b65b22ab4640bb",
+        "sass.txt": "8d474156fc6f2ce503ebff55efd5dc86520ff66ed222674e6e553ddea02c43d4"
+      },
+      "ir_bytes": 257877,
+      "ir_definitions": 93
+    },
+    "local-cleanup": {
+      "name": "local-cleanup",
+      "passes": "function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/local-cleanup/module.bc"
+      ],
+      "opt_seconds": 1.6168752320000124,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 7,
+            "max.u64": 1,
+            "setp.eq.b64": 1,
+            "bra": 3,
+            "add.s64": 3,
+            "and.b64": 2,
+            "setp.ne.b64": 2,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 3.6496798500000125,
+      "ptx_bytes": 106352,
+      "cubin_bytes": 58240,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 115,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_56"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 115,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_58"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 42,
+          "scope": "helper",
+          "end_label": ".L_x_58"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:16 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.121 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.867 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.001 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 16 registers, used 0 barriers\nptxas info    : Compile time = 5.696 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "c39f848ec313c188966f5f37c379054933b99536c32bdabf41df3749456aa66e",
+        "rust_kernels.ptx": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+        "rust_kernels.cubin": "81d24c229d924054832e86476d7c91bf32df414c984100ce79904a0280236a9f",
+        "sass.txt": "1dc72e0571108773ead3aa2a8b1f8ba454c5f2b44c731a3abd9a2f9241b25dfa"
+      },
+      "ir_bytes": 8315841,
+      "ir_definitions": 3299
+    },
+    "inline-only": {
+      "name": "inline-only",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/inline-only/module.bc"
+      ],
+      "opt_seconds": 0.6868771540000012,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.ge.u64": 1,
+            "setp.lt.u64": 1,
+            "selp.b64": 1,
+            "add.s64": 3,
+            "bra": 2,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.0924101819999805,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 114,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 114,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:19 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.083 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.655 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.344 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 5.754 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "40279a9cd8f5ed8baa755128264252409dde0c17450fbc9fa309c687ed9e2769",
+        "rust_kernels.ptx": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+        "rust_kernels.cubin": "0e5da5af1d382319fd96c59e36eedc58f3693f995ef8dfdefb7a94a2e18dafc7",
+        "sass.txt": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc"
+      },
+      "ir_bytes": 231893,
+      "ir_definitions": 10
+    },
+    "inline-cleanup": {
+      "name": "inline-cleanup",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/inline-cleanup/module.bc"
+      ],
+      "opt_seconds": 0.7025242530000071,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.lt.u64": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "and.pred": 1,
+            "bra": 2,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.102850576999998,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 124,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_61"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 124,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.031 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.576 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.115 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 5.964 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "b540efc0931a1456e6258d305c75d2cb104496ef95210c84e7ac2cca10acabd6",
+        "rust_kernels.ptx": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+        "rust_kernels.cubin": "7b4eb6f8497cdad9debaa7d564bdcdd23852b591be3689c091fa54073d37fdbe",
+        "sass.txt": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625"
+      },
+      "ir_bytes": 228711,
+      "ir_definitions": 10
+    },
+    "constrained-cleanup": {
+      "name": "constrained-cleanup",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),function(constraint-elimination,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),function(constraint-elimination,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/constrained-cleanup/module.bc"
+      ],
+      "opt_seconds": 0.7215026169999987,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.lt.u64": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "and.pred": 1,
+            "bra": 2,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.1265710270000113,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 124,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_61"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 124,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.072 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 69.345 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.229 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 5.994 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "033612a666d703925f1d71511dd227a5bd02e110f8d51334a71df493dc7c58b9",
+        "rust_kernels.ptx": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+        "rust_kernels.cubin": "7b4eb6f8497cdad9debaa7d564bdcdd23852b591be3689c091fa54073d37fdbe",
+        "sass.txt": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625"
+      },
+      "ir_bytes": 227792,
+      "ir_definitions": 10
+    },
+    "cfg-no-final": {
+      "name": "cfg-no-final",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/cfg-no-final/module.bc"
+      ],
+      "opt_seconds": 0.7044020699999862,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.lt.u64": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "and.pred": 1,
+            "bra": 2,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.1317250330000093,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 124,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_61"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 124,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.055 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.453 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.290 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 5.997 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "8f2b8e4b7a0fb59a5234defb8d1919ad42721648d58fdf209fdff0c68755cbbc",
+        "rust_kernels.ptx": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+        "rust_kernels.cubin": "7b4eb6f8497cdad9debaa7d564bdcdd23852b591be3689c091fa54073d37fdbe",
+        "sass.txt": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625"
+      },
+      "ir_bytes": 229676,
+      "ir_definitions": 10
+    },
+    "cfg-before-combine": {
+      "name": "cfg-before-combine",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,simplifycfg,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,simplifycfg,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/cfg-before-combine/module.bc"
+      ],
+      "opt_seconds": 0.70725987900002,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.lt.u64": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "and.pred": 1,
+            "bra": 2,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.1132689670000104,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 124,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_61"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 124,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.056 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.923 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.158 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 6.026 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "1850734d3709e78bb5c0a6617d0c16bf90e65f5679320c02ec30593e7af6e7ec",
+        "rust_kernels.ptx": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+        "rust_kernels.cubin": "7b4eb6f8497cdad9debaa7d564bdcdd23852b591be3689c091fa54073d37fdbe",
+        "sass.txt": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625"
+      },
+      "ir_bytes": 228607,
+      "ir_definitions": 10
+    },
+    "cfg-no-both": {
+      "name": "cfg-no-both",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/cfg-no-both/module.bc"
+      ],
+      "opt_seconds": 0.7012717609999868,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.ge.u64": 1,
+            "setp.lt.u64": 1,
+            "selp.b64": 1,
+            "add.s64": 3,
+            "bra": 2,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.11072244799999,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 114,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 114,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:19 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.078 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 68.848 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.235 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 5.792 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "111be274632207bb634a58dc9babf379a2e93045c0096b2cf598f60f1fce3c16",
+        "rust_kernels.ptx": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+        "rust_kernels.cubin": "0e5da5af1d382319fd96c59e36eedc58f3693f995ef8dfdefb7a94a2e18dafc7",
+        "sass.txt": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc"
+      },
+      "ir_bytes": 287158,
+      "ir_definitions": 10
+    },
+    "dce-scalar": {
+      "name": "dce-scalar",
+      "passes": "globaldce,function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/dce-scalar/module.bc"
+      ],
+      "opt_seconds": 0.3624288960000115,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 7,
+            "max.u64": 1,
+            "setp.eq.b64": 1,
+            "bra": 3,
+            "add.s64": 3,
+            "and.b64": 2,
+            "setp.ne.b64": 2,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.0134070200000167,
+      "ptx_bytes": 106352,
+      "cubin_bytes": 58240,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 115,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_56"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 115,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_58"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 42,
+          "scope": "helper",
+          "end_label": ".L_x_58"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:16 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.015 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 67.220 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.132 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 16 registers, used 0 barriers\nptxas info    : Compile time = 5.983 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "6c93e0c0655cf11190bc5b9c8ca231177c53ac55b1282decc2dffe300f96fdae",
+        "rust_kernels.ptx": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+        "rust_kernels.cubin": "81d24c229d924054832e86476d7c91bf32df414c984100ce79904a0280236a9f",
+        "sass.txt": "1dc72e0571108773ead3aa2a8b1f8ba454c5f2b44c731a3abd9a2f9241b25dfa"
+      },
+      "ir_bytes": 223282,
+      "ir_definitions": 93
+    },
+    "memory-early-cse": {
+      "name": "memory-early-cse",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/memory-early-cse/module.bc"
+      ],
+      "opt_seconds": 0.7138613999999848,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.ge.u64": 1,
+            "setp.lt.u64": 1,
+            "selp.b64": 1,
+            "add.s64": 3,
+            "bra": 2,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.1196575059999816,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 114,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 114,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:19 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.084 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 67.718 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.597 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 5.907 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "9717a43eef5164a9631f9841cc85ae3987a2e523b7977f79ccf634e68407db9a",
+        "rust_kernels.ptx": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+        "rust_kernels.cubin": "0e5da5af1d382319fd96c59e36eedc58f3693f995ef8dfdefb7a94a2e18dafc7",
+        "sass.txt": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc"
+      },
+      "ir_bytes": 229111,
+      "ir_definitions": 10
+    },
+    "memory-gvn": {
+      "name": "memory-gvn",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(gvn,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(gvn,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/memory-gvn/module.bc"
+      ],
+      "opt_seconds": 0.7005220210000118,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.ge.u64": 1,
+            "setp.lt.u64": 1,
+            "selp.b64": 1,
+            "add.s64": 3,
+            "bra": 2,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.084433254000004,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 114,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 114,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:19 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.043 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.491 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.162 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 5.730 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "28a3ce0703145298bc3215ecbd4f715d38d16fbc85b3d55fd3e3834b9cf086d5",
+        "rust_kernels.ptx": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+        "rust_kernels.cubin": "0e5da5af1d382319fd96c59e36eedc58f3693f995ef8dfdefb7a94a2e18dafc7",
+        "sass.txt": "87a834a7c16f59ec1ac494a66178740f1ceb3c9388a917b848c3de4e846bbcbc"
+      },
+      "ir_bytes": 229868,
+      "ir_definitions": 10
+    },
+    "memory-stores": {
+      "name": "memory-stores",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/memory-stores/module.bc"
+      ],
+      "opt_seconds": 0.6963161269999887,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.ge.u64": 1,
+            "setp.lt.u64": 1,
+            "selp.b64": 1,
+            "add.s64": 3,
+            "bra": 2,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.0894440040000006,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 114,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 114,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:19 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.019 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.341 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.030 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 5.743 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "c1ab6253d2582a189c356840529c904f710a8e8f4f2378c3a8028840a213447b",
+        "rust_kernels.ptx": "cf300fae8780b140c476f40c40e1ca4f3a81900f2fb39e79ddfb75650e4b66a2",
+        "rust_kernels.cubin": "d4d66e16d450dd471932b891bd172b2c2480dd79ef5c122e67d29902a6a6107b",
+        "sass.txt": "0c4deecb105ad0e83cd94193fee3eb3f1c1174f4089c37d6d1f02272aea0c97a"
+      },
+      "ir_bytes": 224492,
+      "ir_definitions": 10
+    },
+    "memory-combined": {
+      "name": "memory-combined",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,gvn,memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,gvn,memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/memory-combined/module.bc"
+      ],
+      "opt_seconds": 0.6978214170000001,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.ge.u64": 1,
+            "setp.lt.u64": 1,
+            "selp.b64": 1,
+            "add.s64": 3,
+            "bra": 2,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.0755085469999983,
+      "ptx_bytes": 106100,
+      "cubin_bytes": 58232,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 114,
+          "selects": 4,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_56"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_53"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 114,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_55"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 40,
+          "scope": "helper",
+          "end_label": ".L_x_55"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:19 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.021 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.854 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.108 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 6.042 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "d1ef0b09f6507840cd31c4237ec715078b00858f913a7d3244f6b6e9b358c895",
+        "rust_kernels.ptx": "cf300fae8780b140c476f40c40e1ca4f3a81900f2fb39e79ddfb75650e4b66a2",
+        "rust_kernels.cubin": "d4d66e16d450dd471932b891bd172b2c2480dd79ef5c122e67d29902a6a6107b",
+        "sass.txt": "0c4deecb105ad0e83cd94193fee3eb3f1c1174f4089c37d6d1f02272aea0c97a"
+      },
+      "ir_bytes": 219383,
+      "ir_definitions": 10
+    },
+    "inline-threshold-0": {
+      "name": "inline-threshold-0",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [
+        "-inline-threshold=0",
+        "-inlinehint-threshold=0"
+      ],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+        "-verify-each",
+        "-inline-threshold=0",
+        "-inlinehint-threshold=0",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/inline-threshold-0/module.bc"
+      ],
+      "opt_seconds": 0.511086812000002,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.lt.u64": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "and.pred": 1,
+            "bra": 2,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 1.9388604840000028,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 124,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_61"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 124,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.059 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.568 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.140 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 5.952 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "38e922c19ed46ef428c02ca718a14de612024369e812916f41c949274c27b7e6",
+        "rust_kernels.ptx": "f34bc3b4af9685fe364633253ffd06b18b7803dcd246c931cba26df00f33fc2f",
+        "rust_kernels.cubin": "adfcac905a7a6978882c7dec4a3fc7cbbcd275b6aaa4744cd8614a5e307d5741",
+        "sass.txt": "b7a6578e69048175ce68e1dcc0ee8ff799038776b0a268da05f191f4d440126d"
+      },
+      "ir_bytes": 205995,
+      "ir_definitions": 18
+    },
+    "inline-threshold-50": {
+      "name": "inline-threshold-50",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [
+        "-inline-threshold=50",
+        "-inlinehint-threshold=50"
+      ],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+        "-verify-each",
+        "-inline-threshold=50",
+        "-inlinehint-threshold=50",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/inline-threshold-50/module.bc"
+      ],
+      "opt_seconds": 0.6741656359999979,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.lt.u64": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "and.pred": 1,
+            "bra": 2,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.1219773309999823,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 124,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_61"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 124,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.135 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.874 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.316 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 6.097 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "81f38bad21d40fb32aad9330c4703ec6bd7f455d9908312bd856cac3ab7f669a",
+        "rust_kernels.ptx": "9a21aeb6452b85a42f0a0af662bec0ffcd11ada25264eff22197e506236f6503",
+        "rust_kernels.cubin": "47714e31baac672289cacdeb4cb7a196294a132c64fb599248c60ed0e8480545",
+        "sass.txt": "6570dc0181a77ee583b77c0a0f1dd15782efaeda915f1628a005c2305255d425"
+      },
+      "ir_bytes": 208564,
+      "ir_definitions": 11
+    },
+    "inline-threshold-450": {
+      "name": "inline-threshold-450",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+      "opt_options": [
+        "-inline-threshold=450",
+        "-inlinehint-threshold=450"
+      ],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(correlated-propagation,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify",
+        "-verify-each",
+        "-inline-threshold=450",
+        "-inlinehint-threshold=450",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/cleanup-experiment/inline-threshold-450/module.bc"
+      ],
+      "opt_seconds": 0.7196417700000097,
+      "ptx_helpers": {
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "mov.b64": 3,
+            "setp.lt.u64": 2,
+            "add.s64": 3,
+            "and.b64": 1,
+            "setp.ne.b64": 1,
+            "not.pred": 1,
+            "and.pred": 1,
+            "bra": 2,
+            "st.param.b64": 1,
+            "ret": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "min.u32": 1,
+            "cvt.u64.u32": 1,
+            "setp.gt.u32": 1,
+            "add.s64": 7,
+            "selp.b64": 1,
+            "shr.u64": 1,
+            "and.b64": 1,
+            "setp.eq.b64": 2,
+            "mov.b64": 4,
+            "bra": 3,
+            "cvta.to.global.u64": 1,
+            "setp.lt.u64": 1,
+            "shl.b64": 1,
+            "ld.global.b64": 1,
+            "bra.uni": 1,
+            "st.param.b64": 1,
+            "ret": 1,
+            "trap": 1
+          },
+          "self_false_selects": []
+        },
+        "rust_guarded_select": {
+          "opcode_histogram": {
+            "ld.param.b64": 7,
+            "ld.param.b32": 1,
+            "mov.u32": 3,
+            "mad.lo.s32": 1,
+            "setp.lt.u32": 1,
+            "bra": 1,
+            "ret": 1,
+            "cvta.to.global.u64": 3,
+            "mul.wide.u32": 3,
+            "add.s64": 3,
+            "ld.global.b32": 1,
+            "ld.global.b64": 1,
+            "st.param.b32": 3,
+            "st.param.b64": 4,
+            "call.uni": 3,
+            "st.global.b64": 3,
+            "bra.uni": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "opcode_histogram": {
+            "ld.param.b64": 1,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 11,
+            "mov.b64": 3,
+            "bra": 22,
+            "and.b32": 7,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 27,
+            "ld.global.b64": 21,
+            "add.s32": 6,
+            "bra.uni": 1,
+            "mul.wide.u32": 3,
+            "setp.ne.b32": 8,
+            "not.pred": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": []
+        },
+        "_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "opcode_histogram": {
+            "ld.param.b64": 2,
+            "ld.param.b32": 1,
+            "cvta.to.global.u64": 1,
+            "min.u32": 1,
+            "setp.eq.b32": 5,
+            "mov.b64": 6,
+            "bra": 9,
+            "and.b32": 6,
+            "setp.lt.u32": 3,
+            "mov.b32": 2,
+            "neg.s32": 2,
+            "add.s64": 40,
+            "shl.b64": 15,
+            "and.b64": 15,
+            "ld.global.b64": 22,
+            "add.s32": 16,
+            "cvt.u64.u32": 14,
+            "bra.uni": 1,
+            "setp.ne.b32": 3,
+            "selp.b64": 13,
+            "setp.ne.b64": 1,
+            "st.param.b64": 1,
+            "ret": 1
+          },
+          "self_false_selects": [
+            "selp.b64 \t%rd110, %rd112, %rd110, %p11;"
+          ]
+        }
+      },
+      "status": "compiled_and_assembled",
+      "total_seconds": 2.1277615500000024,
+      "ptx_bytes": 106091,
+      "cubin_bytes": 58376,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1623,
+          "selects": 0,
+          "loads": 45,
+          "stores": 71,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 614,
+          "selects": 11,
+          "loads": 89,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 124,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_60"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1623,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_61"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 614,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_57"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 174,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 238,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 173,
+          "scope": "helper",
+          "end_label": ".L_x_57"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 124,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_59"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 46,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_59"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.074 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 66.561 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 23.173 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 6.027 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "de6331dc727d3401a6792e483549b8099671f315c6549ec1f7b056ffa0287b92",
+        "rust_kernels.ptx": "2fbc7b811189da47260c4da524292697f363d9df33adfaea37701ca2d7b3a7bf",
+        "rust_kernels.cubin": "7b4eb6f8497cdad9debaa7d564bdcdd23852b591be3689c091fa54073d37fdbe",
+        "sass.txt": "22e8f042fed139d291765a67ed36fbb474000dd63c9582dd4c7a62531765c625"
+      },
+      "ir_bytes": 228717,
+      "ir_definitions": 10
+    }
+  },
+  "size_builds": {
+    "size-s": {
+      "ptx_bytes": 96349,
+      "cubin_bytes": 66928,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 2009,
+          "selects": 1,
+          "loads": 118,
+          "stores": 170,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 405,
+          "selects": 8,
+          "loads": 42,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 130,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_53"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 2009,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_54"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 405,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_50"
+        },
+        "$rust_guarded_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 120,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 130,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 120,
+          "scope": "helper",
+          "end_label": ".L_x_50"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 130,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_52"
+        },
+        "$rust_filtered_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 52,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_52"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:320 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:24 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.019 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    320 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 320 bytes cumulative stack size\nptxas info    : Compile time = 94.708 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 24 registers, used 0 barriers\nptxas info    : Compile time = 16.497 ms\nptxas info    : Function properties for _RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 6.001 ms\nptxas info    : Function properties for _RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsjr2Ab7Mep8T_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "27423475fac15d92a57f37576a089fb4dfa2db183a1d305783746801eeddd753",
+        "rust_kernels.ptx": "12816f04fe6378c3a6aca22340aa3ebbd6bddf79e8ddb5e4a4fb11a417af2ad6",
+        "rust_kernels.cubin": "38c79bcc1490c074059cc7ba9e25306142e73f2401ff773aabfed00f00abb02d",
+        "sass.txt": "476af41fbd9d7505c5b00a36ae13d82e9767c977bb2dbb472e9cad04ded08186"
+      },
+      "ir_bytes": 252569,
+      "ir_definitions": 14,
+      "host_oracle": {
+        "input_sha256": "27423475fac15d92a57f37576a089fb4dfa2db183a1d305783746801eeddd753",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "x86_64-unknown-linux-gnu",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      }
+    },
+    "size-z": {
+      "ptx_bytes": 94320,
+      "cubin_bytes": 60008,
+      "entries": {
+        "rust_vecadd": {
+          "non_nop": 21,
+          "selects": 0,
+          "loads": 9,
+          "stores": 1,
+          "calls": 0
+        },
+        "rust_sha256_32": {
+          "non_nop": 1920,
+          "selects": 0,
+          "loads": 115,
+          "stores": 161,
+          "calls": 0
+        },
+        "rust_guarded_select": {
+          "non_nop": 127,
+          "selects": 7,
+          "loads": 18,
+          "stores": 3,
+          "calls": 3
+        },
+        "rust_filtered_select": {
+          "non_nop": 128,
+          "selects": 2,
+          "loads": 13,
+          "stores": 2,
+          "calls": 2
+        }
+      },
+      "symbols": {
+        "rust_vecadd": {
+          "non_nop_instructions": 21,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_30"
+        },
+        "rust_sha256_32": {
+          "non_nop_instructions": 1920,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_31"
+        },
+        "rust_guarded_select": {
+          "non_nop_instructions": 127,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_27"
+        },
+        "$rust_guarded_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select6direct": {
+          "non_nop_instructions": 27,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select8observed"
+        },
+        "$rust_guarded_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select8observed": {
+          "non_nop_instructions": 33,
+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select9preserved"
+        },
+        "$rust_guarded_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select9preserved": {
+          "non_nop_instructions": 28,
+          "scope": "helper",
+          "end_label": ".L_x_27"
+        },
+        "rust_filtered_select": {
+          "non_nop_instructions": 128,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_29"
+        },
+        "$rust_filtered_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select7stepped": {
+          "non_nop_instructions": 52,
+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select8filtered": {
+          "non_nop_instructions": 49,
+          "scope": "helper",
+          "end_label": ".L_x_29"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:39 STACK:320 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:18 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.051 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    320 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 39 registers, used 0 barriers, 320 bytes cumulative stack size\nptxas info    : Compile time = 93.524 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 6.104 ms\nptxas info    : Function properties for _RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 5.872 ms\nptxas info    : Function properties for _RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsdSWdmPcoVFP_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "064723e6b256ab1dc83617a742d8aade2fa8a24acf06e1cd80911e9bcd015f37",
+        "rust_kernels.ptx": "2db6178ad724a88603a77362dc502b33a4f1c211605e1554de70c52f6f5726af",
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+        "host_triple": "x86_64-unknown-linux-gnu",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
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+          "scope": "helper",
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+          "scope": "entry_including_helpers",
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+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed"
+        },
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+          "scope": "helper",
+          "end_label": "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved"
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+          "scope": "helper",
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+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_58"
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+          "scope": "helper",
+          "end_label": "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered"
+        },
+        "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
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+          "scope": "helper",
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+        }
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+      "resources": "\nResource usage:\n Common:\n  GLOBAL:0\n Function rust_vecadd:\n  REG:12 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_sha256_32:\n  REG:40 STACK:112 SHARED:0 LOCAL:0 CONSTANT[0]:916 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_guarded_select:\n  REG:32 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:932 TEXTURE:0 SURFACE:0 SAMPLER:0\n Function rust_filtered_select:\n  REG:16 STACK:0 SHARED:0 LOCAL:0 CONSTANT[0]:924 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
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+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/baseline/module.bc"
+      ],
+      "opt_seconds": 0.7592055380000033,
+      "matches_original_function_bodies": true,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 12.452523774000042,
+      "ptx_bytes": 1481081,
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+          "stores": 433,
+          "calls": 7
+        }
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+      "symbols": {
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+          "non_nop_instructions": 39738,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "non_nop_instructions": 5,
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+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
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+          "scope": "entry_including_helpers",
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+        },
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+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
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+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 216 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3671.872 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
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+        "-passes=globaldce,verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/dce-only/module.bc"
+      ],
+      "opt_seconds": 0.44249966699999277,
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+      "status": "compiled_and_assembled",
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+      "ptx_bytes": 1481081,
+      "cubin_bytes": 739480,
+      "entries": {
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+        }
+      },
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+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
+        },
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+        },
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+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:216 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
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+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/inline-only/module.bc"
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+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
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+        },
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+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 180 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3514.331 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
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+      "opt_options": [],
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+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/memory-early-cse/module.bc"
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+        },
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+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3601.043 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
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+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
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+        },
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+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:178 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3664.887 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "e431f1410516b673a9b9536ffa2ad14ce5b5cee78c8d2a8b9564c60cfa13cdae",
+        "rust_kernels.ptx": "a57cc6320ccb23d9db1fc34a8f96721da84ebdc239e2d3b034935b5015d3557e",
+        "rust_kernels.cubin": "e2438014642756be6c4e80540269201aa819a935ac8c428d6ffbf8126c2b0b7f",
+        "sass.txt": "a6a8dab3feaeb1c0b4d61473d0780b9e3ea97e02bcfe0a13e94bf20c1240539e"
+      },
+      "ir_bytes": 608821,
+      "ir_definitions": 7
+    },
+    "memory-stores": {
+      "name": "memory-stores",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/memory-stores/module.bc"
+      ],
+      "opt_seconds": 1.6635178219999602,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 10.341689492,
+      "ptx_bytes": 1301076,
+      "cubin_bytes": 715800,
+      "entries": {
+        "kernel_find_solana_vanity_private_key": {
+          "non_nop": 38430,
+          "selects": 2503,
+          "loads": 288,
+          "stores": 436,
+          "calls": 7
+        }
+      },
+      "symbols": {
+        "kernel_find_solana_vanity_private_key": {
+          "non_nop_instructions": 38430,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants23ED25519_BASEPOINT_TABLE": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:178 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3597.620 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "335dfd6f9910e83ebef22dc66590f810e0b1925f177978dab01f9c148ab45505",
+        "rust_kernels.ptx": "6f0144acfc47cd5e2da4c91218cec8ce9ac29802fa844806728e7b3e027c090a",
+        "rust_kernels.cubin": "040f85f9dc2753b460873e7cea1bfe64e6952b360ab552a9fa6ef6e1eed0bfd7",
+        "sass.txt": "1b5917352921efd2715cc4e277ce32ebdd922407e74ed067781eef999dcd57a5"
+      },
+      "ir_bytes": 631267,
+      "ir_definitions": 7
+    },
+    "memory-combined": {
+      "name": "memory-combined",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,gvn,memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,gvn,memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/memory-combined/module.bc"
+      ],
+      "opt_seconds": 1.694691712000008,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 10.265371465000044,
+      "ptx_bytes": 1301076,
+      "cubin_bytes": 715800,
+      "entries": {
+        "kernel_find_solana_vanity_private_key": {
+          "non_nop": 38430,
+          "selects": 2503,
+          "loads": 288,
+          "stores": 436,
+          "calls": 7
+        }
+      },
+      "symbols": {
+        "kernel_find_solana_vanity_private_key": {
+          "non_nop_instructions": 38430,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants23ED25519_BASEPOINT_TABLE": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:178 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3595.293 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "e53b3959fa3ad29585308bc8bb544ea353a654a3dfd8fdb6f071bc6b83e13ccf",
+        "rust_kernels.ptx": "6f0144acfc47cd5e2da4c91218cec8ce9ac29802fa844806728e7b3e027c090a",
+        "rust_kernels.cubin": "040f85f9dc2753b460873e7cea1bfe64e6952b360ab552a9fa6ef6e1eed0bfd7",
+        "sass.txt": "1b5917352921efd2715cc4e277ce32ebdd922407e74ed067781eef999dcd57a5"
+      },
+      "ir_bytes": 594746,
+      "ir_definitions": 7
+    }
+  },
+  "integrated_small": [
+    {
+      "mode": "inline-scalar",
+      "matches_replay_function_bodies": true,
+      "host_oracle": {
+        "input_sha256": "58e0a29aab3abb75208927615183eaa7c15c75baa092b5d164406ecce1c0d7b3",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "x86_64-unknown-linux-gnu",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      }
+    },
+    {
+      "mode": "dce",
+      "matches_replay_function_bodies": true,
+      "definitions_before_after": [
+        3299,
+        93
+      ],
+      "host_oracle": {
+        "input_sha256": "4a947cf8666c618e979c337081cd6fa16820f4e09d7d922d7dcf131ba174d963",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "x86_64-unknown-linux-gnu",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      }
+    },
+    {
+      "mode": "scalar",
+      "matches_replay_function_bodies": true
+    },
+    {
+      "mode": "inline",
+      "matches_replay_function_bodies": true,
+      "ir_select_counts": {
+        "filtered": 0,
+        "observed": 1
+      },
+      "host_oracle": {
+        "input_sha256": "424794225dc0c3483e5303f39d2d3234a92df3bf9c9a8ccb9ebe46365b6afaa2",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "x86_64-unknown-linux-gnu",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      }
+    }
+  ],
+  "integrated_mining": [
+    {
+      "mode": "dce",
+      "matches_replay_function_bodies": true
+    },
+    {
+      "mode": "inline-scalar",
+      "matches_replay_function_bodies": true
+    }
+  ],
+  "nvidia_gpu_execution": false,
+  "performance_measurement": false,
+  "gpu_evidence_matches": [
+    {
+      "evidence": "inline-scalar-apple.json",
+      "final_artifact": "integrated-cleanup/inline-scalar/rust_kernels.ptx",
+      "sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+      "byte_identical": true
+    },
+    {
+      "evidence": "module-scalar-apple.json",
+      "final_artifact": "module-cleanup/module-scalar/rust_kernels.ptx",
+      "sha256": "e1cde840b57a32b9f37201af0512cf0d59d1f4da292dbab2e63a250efb75a6a7",
+      "byte_identical": true
+    },
+    {
+      "evidence": "size-s-apple.json",
+      "final_artifact": "size-builds/size-s/rust_kernels.ptx",
+      "sha256": "12816f04fe6378c3a6aca22340aa3ebbd6bddf79e8ddb5e4a4fb11a417af2ad6",
+      "byte_identical": true
+    },
+    {
+      "evidence": "size-z-apple.json",
+      "final_artifact": "size-builds/size-z/rust_kernels.ptx",
+      "sha256": "2db6178ad724a88603a77362dc502b33a4f1c211605e1554de70c52f6f5726af",
+      "byte_identical": true
+    }
+  ]
+}
diff --git a/examples/ptx_export/evidence/optimization-wave2.json b/examples/ptx_export/evidence/optimization-wave2.json
new file mode 100644
index 00000000..50157f70
--- /dev/null
+++ b/examples/ptx_export/evidence/optimization-wave2.json
@@ -0,0 +1,3230 @@
+{
+  "run": 34792081315,
+  "backend_commit": "6cefd7d3f92a71a3e19f5363441c5a7fbd2e7f62",
+  "nvidia_execution": false,
+  "runtime_performance_measured": false,
+  "workloads": {
+    "small": {
+      "comparison": {
+        "workload": "small",
+        "expected_entry_count": 4,
+        "default_matches_disabled_ptx": true,
+        "inline_scalar_matches_replay": true,
+        "nvidia_execution": false,
+        "ptx_sha256": {
+          "none": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+          "default": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+          "inline-scalar": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821"
+        }
+      },
+      "modes": {
+        "none": {
+          "ptx_bytes": 106204,
+          "cubin_bytes": 57984,
+          "hashes": {
+            "final-module.ll": "04a2316664236dfdc9842c38c76b7c40ffd4ec9fa507f9a33ff7ca93c75c16cc",
+            "rust_kernels.ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+            "rust_kernels.cubin": "d4d4bad56fe1566f987d6dc906d86a7917466def28952491c2b65b22ab4640bb",
+            "nvdisasm.txt": "03989129d419e2b1d0ac697157557202cc19ce1675406edeb00c5edeb774cfaf",
+            "ptxas-resource-report.txt": "44729b45e81904eeff210befde6bd9715a37b3d74b6406644b48a803722ac5b3"
+          },
+          "llvm_definitions": 3299,
+          "sass_symbols": {
+            "rust_vecadd": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 21
+            },
+            "rust_sha256_32": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 1623
+            },
+            "rust_guarded_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 614
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+              "scope": "helper",
+              "non_nop_instructions": 174
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+              "scope": "helper",
+              "non_nop_instructions": 238
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+              "scope": "helper",
+              "non_nop_instructions": 173
+            },
+            "rust_filtered_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 103
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+              "scope": "helper",
+              "non_nop_instructions": 46
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+              "scope": "helper",
+              "non_nop_instructions": 28
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 1.763 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 49.757 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 16.356 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 17 registers, used 0 barriers\nptxas info    : Compile time = 3.932 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "default": {
+          "ptx_bytes": 106204,
+          "cubin_bytes": 57984,
+          "hashes": {
+            "final-module.ll": "4a947cf8666c618e979c337081cd6fa16820f4e09d7d922d7dcf131ba174d963",
+            "rust_kernels.ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+            "rust_kernels.cubin": "d4d4bad56fe1566f987d6dc906d86a7917466def28952491c2b65b22ab4640bb",
+            "nvdisasm.txt": "03989129d419e2b1d0ac697157557202cc19ce1675406edeb00c5edeb774cfaf",
+            "ptxas-resource-report.txt": "33f31d723f751b5a7d0a04d4f470f629a8196126aba388dd079ee714df6c2d91"
+          },
+          "llvm_definitions": 93,
+          "sass_symbols": {
+            "rust_vecadd": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 21
+            },
+            "rust_sha256_32": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 1623
+            },
+            "rust_guarded_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 614
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+              "scope": "helper",
+              "non_nop_instructions": 174
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+              "scope": "helper",
+              "non_nop_instructions": 238
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+              "scope": "helper",
+              "non_nop_instructions": 173
+            },
+            "rust_filtered_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 103
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+              "scope": "helper",
+              "non_nop_instructions": 46
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+              "scope": "helper",
+              "non_nop_instructions": 28
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 54.088 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 51.910 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 17.952 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 17 registers, used 0 barriers\nptxas info    : Compile time = 3.988 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "inline-scalar": {
+          "ptx_bytes": 106100,
+          "cubin_bytes": 58232,
+          "hashes": {
+            "final-module.ll": "58e0a29aab3abb75208927615183eaa7c15c75baa092b5d164406ecce1c0d7b3",
+            "rust_kernels.ptx": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+            "rust_kernels.cubin": "0e5da5af1d382319fd96c59e36eedc58f3693f995ef8dfdefb7a94a2e18dafc7",
+            "nvdisasm.txt": "6239b420e6ac0932a954510a24643e9ab5d22cc99aca332740b3a3fadaed1a05",
+            "ptxas-resource-report.txt": "c43415cfc7617a37e75b8aeec845dae34fa2b5a731f8f22153919ff15a9bd85e"
+          },
+          "llvm_definitions": 10,
+          "sass_symbols": {
+            "rust_vecadd": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 21
+            },
+            "rust_sha256_32": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 1623
+            },
+            "rust_guarded_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 614
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+              "scope": "helper",
+              "non_nop_instructions": 174
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+              "scope": "helper",
+              "non_nop_instructions": 238
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+              "scope": "helper",
+              "non_nop_instructions": 173
+            },
+            "rust_filtered_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 114
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+              "scope": "helper",
+              "non_nop_instructions": 46
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+              "scope": "helper",
+              "non_nop_instructions": 40
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.489 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 51.047 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 16.341 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 4.069 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        }
+      },
+      "experiments": {
+        "inline-only": {
+          "ptx_bytes": 106100,
+          "cubin_bytes": 58232,
+          "hashes": {
+            "final-module.ll": "73a5b2c33058f948a43a0e9d3f381c2d625dd3b29e9215bae50885bb8da3f549",
+            "rust_kernels.ptx": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+            "rust_kernels.cubin": "0e5da5af1d382319fd96c59e36eedc58f3693f995ef8dfdefb7a94a2e18dafc7",
+            "nvdisasm.txt": "6239b420e6ac0932a954510a24643e9ab5d22cc99aca332740b3a3fadaed1a05",
+            "ptxas-resource-report.txt": "745301fa8865efc3afbe2e4bbd3639ac07e991c1d88b88c8a32765b56b5c2ab5"
+          },
+          "llvm_definitions": 10,
+          "sass_symbols": {
+            "rust_vecadd": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 21
+            },
+            "rust_sha256_32": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 1623
+            },
+            "rust_guarded_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 614
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+              "scope": "helper",
+              "non_nop_instructions": 174
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+              "scope": "helper",
+              "non_nop_instructions": 238
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+              "scope": "helper",
+              "non_nop_instructions": 173
+            },
+            "rust_filtered_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 114
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+              "scope": "helper",
+              "non_nop_instructions": 46
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+              "scope": "helper",
+              "non_nop_instructions": 40
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.192 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 49.208 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 16.457 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 4.076 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "tiny-loops": {
+          "ptx_bytes": 106029,
+          "cubin_bytes": 58232,
+          "hashes": {
+            "final-module.ll": "a0fbe965a15f8084452a0bbabd7bb57dc5be78ee0537b9945c94b27861e06db7",
+            "rust_kernels.ptx": "551de2b1b8a10c5d8dabd10bcf808123b45a2bed220d54b256ad4ebcb608da78",
+            "rust_kernels.cubin": "f8c3e6ba3f2f82dcdec719df0c2dde3cb2b64972b7b9015ada9548201370e154",
+            "nvdisasm.txt": "2394c4d6484ad96163491241baf531b1e751d51ee05b91e5c8498680fc0efe4b",
+            "ptxas-resource-report.txt": "9a45c729c4c3cc4041524dacdb239eb7300ad032cea093bd02b40d51d2b2b345"
+          },
+          "llvm_definitions": 10,
+          "sass_symbols": {
+            "rust_vecadd": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 21
+            },
+            "rust_sha256_32": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 1623
+            },
+            "rust_guarded_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 614
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+              "scope": "helper",
+              "non_nop_instructions": 174
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+              "scope": "helper",
+              "non_nop_instructions": 238
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+              "scope": "helper",
+              "non_nop_instructions": 173
+            },
+            "rust_filtered_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 114
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+              "scope": "helper",
+              "non_nop_instructions": 46
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+              "scope": "helper",
+              "non_nop_instructions": 40
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.192 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 52.508 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 18.437 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 19 registers, used 0 barriers\nptxas info    : Compile time = 4.580 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "correlated-tiny-loops": {
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+          "cubin_bytes": 58376,
+          "hashes": {
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+            "rust_kernels.ptx": "2e3be232386a22e74e7629c497defd9a0419dbe0b87d310803f189d66332f7f4",
+            "rust_kernels.cubin": "a7e054a1d749ddf23434943b333008f96ca0f05c7ad5e76baf6c147c7cc20a79",
+            "nvdisasm.txt": "2a60eebeb459e4160251493e49c7a207fe70a13f86c72c4292f2b45f7d00045a",
+            "ptxas-resource-report.txt": "fb3bfb8f47e4903a1b623abbe62dde8b607394c12563c2a83ab8b1d98b2e52d5"
+          },
+          "llvm_definitions": 10,
+          "sass_symbols": {
+            "rust_vecadd": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 21
+            },
+            "rust_sha256_32": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 1623
+            },
+            "rust_guarded_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 614
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct": {
+              "scope": "helper",
+              "non_nop_instructions": 174
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed": {
+              "scope": "helper",
+              "non_nop_instructions": 238
+            },
+            "$rust_guarded_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved": {
+              "scope": "helper",
+              "non_nop_instructions": 173
+            },
+            "rust_filtered_select": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 124
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped": {
+              "scope": "helper",
+              "non_nop_instructions": 46
+            },
+            "$rust_filtered_select$_RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered": {
+              "scope": "helper",
+              "non_nop_instructions": 49
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas info    : 0 bytes gmem\nptxas info    : Compiling entry function 'rust_vecadd' for 'sm_100'\nptxas info    : Function properties for rust_vecadd\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 12 registers, used 0 barriers\nptxas info    : Compile time = 2.215 ms\nptxas info    : Compiling entry function 'rust_sha256_32' for 'sm_100'\nptxas info    : Function properties for rust_sha256_32\n    112 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 40 registers, used 0 barriers, 112 bytes cumulative stack size\nptxas info    : Compile time = 49.821 ms\nptxas info    : Compiling entry function 'rust_guarded_select' for 'sm_100'\nptxas info    : Function properties for rust_guarded_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 32 registers, used 0 barriers\nptxas info    : Compile time = 16.666 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select6direct\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8observed\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select9preserved\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Compiling entry function 'rust_filtered_select' for 'sm_100'\nptxas info    : Function properties for rust_filtered_select\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 18 registers, used 0 barriers\nptxas info    : Compile time = 4.717 ms\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select7stepped\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCsh77cIZBgDVk_18ptx_export_kernels14guarded_select8filtered\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        }
+      }
+    },
+    "solana": {
+      "comparison": {
+        "workload": "solana",
+        "expected_entry_count": 1,
+        "default_matches_disabled_ptx": true,
+        "inline_scalar_matches_replay": true,
+        "nvidia_execution": false,
+        "ptx_sha256": {
+          "none": "59486d4378de80f787d247e5713918f39305aa8a2b94409b4299082f09db0891",
+          "default": "59486d4378de80f787d247e5713918f39305aa8a2b94409b4299082f09db0891",
+          "inline-scalar": "a57cc6320ccb23d9db1fc34a8f96721da84ebdc239e2d3b034935b5015d3557e"
+        }
+      },
+      "modes": {
+        "none": {
+          "ptx_bytes": 1481081,
+          "cubin_bytes": 739480,
+          "hashes": {
+            "final-module.ll": "77e448e3b4fcae0030b948c656b32cb6be0ab0aede6424890c42b86456b2820d",
+            "rust_kernels.ptx": "59486d4378de80f787d247e5713918f39305aa8a2b94409b4299082f09db0891",
+            "rust_kernels.cubin": "f836fbfd7327b6e948d34c8f056ecccc68cc7501916caf2c50ef038da992b577",
+            "nvdisasm.txt": "28422785d869bbc7b515ce202b82dadea714bc4caf1b88d6ae5d4a34b015b203",
+            "ptxas-resource-report.txt": "fede9250b19b64fe028f63a0befbb0f736c687469a6d123aba87d0cde7df5f78"
+          },
+          "llvm_definitions": 3883,
+          "sass_symbols": {
+            "kernel_find_solana_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 39738
+            },
+            "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+              "scope": "helper",
+              "non_nop_instructions": 5
+            },
+            "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 216 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 4031.641 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "default": {
+          "ptx_bytes": 1481081,
+          "cubin_bytes": 739480,
+          "hashes": {
+            "final-module.ll": "35d8df34173f8373264dc88e347de1302f5e7e1ef857c30e684fb724a84ea8e5",
+            "rust_kernels.ptx": "59486d4378de80f787d247e5713918f39305aa8a2b94409b4299082f09db0891",
+            "rust_kernels.cubin": "f836fbfd7327b6e948d34c8f056ecccc68cc7501916caf2c50ef038da992b577",
+            "nvdisasm.txt": "28422785d869bbc7b515ce202b82dadea714bc4caf1b88d6ae5d4a34b015b203",
+            "ptxas-resource-report.txt": "807c0ac8205e570ea2165b4e34633cfc660fc866c6d429807f7270055e887b1c"
+          },
+          "llvm_definitions": 151,
+          "sass_symbols": {
+            "kernel_find_solana_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 39738
+            },
+            "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+              "scope": "helper",
+              "non_nop_instructions": 5
+            },
+            "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 216 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 4185.445 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "inline-scalar": {
+          "ptx_bytes": 1301076,
+          "cubin_bytes": 716024,
+          "hashes": {
+            "final-module.ll": "781946a09c389dcf4f91329969b4ba667bff7a486fd02af656d77ab25d59a8e2",
+            "rust_kernels.ptx": "a57cc6320ccb23d9db1fc34a8f96721da84ebdc239e2d3b034935b5015d3557e",
+            "rust_kernels.cubin": "e2438014642756be6c4e80540269201aa819a935ac8c428d6ffbf8126c2b0b7f",
+            "nvdisasm.txt": "9381da2b8a97c89e5ec08d9fc4e48c78cbbef1e4c8a752caf61a66a0fa0c13cc",
+            "ptxas-resource-report.txt": "3bd727feca2c5f3002a5c9bd83d5193d533a676aecae7e386914e6761214a413"
+          },
+          "llvm_definitions": 7,
+          "sass_symbols": {
+            "kernel_find_solana_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 38428
+            },
+            "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+              "scope": "helper",
+              "non_nop_instructions": 5
+            },
+            "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3617.380 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        }
+      },
+      "experiments": {
+        "inline-only": {
+          "ptx_bytes": 1301076,
+          "cubin_bytes": 716024,
+          "hashes": {
+            "final-module.ll": "979d7bf5223730d66bf8c1920227ab8260dc3383ca5f3562a7d7f6c163e24cbb",
+            "rust_kernels.ptx": "a57cc6320ccb23d9db1fc34a8f96721da84ebdc239e2d3b034935b5015d3557e",
+            "rust_kernels.cubin": "e2438014642756be6c4e80540269201aa819a935ac8c428d6ffbf8126c2b0b7f",
+            "nvdisasm.txt": "9381da2b8a97c89e5ec08d9fc4e48c78cbbef1e4c8a752caf61a66a0fa0c13cc",
+            "ptxas-resource-report.txt": "7074427a72d147fc6c8274469fed144543dc6b99295b48dc6c1e3970d52ebf9e"
+          },
+          "llvm_definitions": 7,
+          "sass_symbols": {
+            "kernel_find_solana_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 38428
+            },
+            "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+              "scope": "helper",
+              "non_nop_instructions": 5
+            },
+            "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 5027.588 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "tiny-loops": {
+          "ptx_bytes": 1276656,
+          "cubin_bytes": 669584,
+          "hashes": {
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+            "rust_kernels.ptx": "1edd4823937fca41c56cabd8b13ba702bfb5642f65fed69f0ca916f717322a97",
+            "rust_kernels.cubin": "026253781c1362cddc8d9545bee4adfe0c685f8a0d5d2f093bf2d0021a8b0790",
+            "nvdisasm.txt": "261597c29b3e04cfa670143edd9e57e5bf1e2febeb4c9a0b42df5b9fd55d237c",
+            "ptxas-resource-report.txt": "e259fe477eb7e4ce06c4d52ecbbc6c6ebeaf4e865e67a27dbde010f46cc827d5"
+          },
+          "llvm_definitions": 7,
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+            "kernel_find_solana_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 36480
+            },
+            "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+              "scope": "helper",
+              "non_nop_instructions": 5
+            },
+            "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    192 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 200 registers, used 0 barriers, 192 bytes cumulative stack size\nptxas info    : Compile time = 4537.528 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        },
+        "correlated-tiny-loops": {
+          "ptx_bytes": 1276499,
+          "cubin_bytes": 661232,
+          "hashes": {
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+            "rust_kernels.cubin": "c6e812b30b8c721d041495b23b64920fa7aeaa122d2fc7e1594523c9477a886b",
+            "nvdisasm.txt": "1616f3d79310cea720ecdb6e6e218e51b231d0d7fb5630349d8808e988d0c5d5",
+            "ptxas-resource-report.txt": "2a653423d4fa31ec41564f213a9f6caf93ec684e253fbd301a68e99a0d4405f6"
+          },
+          "llvm_definitions": 7,
+          "sass_symbols": {
+            "kernel_find_solana_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 35971
+            },
+            "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+              "scope": "helper",
+              "non_nop_instructions": 5
+            },
+            "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    192 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 179 registers, used 0 barriers, 192 bytes cumulative stack size\nptxas info    : Compile time = 4179.746 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        }
+      }
+    },
+    "bitcoin": {
+      "comparison": {
+        "workload": "bitcoin",
+        "expected_entry_count": 1,
+        "default_matches_disabled_ptx": true,
+        "inline_scalar_matches_replay": true,
+        "nvidia_execution": false,
+        "ptx_sha256": {
+          "none": "144b063c9178cc1be731b308250af97bfe525c3e22dd8ce3d42d2203d43e220f",
+          "default": "144b063c9178cc1be731b308250af97bfe525c3e22dd8ce3d42d2203d43e220f",
+          "inline-scalar": "05a0f601c2fbe31fa6060b665036f970ad5cd6f9a045cfc1a4a45cccffcfdabe"
+        }
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+      "modes": {
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+            "rust_kernels.cubin": "d07e17c2c2c95fb10c1042a41da358984755f83fa6838c1ffb51010e9149e983",
+            "nvdisasm.txt": "f75f3a1b4c51db28eb5adabf8a8daa91c05848df338decb0a6443f6fce75a54e",
+            "ptxas-resource-report.txt": "3753cf85cad26db57be759bee0cdf24acc1b42f3f4d0cb61f19bd4e46f6281ee"
+          },
+          "llvm_definitions": 5424,
+          "sass_symbols": {
+            "kernel_find_bitcoin_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 90877
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint": {
+              "scope": "helper",
+              "non_nop_instructions": 6
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add": {
+              "scope": "helper",
+              "non_nop_instructions": 10693
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb": {
+              "scope": "helper",
+              "non_nop_instructions": 51522
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function 'kernel_find_bitcoin_vanity_private_key', 56 bytes spill stores, 52 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb', 2660 bytes spill stores, 2672 bytes spill loads\nptxas info    : 64 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_bitcoin_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_bitcoin_vanity_private_key\n    11120 bytes stack frame, 56 bytes spill stores, 52 bytes spill loads\nptxas info    : Used 255 registers, used 0 barriers, 11120 bytes cumulative stack size\nptxas info    : Compile time = 12799.872 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb\n    0 bytes stack frame, 2660 bytes spill stores, 2672 bytes spill loads\n"
+        },
+        "default": {
+          "ptx_bytes": 3067934,
+          "cubin_bytes": 1642824,
+          "hashes": {
+            "final-module.ll": "dea08d3de2c4410e81431a187f37fa22da07ad49f63bb040cf4708a85c1e4afc",
+            "rust_kernels.ptx": "144b063c9178cc1be731b308250af97bfe525c3e22dd8ce3d42d2203d43e220f",
+            "rust_kernels.cubin": "d07e17c2c2c95fb10c1042a41da358984755f83fa6838c1ffb51010e9149e983",
+            "nvdisasm.txt": "f75f3a1b4c51db28eb5adabf8a8daa91c05848df338decb0a6443f6fce75a54e",
+            "ptxas-resource-report.txt": "d670d4e8dc60dc57dca39debc80fec816841a1076c2ee3962ac6056e279c3ef0"
+          },
+          "llvm_definitions": 204,
+          "sass_symbols": {
+            "kernel_find_bitcoin_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 90877
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint": {
+              "scope": "helper",
+              "non_nop_instructions": 6
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add": {
+              "scope": "helper",
+              "non_nop_instructions": 10693
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb": {
+              "scope": "helper",
+              "non_nop_instructions": 51522
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function 'kernel_find_bitcoin_vanity_private_key', 56 bytes spill stores, 52 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb', 2660 bytes spill stores, 2672 bytes spill loads\nptxas info    : 64 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_bitcoin_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_bitcoin_vanity_private_key\n    11120 bytes stack frame, 56 bytes spill stores, 52 bytes spill loads\nptxas info    : Used 255 registers, used 0 barriers, 11120 bytes cumulative stack size\nptxas info    : Compile time = 12683.765 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb\n    0 bytes stack frame, 2660 bytes spill stores, 2672 bytes spill loads\n"
+        },
+        "inline-scalar": {
+          "ptx_bytes": 3047925,
+          "cubin_bytes": 1739672,
+          "hashes": {
+            "final-module.ll": "52f37daff21b97232ba6d4488fcfca12b3be0eaa357b008b45bd0449a84716ce",
+            "rust_kernels.ptx": "05a0f601c2fbe31fa6060b665036f970ad5cd6f9a045cfc1a4a45cccffcfdabe",
+            "rust_kernels.cubin": "1588d3c5a899c60791084c3603f3db9862c0d9b87b52fc2be1bda23c7d659f05",
+            "nvdisasm.txt": "4780e744d17bc5e838363cf139572b2a6297306b8f60d58850dbe7bfc07ec7fc",
+            "ptxas-resource-report.txt": "59558c351e94f106a56b6e3a9889326acb3a5b99a5f46c8c66e0cba2821ae9b8"
+          },
+          "llvm_definitions": 14,
+          "sass_symbols": {
+            "kernel_find_bitcoin_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 96968
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint": {
+              "scope": "helper",
+              "non_nop_instructions": 6
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNCNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb0B7_": {
+              "scope": "helper",
+              "non_nop_instructions": 24703
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic5fieldNtB2_12FieldElement6invert": {
+              "scope": "helper",
+              "non_nop_instructions": 20461
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvNtCse5XVbuGB8qY_5logic14bitcoin_vanity37generate_and_check_bitcoin_vanity_key": {
+              "scope": "helper",
+              "non_nop_instructions": 51410
+            },
+            "$kernel_find_bitcoin_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function 'kernel_find_bitcoin_vanity_private_key', 4 bytes spill stores, 4 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvNtCse5XVbuGB8qY_5logic14bitcoin_vanity37generate_and_check_bitcoin_vanity_key', 2400 bytes spill stores, 2540 bytes spill loads\nptxas info    : 96 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_bitcoin_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_bitcoin_vanity_private_key\n    11024 bytes stack frame, 4 bytes spill stores, 4 bytes spill loads\nptxas info    : Used 255 registers, used 0 barriers, 11024 bytes cumulative stack size\nptxas info    : Compile time = 15609.791 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNCNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb0B7_\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic5fieldNtB2_12FieldElement6invert\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtCse5XVbuGB8qY_5logic14bitcoin_vanity37generate_and_check_bitcoin_vanity_key\n    0 bytes stack frame, 2400 bytes spill stores, 2540 bytes spill loads\n"
+        }
+      }
+    },
+    "ethereum": {
+      "comparison": {
+        "workload": "ethereum",
+        "expected_entry_count": 1,
+        "default_matches_disabled_ptx": true,
+        "inline_scalar_matches_replay": true,
+        "nvidia_execution": false,
+        "ptx_sha256": {
+          "none": "c33d56979496ba6f3857d691131c246d1f983fd444b8091cf04e87d3c7ea7d82",
+          "default": "c33d56979496ba6f3857d691131c246d1f983fd444b8091cf04e87d3c7ea7d82",
+          "inline-scalar": "bcef0d7b386d5fa5319f125c8a437b6d78042d5830a59aaf945d2f551d12aa92"
+        }
+      },
+      "modes": {
+        "none": {
+          "ptx_bytes": 2904101,
+          "cubin_bytes": 1572464,
+          "hashes": {
+            "final-module.ll": "01934c1f4f9bfbaf087e8b0d8aeeff0433951219e3814281c72659a00b7e014c",
+            "rust_kernels.ptx": "c33d56979496ba6f3857d691131c246d1f983fd444b8091cf04e87d3c7ea7d82",
+            "rust_kernels.cubin": "58aafbf4313113e3961f7fa9952e4eec5bacd320ddbdee2f402f5c57cfff294e",
+            "nvdisasm.txt": "a88c2356153148ca7f77dee94477271c3adb32618406c3b73169d7ba4e4f2286",
+            "ptxas-resource-report.txt": "9ddb4f21753e395ac132f4ea60440afffda73967c848588d4bb8ef839dff9ee8"
+          },
+          "llvm_definitions": 5423,
+          "sass_symbols": {
+            "kernel_find_ethereum_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 87009
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint": {
+              "scope": "helper",
+              "non_nop_instructions": 6
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add": {
+              "scope": "helper",
+              "non_nop_instructions": 10693
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb": {
+              "scope": "helper",
+              "non_nop_instructions": 51522
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function 'kernel_find_ethereum_vanity_private_key', 56 bytes spill stores, 52 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb', 2660 bytes spill stores, 2672 bytes spill loads\nptxas info    : 192 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_ethereum_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_ethereum_vanity_private_key\n    10928 bytes stack frame, 56 bytes spill stores, 52 bytes spill loads\nptxas info    : Used 255 registers, used 0 barriers, 10928 bytes cumulative stack size\nptxas info    : Compile time = 16493.826 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb\n    0 bytes stack frame, 2660 bytes spill stores, 2672 bytes spill loads\n"
+        },
+        "default": {
+          "ptx_bytes": 2904101,
+          "cubin_bytes": 1572464,
+          "hashes": {
+            "final-module.ll": "ce42add7a6cedcf446d134473e5c1728528d83fb62cfea3561ed7db3bec86d22",
+            "rust_kernels.ptx": "c33d56979496ba6f3857d691131c246d1f983fd444b8091cf04e87d3c7ea7d82",
+            "rust_kernels.cubin": "58aafbf4313113e3961f7fa9952e4eec5bacd320ddbdee2f402f5c57cfff294e",
+            "nvdisasm.txt": "a88c2356153148ca7f77dee94477271c3adb32618406c3b73169d7ba4e4f2286",
+            "ptxas-resource-report.txt": "7c7440043f4eef7d20b707ff66dcff9473ef2224105d415b60ae27232f17508f"
+          },
+          "llvm_definitions": 211,
+          "sass_symbols": {
+            "kernel_find_ethereum_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 87009
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint": {
+              "scope": "helper",
+              "non_nop_instructions": 6
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add": {
+              "scope": "helper",
+              "non_nop_instructions": 10693
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb": {
+              "scope": "helper",
+              "non_nop_instructions": 51522
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function 'kernel_find_ethereum_vanity_private_key', 56 bytes spill stores, 52 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb', 2660 bytes spill stores, 2672 bytes spill loads\nptxas info    : 192 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_ethereum_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_ethereum_vanity_private_key\n    10928 bytes stack frame, 56 bytes spill stores, 52 bytes spill loads\nptxas info    : Used 255 registers, used 0 barriers, 10928 bytes cumulative stack size\nptxas info    : Compile time = 15544.205 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvMNtNtCs8DUvt1RrTNm_4k25610arithmetic10projectiveNtB2_15ProjectivePoint3add\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Function properties for _RNvNtNtCs8DUvt1RrTNm_4k25610arithmetic3mul7lincomb\n    0 bytes stack frame, 2660 bytes spill stores, 2672 bytes spill loads\n"
+        },
+        "inline-scalar": {
+          "ptx_bytes": 2666896,
+          "cubin_bytes": 1521104,
+          "hashes": {
+            "final-module.ll": "0fbc925f0d604744c9c82ae8edbc89c570cee2e19a27b5a4853f408120bbc6bc",
+            "rust_kernels.ptx": "bcef0d7b386d5fa5319f125c8a437b6d78042d5830a59aaf945d2f551d12aa92",
+            "rust_kernels.cubin": "54939625da3458d01d680d2618b0689e5ef76eb523f5c7e1166428336462390c",
+            "nvdisasm.txt": "9b76c6fcdbe40310152546f7c235e738c75712d315d30c3757fd318ea8d0392f",
+            "ptxas-resource-report.txt": "368642df0ec38223f4e1209cb79b9ac28b7f84b2bb8c49fdbbeac749c2154aa1"
+          },
+          "llvm_definitions": 13,
+          "sass_symbols": {
+            "kernel_find_ethereum_vanity_private_key": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 86774
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint": {
+              "scope": "helper",
+              "non_nop_instructions": 7
+            },
+            "$kernel_find_ethereum_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 79
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function 'kernel_find_ethereum_vanity_private_key', 1672 bytes spill stores, 3036 bytes spill loads\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 224 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_ethereum_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_ethereum_vanity_private_key\n    3984 bytes stack frame, 1672 bytes spill stores, 3036 bytes spill loads\nptxas info    : Used 255 registers, used 0 barriers, 3984 bytes cumulative stack size\nptxas info    : Compile time = 17466.508 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs9EmaDtgp80K_6subtle9black_boxhECs2tFHjrzC0d5_13crypto_bigint\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n"
+        }
+      }
+    },
+    "shallenge": {
+      "comparison": {
+        "workload": "shallenge",
+        "expected_entry_count": 1,
+        "default_matches_disabled_ptx": true,
+        "inline_scalar_matches_replay": true,
+        "nvidia_execution": false,
+        "ptx_sha256": {
+          "none": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+          "default": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+          "inline-scalar": "c94ed049c87e2f816137eafe395aef29204cb01f5980d661799671033e9de576"
+        }
+      },
+      "modes": {
+        "none": {
+          "ptx_bytes": 97085,
+          "cubin_bytes": 58808,
+          "hashes": {
+            "final-module.ll": "7fea852544fa3bb9d5e2cd68823ca745282455e65f8cce0d7dc5a50bc03d608f",
+            "rust_kernels.ptx": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+            "rust_kernels.cubin": "74477cb6760c5389cd35be58c8787a7d2cfb3e36946a40eab220c35b4cc0c07c",
+            "nvdisasm.txt": "658cc80d586177d989d998be88da4d9f45abc64dac5095b7965a5e129664f606",
+            "ptxas-resource-report.txt": "99651bcdb4cfb8afade4e0d2b31d3a5d62a8fb1bc28b74da15a4ccf2cb333b09"
+          },
+          "llvm_definitions": 3416,
+          "sass_symbols": {
+            "kernel_find_better_shallenge_nonce": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 2380
+            },
+            "$kernel_find_better_shallenge_nonce$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 77
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 28 bytes spill stores, 28 bytes spill loads\nptxas info    : 64 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_better_shallenge_nonce' for 'sm_100'\nptxas info    : Function properties for kernel_find_better_shallenge_nonce\n    144 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 96 registers, used 0 barriers, 144 bytes cumulative stack size\nptxas info    : Compile time = 127.603 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 28 bytes spill stores, 28 bytes spill loads\n"
+        },
+        "default": {
+          "ptx_bytes": 97085,
+          "cubin_bytes": 58808,
+          "hashes": {
+            "final-module.ll": "fabad9211754fa12814ef402244759fabeb8271ad5ab5294591940f9ef5bce94",
+            "rust_kernels.ptx": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+            "rust_kernels.cubin": "74477cb6760c5389cd35be58c8787a7d2cfb3e36946a40eab220c35b4cc0c07c",
+            "nvdisasm.txt": "658cc80d586177d989d998be88da4d9f45abc64dac5095b7965a5e129664f606",
+            "ptxas-resource-report.txt": "e0ec083382c2566f6222ca293ff0c14cc556a5d65ac536a6ab6f9cc71128ba3f"
+          },
+          "llvm_definitions": 54,
+          "sass_symbols": {
+            "kernel_find_better_shallenge_nonce": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 2380
+            },
+            "$kernel_find_better_shallenge_nonce$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 77
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 28 bytes spill stores, 28 bytes spill loads\nptxas info    : 64 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_better_shallenge_nonce' for 'sm_100'\nptxas info    : Function properties for kernel_find_better_shallenge_nonce\n    144 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 96 registers, used 0 barriers, 144 bytes cumulative stack size\nptxas info    : Compile time = 128.137 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 28 bytes spill stores, 28 bytes spill loads\n"
+        },
+        "inline-scalar": {
+          "ptx_bytes": 97006,
+          "cubin_bytes": 75584,
+          "hashes": {
+            "final-module.ll": "6274646078321d1b58ce428a1230fbc247c02ac7225530456fd44f9e65ceadff",
+            "rust_kernels.ptx": "c94ed049c87e2f816137eafe395aef29204cb01f5980d661799671033e9de576",
+            "rust_kernels.cubin": "bffb425d473f26a89c01f97084c6594bf35af8fc7a3d07992f7a9b724e3c5b61",
+            "nvdisasm.txt": "0300152fa78fa19c55e3fe7e172c447ed7f7b0ad1d23f10a2ce2ffec3beafb0e",
+            "ptxas-resource-report.txt": "740629b99c03390c077a6440d9987d397c7388a94f93963e71ffaf9930d4cbb4"
+          },
+          "llvm_definitions": 3,
+          "sass_symbols": {
+            "kernel_find_better_shallenge_nonce": {
+              "scope": "entry_including_helpers",
+              "non_nop_instructions": 2710
+            },
+            "$kernel_find_better_shallenge_nonce$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+              "scope": "helper",
+              "non_nop_instructions": 77
+            }
+          },
+          "ptxas_resource_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 28 bytes spill stores, 28 bytes spill loads\nptxas info    : 64 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_better_shallenge_nonce' for 'sm_100'\nptxas info    : Function properties for kernel_find_better_shallenge_nonce\n    176 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 96 registers, used 0 barriers, 176 bytes cumulative stack size\nptxas info    : Compile time = 146.270 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 28 bytes spill stores, 28 bytes spill loads\n"
+        }
+      }
+    }
+  },
+  "default_dce_retention": {
+    "run": 34792081740,
+    "results": [
+      {
+        "fixture": "small",
+        "definitions_before_after": [
+          3299,
+          93
+        ],
+        "matches_disabled_ptx_function_bodies": true,
+        "ptx_sha256": {
+          "none": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+          "default": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702"
+        }
+      },
+      {
+        "fixture": "retention",
+        "definitions_before_after": [
+          3192,
+          5
+        ],
+        "matches_disabled_ptx_function_bodies": true,
+        "ptx_sha256": {
+          "none": "8688f55d8aad8e9ab1a4cbce5026ace21bb8b4e542317268826a922e77eb55bb",
+          "default": "8688f55d8aad8e9ab1a4cbce5026ace21bb8b4e542317268826a922e77eb55bb"
+        }
+      }
+    ]
+  },
+  "small_numerical": {
+    "tiny-loops": {
+      "host_oracle": {
+        "input_sha256": "a0fbe965a15f8084452a0bbabd7bb57dc5be78ee0537b9945c94b27861e06db7",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "arm64-apple-darwin25.6.0",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      },
+      "consumer": "generic CuMetal, Apple M5",
+      "ptx_sha256": "551de2b1b8a10c5d8dabd10bcf808123b45a2bed220d54b256ad4ebcb608da78",
+      "logs": {
+        "vecadd-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1916 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1583 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_vecadd count=1\nNUMERICAL_PASS kernel=rust_vecadd count=31\nNUMERICAL_PASS kernel=rust_vecadd count=32\nNUMERICAL_PASS kernel=rust_vecadd count=33\nNUMERICAL_PASS kernel=rust_vecadd count=257\n",
+        "sha256-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=13750 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=12000 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11874 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11791 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11249 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_sha256_32 count=1\nNUMERICAL_PASS kernel=rust_sha256_32 count=31\nNUMERICAL_PASS kernel=rust_sha256_32 count=32\nNUMERICAL_PASS kernel=rust_sha256_32 count=33\nNUMERICAL_PASS kernel=rust_sha256_32 count=257\n"
+      },
+      "consumer_hashes": {
+        "build-rust-ptx-apple/cumetalc": "580e0d0df453055c13eef3fdc8520c593c91672952c74177a4f9cfd37074000a",
+        "build-rust-ptx-apple/libcumetal.dylib": "a101fdff598e160af5ec6e9d5fffdb65b88bb19f47a9ae8364224abed1a7fdb0",
+        "demos/rust-ptx/run.py": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448"
+      }
+    },
+    "correlated-tiny-loops": {
+      "host_oracle": {
+        "input_sha256": "d6196a85219f613042bb989f50a273ca6b8e636a7ad8ce7614b15a1d4a438c78",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "arm64-apple-darwin25.6.0",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      },
+      "consumer": "generic CuMetal, Apple M5",
+      "ptx_sha256": "2e3be232386a22e74e7629c497defd9a0419dbe0b87d310803f189d66332f7f4",
+      "logs": {
+        "vecadd-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1874 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1374 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1458 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_vecadd count=1\nNUMERICAL_PASS kernel=rust_vecadd count=31\nNUMERICAL_PASS kernel=rust_vecadd count=32\nNUMERICAL_PASS kernel=rust_vecadd count=33\nNUMERICAL_PASS kernel=rust_vecadd count=257\n",
+        "sha256-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=13999 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11875 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11791 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11833 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11249 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_sha256_32 count=1\nNUMERICAL_PASS kernel=rust_sha256_32 count=31\nNUMERICAL_PASS kernel=rust_sha256_32 count=32\nNUMERICAL_PASS kernel=rust_sha256_32 count=33\nNUMERICAL_PASS kernel=rust_sha256_32 count=257\n"
+      },
+      "consumer_hashes": {
+        "build-rust-ptx-apple/cumetalc": "580e0d0df453055c13eef3fdc8520c593c91672952c74177a4f9cfd37074000a",
+        "build-rust-ptx-apple/libcumetal.dylib": "a101fdff598e160af5ec6e9d5fffdb65b88bb19f47a9ae8364224abed1a7fdb0",
+        "demos/rust-ptx/run.py": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448"
+      }
+    }
+  },
+  "representative_isolation": {
+    "run": 34793214204,
+    "modes": {
+      "none": {
+        "input_sha256": "db4d754ce68334027d84aba442cf0c4221cce055614593fa0279e3798c24933d",
+        "libraries": {
+          "/nix/store/lispzgqrbchxvq60xcr8mgmmihvd0kgi-cuda-merged-13.2/nvvm/libdevice/libdevice.10.bc": "0c6b4d4e4c033e2faffcc6f671c68fec5e813020845a5a08f1dbdd35c19629d6",
+          "target/cuda-builder-codegen/debug/build/rustc_codegen_nvvm-51ecf64d3b71e193/out/libintrinsics_v19.bc": "1e49ef6a4767cb39656afa6e4d7b700a69affd6ed3673984003d72fed2019758"
+        },
+        "kernels": {
+          "wave2_float": {
+            "exit_code": 0,
+            "compiled": true,
+            "ir_sha256": "4984327d07755101301e00f3817dbb676183d9e56c8a6f476808780303341218"
+          },
+          "wave2_shared": {
+            "exit_code": 0,
+            "compiled": true,
+            "ir_sha256": "b0928e18cf40a2d68b9d3ddca9ec856fd208881fedb6bb155cf6ddd37f991808"
+          },
+          "wave2_atomic": {
+            "exit_code": 0,
+            "compiled": true,
+            "ir_sha256": "a8e7c062d825f5d8ba6d63b568ad382edaaec83ea7007d0b20f35c4dd621d0dd"
+          },
+          "wave2_shuffle": {
+            "exit_code": -11,
+            "compiled": false,
+            "ir_sha256": "cea1696ed78a750736767a554d6a85ab2c58f158a13ea8de4c4b27008930bd1c"
+          }
+        }
+      },
+      "default": {
+        "input_sha256": "862966ea9882d0fe8b0b6eeedb4f348509ffe3499df09aa679aeb70666ee8362",
+        "libraries": {
+          "/nix/store/lispzgqrbchxvq60xcr8mgmmihvd0kgi-cuda-merged-13.2/nvvm/libdevice/libdevice.10.bc": "0c6b4d4e4c033e2faffcc6f671c68fec5e813020845a5a08f1dbdd35c19629d6",
+          "target/cuda-builder-codegen/debug/build/rustc_codegen_nvvm-51ecf64d3b71e193/out/libintrinsics_v19.bc": "1e49ef6a4767cb39656afa6e4d7b700a69affd6ed3673984003d72fed2019758"
+        },
+        "kernels": {
+          "wave2_float": {
+            "exit_code": 0,
+            "compiled": true,
+            "ir_sha256": "76affca839cea0db2c2e4b8c08068e434eedfb11cad05dff46ff3223a4175604"
+          },
+          "wave2_shared": {
+            "exit_code": 0,
+            "compiled": true,
+            "ir_sha256": "907e383e1e4df0c6dac1b2b7adc26e9782003ab83cfd5f216a354907608d2117"
+          },
+          "wave2_atomic": {
+            "exit_code": 0,
+            "compiled": true,
+            "ir_sha256": "3f19ee37c3d81f9934dfba0e0b948e72c4377759d05a03ce2f9736292b9aea54"
+          },
+          "wave2_shuffle": {
+            "exit_code": -11,
+            "compiled": false,
+            "ir_sha256": "ac3b9584185d6b1526811c217f9b3d5795086935cab8d7276a2dbbcf725ebfc8"
+          }
+        }
+      },
+      "inline-scalar": {
+        "input_sha256": "e92eab21d5efe6e20499e429f59bc9a6d2d81c643199c028409b5f25e47f2554",
+        "libraries": {
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+            "/tmp/wave2-representative-full-apple/none-wave2_float/kernel.metal",
+            "--overwrite"
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+            "wave2_float",
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+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1874 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=7958 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "none/wave2_shared": {
+        "ptx_sha256": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/none/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_shared",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/none-wave2_shared/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/none-wave2_shared/kernel.metal",
+            "--kernel",
+            "wave2_shared",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/none-wave2_shared/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "5f069c332e5a2f6c6ac58b290c8559cdd3d90a047c54dc4a0cf44e328ec2cedc",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_shared",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=2000 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1624 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1458 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=4749 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "none/wave2_atomic": {
+        "ptx_sha256": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/none/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_atomic",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/none-wave2_atomic/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/none-wave2_atomic/kernel.metal",
+            "--kernel",
+            "wave2_atomic",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/none-wave2_atomic/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "51ff608005dfd3943eb4cc729bb82d2e6f120141d34054845e98a4f58e689400",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_atomic",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=2125 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1374 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1374 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1249 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1458 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=3791 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "none/wave2_shuffle": {
+        "ptx_sha256": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/none/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_shuffle",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/none-wave2_shuffle/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/none-wave2_shuffle/kernel.metal",
+            "--kernel",
+            "wave2_shuffle",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/none-wave2_shuffle/result.json",
+            "--counts",
+            "32"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 1,
+        "result": {
+          "module_sha256": "6443104175ef54fb73d9494aa0f96236d4df2446b1e1fbb5fc0fcea1a78d3e25",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [],
+          "error": "wave2_shuffle/32: output[0] = 0xffffffff, expected 0x28b7bc80"
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shuffle\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=341375 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\nTraceback (most recent call last):\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 152, in <module>\n    main()\n    ~~~~^^\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 140, in main\n    result=run_case(driver,kernel,args.kernel,count,args.repeats if args.benchmark else 0)\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 80, in run_case\n    raise RuntimeError(f'{name}/{count}: output[{index}] = {host_output[index]:#010x}, '\n                       f'expected {expected[index]:#010x}')\nRuntimeError: wave2_shuffle/32: output[0] = 0xffffffff, expected 0x28b7bc80\n"
+      },
+      "default/wave2_float": {
+        "ptx_sha256": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/default/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_float",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/default-wave2_float/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/default-wave2_float/kernel.metal",
+            "--kernel",
+            "wave2_float",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/default-wave2_float/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "9974c4b82b399b36c630b11abeb80a7f01a94fcb7ebea4758da874033d74e089",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_float",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1750 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1458 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1458 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=12124 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "default/wave2_shared": {
+        "ptx_sha256": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/default/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_shared",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/default-wave2_shared/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/default-wave2_shared/kernel.metal",
+            "--kernel",
+            "wave2_shared",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/default-wave2_shared/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "5f069c332e5a2f6c6ac58b290c8559cdd3d90a047c54dc4a0cf44e328ec2cedc",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_shared",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=2000 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1749 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1374 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1500 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=4749 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "default/wave2_atomic": {
+        "ptx_sha256": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/default/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_atomic",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/default-wave2_atomic/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/default-wave2_atomic/kernel.metal",
+            "--kernel",
+            "wave2_atomic",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/default-wave2_atomic/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "51ff608005dfd3943eb4cc729bb82d2e6f120141d34054845e98a4f58e689400",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_atomic",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=2083 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1374 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1583 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1375 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1374 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=3875 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "default/wave2_shuffle": {
+        "ptx_sha256": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/default/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_shuffle",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/default-wave2_shuffle/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/default-wave2_shuffle/kernel.metal",
+            "--kernel",
+            "wave2_shuffle",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/default-wave2_shuffle/result.json",
+            "--counts",
+            "32"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 1,
+        "result": {
+          "module_sha256": "6443104175ef54fb73d9494aa0f96236d4df2446b1e1fbb5fc0fcea1a78d3e25",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [],
+          "error": "wave2_shuffle/32: output[0] = 0xffffffff, expected 0x28b7bc80"
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shuffle\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1833 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\nTraceback (most recent call last):\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 152, in <module>\n    main()\n    ~~~~^^\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 140, in main\n    result=run_case(driver,kernel,args.kernel,count,args.repeats if args.benchmark else 0)\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 80, in run_case\n    raise RuntimeError(f'{name}/{count}: output[{index}] = {host_output[index]:#010x}, '\n                       f'expected {expected[index]:#010x}')\nRuntimeError: wave2_shuffle/32: output[0] = 0xffffffff, expected 0x28b7bc80\n"
+      },
+      "inline-scalar/wave2_float": {
+        "ptx_sha256": "aa05ea8cc449823d6e22b4cc332946afbf569a98a5856f489b9b7480cc0ffd0f",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/inline-scalar/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_float",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_float/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_float/kernel.metal",
+            "--kernel",
+            "wave2_float",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_float/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "9974c4b82b399b36c630b11abeb80a7f01a94fcb7ebea4758da874033d74e089",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_float",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_float",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1749 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1541 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1375 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1500 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_float\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=9499 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_float\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "inline-scalar/wave2_shared": {
+        "ptx_sha256": "aa05ea8cc449823d6e22b4cc332946afbf569a98a5856f489b9b7480cc0ffd0f",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/inline-scalar/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_shared",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_shared/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_shared/kernel.metal",
+            "--kernel",
+            "wave2_shared",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_shared/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "5f069c332e5a2f6c6ac58b290c8559cdd3d90a047c54dc4a0cf44e328ec2cedc",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_shared",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_shared",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1916 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=293124 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1624 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shared\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=5499 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_shared\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "inline-scalar/wave2_atomic": {
+        "ptx_sha256": "aa05ea8cc449823d6e22b4cc332946afbf569a98a5856f489b9b7480cc0ffd0f",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/inline-scalar/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_atomic",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_atomic/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_atomic/kernel.metal",
+            "--kernel",
+            "wave2_atomic",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_atomic/result.json"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 0,
+        "result": {
+          "module_sha256": "51ff608005dfd3943eb4cc729bb82d2e6f120141d34054845e98a4f58e689400",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [
+            {
+              "kernel": "wave2_atomic",
+              "count": 1,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 31,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 32,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 33,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 257,
+              "numerical_pass": true,
+              "guards_pass": true
+            },
+            {
+              "kernel": "wave2_atomic",
+              "count": 131072,
+              "numerical_pass": true,
+              "guards_pass": true
+            }
+          ]
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1874 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 1, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 31, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1375 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 32, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1333 grid=(2,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 33, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1375 grid=(9,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 257, \"numerical_pass\": true, \"guards_pass\": true}\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_atomic\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=3791 grid=(4096,1,1) block=(32,1,1) unsupported_reason=\"\"\n{\"kernel\": \"wave2_atomic\", \"count\": 131072, \"numerical_pass\": true, \"guards_pass\": true}\n"
+      },
+      "inline-scalar/wave2_shuffle": {
+        "ptx_sha256": "aa05ea8cc449823d6e22b4cc332946afbf569a98a5856f489b9b7480cc0ffd0f",
+        "commands": [
+          [
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/cumetalc",
+            "/tmp/wave2-representative-34793862065/representative/inline-scalar/rust_kernels.ptx",
+            "--backend=cumetal-ir",
+            "--ptx-strict",
+            "--entry",
+            "wave2_shuffle",
+            "--emit=msl",
+            "-o",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_shuffle/kernel.metal",
+            "--overwrite"
+          ],
+          [
+            "python3",
+            "examples/ptx_export/run_wave2_gpu.py",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_shuffle/kernel.metal",
+            "--kernel",
+            "wave2_shuffle",
+            "--driver",
+            "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+            "--out",
+            "/tmp/wave2-representative-full-apple/inline-scalar-wave2_shuffle/result.json",
+            "--counts",
+            "32"
+          ]
+        ],
+        "stage_0_exit": 0,
+        "stage_1_exit": 1,
+        "result": {
+          "module_sha256": "c90afa4bb09677b2082305fb072e480ed1123631a6f77a3d549e089e5d944e5c",
+          "runner_sha256": "c71b5b007a4ba7cafe3bb4500b4f502f37479245cefcfc33b9eb68708b1216d0",
+          "driver": "/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib",
+          "driver_version": 12000,
+          "device": "Apple M5",
+          "native_nvidia_driver_requested": false,
+          "results": [],
+          "error": "wave2_shuffle/32: output[0] = 0xffffffff, expected 0x28b7bc80"
+        },
+        "execution_log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"wave2_shuffle\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1583 grid=(1,1,1) block=(32,1,1) unsupported_reason=\"\"\nTraceback (most recent call last):\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 152, in <module>\n    main()\n    ~~~~^^\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 140, in main\n    result=run_case(driver,kernel,args.kernel,count,args.repeats if args.benchmark else 0)\n  File \"/Users/brandon/Desktop/gpu/rust-cuda-ptx-export/examples/ptx_export/run_wave2_gpu.py\", line 80, in run_case\n    raise RuntimeError(f'{name}/{count}: output[{index}] = {host_output[index]:#010x}, '\n                       f'expected {expected[index]:#010x}')\nRuntimeError: wave2_shuffle/32: output[0] = 0xffffffff, expected 0x28b7bc80\n"
+      }
+    },
+    "comparison": {
+      "workload": "representative",
+      "expected_entry_count": 4,
+      "default_matches_disabled_ptx": true,
+      "inline_scalar_matches_replay": true,
+      "nvidia_execution": false,
+      "ptx_sha256": {
+        "none": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "default": "6c4fe4b9a3031fbe6138daf2fd6f1fe6130b2efd9e8ccc270d0b2f2728d3df46",
+        "inline-scalar": "aa05ea8cc449823d6e22b4cc332946afbf569a98a5856f489b9b7480cc0ffd0f"
+      }
+    },
+    "source_commit": "363efef"
+  },
+  "rng_ipo_experiments": {
+    "input_sha256": "77e448e3b4fcae0030b948c656b32cb6be0ab0aede6424890c42b86456b2820d",
+    "nvidia_compilation": false,
+    "variants": {
+      "ipsccp": {
+        "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,ipsccp,function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+        "verify_each": true,
+        "output_sha256": "b50aa51aa43b54e90a7b1b77a41b0e97b2b8235beeac39454e4bdf07630f9d9d",
+        "module_bytes": 638370,
+        "helper_retained": true,
+        "helper_signature": "define internal { i64, i64 } @_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed(ptr noalias readonly align 1 dereferenceable(16) %seed) unnamed_addr #0 {",
+        "helper_allocations": 5
+      },
+      "argpromotion": {
+        "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(loop-simplify,lcssa,loop(indvars),loop-unroll<O2;full-unroll-max=4;no-partial;no-peeling;no-profile-peeling;no-runtime;no-upperbound>,sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),cgscc(argpromotion),ipsccp,function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,verify",
+        "verify_each": true,
+        "output_sha256": "64e7642515c9e622ca479ad487c94cd77694058aea8c54fd644b7f21701342b4",
+        "module_bytes": 2242467,
+        "helper_retained": true,
+        "helper_signature": "define internal { i64, i64 } @_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed(ptr noalias readonly align 1 dereferenceable(16) %seed) unnamed_addr #0 {",
+        "helper_allocations": 4
+      }
+    }
+  },
+  "final_small_numerical": {
+    "run": 34794484421,
+    "host": {
+      "none": {
+        "input_sha256": "aaaad5aa668b30aa0bdbe625c0de8697b20cd83265d5944902e4de03b2c98780",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "arm64-apple-darwin25.6.0",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      },
+      "inline-scalar": {
+        "input_sha256": "58e0a29aab3abb75208927615183eaa7c15c75baa092b5d164406ecce1c0d7b3",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "arm64-apple-darwin25.6.0",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      },
+      "tiny-loops": {
+        "input_sha256": "a0fbe965a15f8084452a0bbabd7bb57dc5be78ee0537b9945c94b27861e06db7",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "arm64-apple-darwin25.6.0",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      },
+      "correlated-tiny-loops": {
+        "input_sha256": "d6196a85219f613042bb989f50a273ca6b8e636a7ad8ce7614b15a1d4a438c78",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "arm64-apple-darwin25.6.0",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      },
+      "loop-idiom": {
+        "input_sha256": "fee14de651d60590cbf2a4b02719d0e9fb5ee770235978cd0026bd2aa87f472b",
+        "oracle_sha256": "76f10d79ed3d05cedae0e1b050233b5dc21f9ad6870d38f918a950d2c96219d4",
+        "host_triple": "arm64-apple-darwin25.6.0",
+        "gpu_execution": false,
+        "result": "HOST_IR_NUMERICAL_PASS: 1608 cases across five extracted helpers"
+      }
+    },
+    "apple": {
+      "none": {
+        "ptx_sha256": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+        "logs": {
+          "vecadd-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=1874 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1458 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1374 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1500 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_vecadd count=1\nNUMERICAL_PASS kernel=rust_vecadd count=31\nNUMERICAL_PASS kernel=rust_vecadd count=32\nNUMERICAL_PASS kernel=rust_vecadd count=33\nNUMERICAL_PASS kernel=rust_vecadd count=257\n",
+          "sha256-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=14249 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11875 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11958 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11750 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11249 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_sha256_32 count=1\nNUMERICAL_PASS kernel=rust_sha256_32 count=31\nNUMERICAL_PASS kernel=rust_sha256_32 count=32\nNUMERICAL_PASS kernel=rust_sha256_32 count=33\nNUMERICAL_PASS kernel=rust_sha256_32 count=257\n"
+        }
+      },
+      "inline-scalar": {
+        "ptx_sha256": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821",
+        "logs": {
+          "vecadd-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=153375 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1499 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1375 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_vecadd\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=1416 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_vecadd count=1\nNUMERICAL_PASS kernel=rust_vecadd count=31\nNUMERICAL_PASS kernel=rust_vecadd count=32\nNUMERICAL_PASS kernel=rust_vecadd count=33\nNUMERICAL_PASS kernel=rust_vecadd count=257\n",
+          "sha256-run.log": "CUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=false launch_success=true duration_ns=19041 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11875 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11875 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11875 grid=(1,1,1) block=(64,1,1) unsupported_reason=\"\"\nCUMETAL_PROVENANCE event=kernel_launch kernel=\"rust_sha256_32\" source=generic_ptx provenance=generic_ptx_lowering semantic_quality=exact device=apple_gpu device_name=\"Apple M5\" math_mode=safe compile_cache_hit=true launch_success=true duration_ns=11166 grid=(5,1,1) block=(64,1,1) unsupported_reason=\"\"\nDEVICE Apple M5\nNUMERICAL_PASS kernel=rust_sha256_32 count=1\nNUMERICAL_PASS kernel=rust_sha256_32 count=31\nNUMERICAL_PASS kernel=rust_sha256_32 count=32\nNUMERICAL_PASS kernel=rust_sha256_32 count=33\nNUMERICAL_PASS kernel=rust_sha256_32 count=257\n"
+        }
+      }
+    },
+    "nvidia_execution": false
+  },
+  "final_matrix": {
+    "run": 34794484421,
+    "conclusion": "success",
+    "nvidia_execution": false,
+    "runtime_performance_measured": false,
+    "workloads": {
+      "small": {
+        "source_commit": "d111f80dbfa2374fb50af5b6d49407ffab13bd1a",
+        "comparison": {
+          "workload": "small",
+          "expected_entry_count": 4,
+          "default_matches_disabled_ptx": true,
+          "inline_scalar_matches_replay": true,
+          "nvidia_execution": false,
+          "ptx_sha256": {
+            "none": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+            "default": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+            "inline-scalar": "732df2f175dcf0841f273645e79164dd23a1e2b3bea808f455633ec248377821"
+          }
+        },
+        "provenance": {
+          "workload": "small",
+          "source_commit": "d111f80dbfa2374fb50af5b6d49407ffab13bd1a",
+          "expected_entries": [
+            "rust_filtered_select",
+            "rust_guarded_select",
+            "rust_sha256_32",
+            "rust_vecadd"
+          ]
+        },
+        "modes": {
+          "none": {
+            "llvm_ir_bytes": 13851708,
+            "llvm_definitions": 3299,
+            "ptx_bytes": 106204,
+            "cubin_bytes": 57984,
+            "hashes": {
+              "final-module.ll": "aaaad5aa668b30aa0bdbe625c0de8697b20cd83265d5944902e4de03b2c98780",
+              "rust_kernels.ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
+              "rust_kernels.cubin": "d4d4bad56fe1566f987d6dc906d86a7917466def28952491c2b65b22ab4640bb",
+              "ptxas-resource-report.txt": "6705c54628340dff2c8edfa73463ce22aaa720b910cff3b898c0475a6e21c02f",
+              "resources.txt": "95b727cbd8e1dfda6757cdcf2f14fe1bf5d81c4836ead56904c904bb4e33cdf1",
+              "nvdisasm.txt": "03989129d419e2b1d0ac697157557202cc19ce1675406edeb00c5edeb774cfaf"
+            },
+            "inspection_reused": false,
+            "entries": {
+              "rust_filtered_select": {
+                "non_nop_instructions": 103,
+                "scope": "entry_including_helpers"
+              },
+              "rust_guarded_select": {
+                "non_nop_instructions": 614,
+                "scope": "entry_including_helpers"
+              },
+              "rust_sha256_32": {
+                "non_nop_instructions": 1623,
+                "scope": "entry_including_helpers"
+              },
+              "rust_vecadd": {
+                "non_nop_instructions": 21,
+                "scope": "entry_including_helpers"
+              }
+            }
+          },
+          "default": {
+            "llvm_ir_bytes": 303325,
+            "llvm_definitions": 93,
+            "ptx_bytes": 106204,
+            "cubin_bytes": 57984,
+            "hashes": {
+              "final-module.ll": "4a947cf8666c618e979c337081cd6fa16820f4e09d7d922d7dcf131ba174d963",
+              "rust_kernels.ptx": "b325305f1d43b314bf0c794f099a4412b6ae038b17b841670d011d94d21e0702",
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+              "ptxas-resource-report.txt": "f769f63aa652f93caefbc7ea15a1b11a0782d83c03f69479b8fb365ebc0fed27",
+              "resources.txt": "117ab9861b521148e71a5a2566218bd27d4cef33058e7ca49de98c824df2fc3e",
+              "nvdisasm.txt": "a88c2356153148ca7f77dee94477271c3adb32618406c3b73169d7ba4e4f2286"
+            },
+            "inspection_reused": true,
+            "entries": {
+              "kernel_find_ethereum_vanity_private_key": {
+                "non_nop_instructions": 87009,
+                "scope": "entry_including_helpers"
+              }
+            }
+          },
+          "inline-scalar": {
+            "llvm_ir_bytes": 2451022,
+            "llvm_definitions": 13,
+            "ptx_bytes": 2666896,
+            "cubin_bytes": 1521104,
+            "hashes": {
+              "final-module.ll": "0fbc925f0d604744c9c82ae8edbc89c570cee2e19a27b5a4853f408120bbc6bc",
+              "rust_kernels.ptx": "bcef0d7b386d5fa5319f125c8a437b6d78042d5830a59aaf945d2f551d12aa92",
+              "rust_kernels.cubin": "54939625da3458d01d680d2618b0689e5ef76eb523f5c7e1166428336462390c",
+              "ptxas-resource-report.txt": "5773f9533153cdc4d527a854498066ea70e98da6967fd0a1872186cd5e3b082e",
+              "resources.txt": "a183ea2bd1d0473a29b778b89b8e536d75daeaa427a6a63357fb4978bf941f20",
+              "nvdisasm.txt": "9b76c6fcdbe40310152546f7c235e738c75712d315d30c3757fd318ea8d0392f"
+            },
+            "inspection_reused": false,
+            "entries": {
+              "kernel_find_ethereum_vanity_private_key": {
+                "non_nop_instructions": 86774,
+                "scope": "entry_including_helpers"
+              }
+            }
+          }
+        }
+      },
+      "shallenge": {
+        "source_commit": "d111f80dbfa2374fb50af5b6d49407ffab13bd1a",
+        "comparison": {
+          "workload": "shallenge",
+          "expected_entry_count": 1,
+          "default_matches_disabled_ptx": true,
+          "inline_scalar_matches_replay": true,
+          "nvidia_execution": false,
+          "ptx_sha256": {
+            "none": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+            "default": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+            "inline-scalar": "c94ed049c87e2f816137eafe395aef29204cb01f5980d661799671033e9de576"
+          }
+        },
+        "provenance": {
+          "workload": "shallenge",
+          "source_commit": "d111f80dbfa2374fb50af5b6d49407ffab13bd1a",
+          "mining_commit": "9791234249fc8cb762c296c4fda4503d2686ff77",
+          "expected_entries": [
+            "kernel_find_better_shallenge_nonce"
+          ]
+        },
+        "modes": {
+          "none": {
+            "llvm_ir_bytes": 14801476,
+            "llvm_definitions": 3416,
+            "ptx_bytes": 97085,
+            "cubin_bytes": 58808,
+            "hashes": {
+              "final-module.ll": "5c4d316594d04fa77c1300153e78a764269ca6d1f3f200cea9bac0b8d1cdbbb7",
+              "rust_kernels.ptx": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+              "rust_kernels.cubin": "74477cb6760c5389cd35be58c8787a7d2cfb3e36946a40eab220c35b4cc0c07c",
+              "ptxas-resource-report.txt": "1ab0ae47b17d2a851fb062b62f44abb4059893b541ae71fe47ebc857e5adf304",
+              "resources.txt": "142755495610e8e258e3d9502614ca0b00e1b2b53c61bd832c2e0e5f4c38e71b",
+              "nvdisasm.txt": "658cc80d586177d989d998be88da4d9f45abc64dac5095b7965a5e129664f606"
+            },
+            "inspection_reused": false,
+            "entries": {
+              "kernel_find_better_shallenge_nonce": {
+                "non_nop_instructions": 2380,
+                "scope": "entry_including_helpers"
+              }
+            }
+          },
+          "default": {
+            "llvm_ir_bytes": 460504,
+            "llvm_definitions": 54,
+            "ptx_bytes": 97085,
+            "cubin_bytes": 58808,
+            "hashes": {
+              "final-module.ll": "fabad9211754fa12814ef402244759fabeb8271ad5ab5294591940f9ef5bce94",
+              "rust_kernels.ptx": "09366b96ef8d5848c68b6de6823cd3ae727405e40ba18fa8e3fd7208afd81658",
+              "rust_kernels.cubin": "74477cb6760c5389cd35be58c8787a7d2cfb3e36946a40eab220c35b4cc0c07c",
+              "ptxas-resource-report.txt": "1ab0ae47b17d2a851fb062b62f44abb4059893b541ae71fe47ebc857e5adf304",
+              "resources.txt": "142755495610e8e258e3d9502614ca0b00e1b2b53c61bd832c2e0e5f4c38e71b",
+              "nvdisasm.txt": "658cc80d586177d989d998be88da4d9f45abc64dac5095b7965a5e129664f606"
+            },
+            "inspection_reused": true,
+            "entries": {
+              "kernel_find_better_shallenge_nonce": {
+                "non_nop_instructions": 2380,
+                "scope": "entry_including_helpers"
+              }
+            }
+          },
+          "inline-scalar": {
+            "llvm_ir_bytes": 185980,
+            "llvm_definitions": 3,
+            "ptx_bytes": 97006,
+            "cubin_bytes": 75584,
+            "hashes": {
+              "final-module.ll": "6274646078321d1b58ce428a1230fbc247c02ac7225530456fd44f9e65ceadff",
+              "rust_kernels.ptx": "c94ed049c87e2f816137eafe395aef29204cb01f5980d661799671033e9de576",
+              "rust_kernels.cubin": "bffb425d473f26a89c01f97084c6594bf35af8fc7a3d07992f7a9b724e3c5b61",
+              "ptxas-resource-report.txt": "29fcaad21cd83e83c553f15279ed0cff5c94223aa1350993b1624e46b2a2b436",
+              "resources.txt": "9bafef7cd7e94f03baa06c7c9ad979f2674cbbb223de247aaab2ead5518a32f5",
+              "nvdisasm.txt": "0300152fa78fa19c55e3fe7e172c447ed7f7b0ad1d23f10a2ce2ffec3beafb0e"
+            },
+            "inspection_reused": false,
+            "entries": {
+              "kernel_find_better_shallenge_nonce": {
+                "non_nop_instructions": 2710,
+                "scope": "entry_including_helpers"
+              }
+            }
+          }
+        }
+      },
+      "self_test": {
+        "source_commit": "d111f80dbfa2374fb50af5b6d49407ffab13bd1a",
+        "comparison": {
+          "workload": "self_test",
+          "expected_entry_count": 119,
+          "default_matches_disabled_ptx": true,
+          "inline_scalar_matches_replay": true,
+          "nvidia_execution": false,
+          "ptx_sha256": {
+            "none": "b02e56a91ea3e2091f52e2f151581a9ce599380fe66a2b4b2fb7449cbd19b403",
+            "default": "b02e56a91ea3e2091f52e2f151581a9ce599380fe66a2b4b2fb7449cbd19b403",
+            "inline-scalar": "14043453362a644df13b454f9627ea7e179fc3c8f2905443dc7f4e08e8b6abf9"
+          }
+        },
+        "provenance": {
+          "workload": "self_test",
+          "source_commit": "d111f80dbfa2374fb50af5b6d49407ffab13bd1a",
+          "mining_commit": "9791234249fc8cb762c296c4fda4503d2686ff77",
+          "expected_entries": [
+            "kernel_self_test_arith_blackbox_identity_u32",
+            "kernel_self_test_arith_blackbox_identity_u64",
+            "kernel_self_test_arith_carry_chain_3limb",
+            "kernel_self_test_arith_divrem_by_58_pow_5",
+            "kernel_self_test_arith_i128_chain_add",
+            "kernel_self_test_arith_mad_hi_u64",
+            "kernel_self_test_arith_mad_lo_u64",
+            "kernel_self_test_arith_mask_blend_false",
+            "kernel_self_test_arith_mask_blend_true",
+            "kernel_self_test_arith_mul_wide_u32",
+            "kernel_self_test_arith_overflowing_add",
+            "kernel_self_test_arith_overflowing_sub",
+            "kernel_self_test_arith_u128_imm_shr_52",
+            "kernel_self_test_arith_u128_mul",
+            "kernel_self_test_arith_u32_div_const",
+            "kernel_self_test_arith_u32_div_var",
+            "kernel_self_test_arith_u32_mul_lo",
+            "kernel_self_test_arith_u32_rem_var",
+            "kernel_self_test_arith_u64_div_const",
+            "kernel_self_test_arith_u64_div_var",
+            "kernel_self_test_arith_u64_mul_hi",
+            "kernel_self_test_arith_u64_mul_lo",
+            "kernel_self_test_arith_u64_rem_var",
+            "kernel_self_test_arith_var_shl_u64",
+            "kernel_self_test_arith_var_shr_u64",
+            "kernel_self_test_arith_widening_mul_chain_3term",
+            "kernel_self_test_arith_widening_mul_pair",
+            "kernel_self_test_base58_all_zeros",
+            "kernel_self_test_base58_div_by_58",
+            "kernel_self_test_base58_handrolled_no_seq",
+            "kernel_self_test_base58_inner_mutate_phase",
+            "kernel_self_test_base58_limb_divrem",
+            "kernel_self_test_base58_min_nonzero",
+            "kernel_self_test_base58_var_len",
+            "kernel_self_test_base58_var_len_leading_zero",
+            "kernel_self_test_bech32_p2wpkh",
+            "kernel_self_test_bitcoin_encoded",
+            "kernel_self_test_bitcoin_matches",
+            "kernel_self_test_bitcoin_pkh",
+            "kernel_self_test_bitcoin_priv",
+            "kernel_self_test_bitcoin_pub",
+            "kernel_self_test_compare_hashes_eq",
+            "kernel_self_test_compare_hashes_gt",
+            "kernel_self_test_compare_hashes_lt",
+            "kernel_self_test_dalek_clamp_integer",
+            "kernel_self_test_dalek_from_canonical_zero",
+            "kernel_self_test_dalek_mul_base_scalar_one",
+            "kernel_self_test_dalek_reduce_pipeline_zero",
+            "kernel_self_test_dalek_scalar52_as_bytes_one",
+            "kernel_self_test_dalek_scalar52_as_bytes_zero",
+            "kernel_self_test_dalek_scalar52_from_bytes",
+            "kernel_self_test_dalek_scalar52_from_bytes_zero",
+            "kernel_self_test_dalek_scalar52_montgomery_reduce_r",
+            "kernel_self_test_dalek_scalar52_montgomery_reduce_with_sub",
+            "kernel_self_test_dalek_scalar52_montgomery_reduce_zero",
+            "kernel_self_test_dalek_scalar52_mul_internal_then_reduce_one_r",
+            "kernel_self_test_dalek_scalar52_mul_internal_zero",
+            "kernel_self_test_dalek_scalar52_sub_no_underflow",
+            "kernel_self_test_dalek_scalar52_sub_with_underflow",
+            "kernel_self_test_dalek_scalar_eq_zero",
+            "kernel_self_test_dalek_scalar_from_bytes_wide_zero",
+            "kernel_self_test_dalek_scalar_one_to_bytes_direct",
+            "kernel_self_test_dalek_scalar_round_trip_one",
+            "kernel_self_test_dalek_scalar_round_trip_zero",
+            "kernel_self_test_dalek_zero_eq_zero",
+            "kernel_self_test_dynamic_index_write",
+            "kernel_self_test_ethereum_address",
+            "kernel_self_test_ethereum_priv",
+            "kernel_self_test_ethereum_pub",
+            "kernel_self_test_field_bytes_into_conversion",
+            "kernel_self_test_from_affine_coords_replica",
+            "kernel_self_test_generic_array_as_slice_last",
+            "kernel_self_test_generic_array_basic_index",
+            "kernel_self_test_generic_array_copy_from_ga_source",
+            "kernel_self_test_generic_array_copy_from_slice",
+            "kernel_self_test_index_trait_const_indices",
+            "kernel_self_test_index_trait_dispatch",
+            "kernel_self_test_iter_mut_alphabet_lookup",
+            "kernel_self_test_iter_mut_slice_partial",
+            "kernel_self_test_iter_static_slice_lookup",
+            "kernel_self_test_iter_static_table_lookup",
+            "kernel_self_test_k256_affine_generator_encode",
+            "kernel_self_test_k256_derive_scalar_one",
+            "kernel_self_test_k256_derive_scalar_two",
+            "kernel_self_test_k256_double_generator",
+            "kernel_self_test_k256_encode_generator",
+            "kernel_self_test_k256_encoded_point_from_affine_coords",
+            "kernel_self_test_k256_scalar_one_round_trip",
+            "kernel_self_test_k256_secret_from_bytes_one",
+            "kernel_self_test_named_field_struct_return",
+            "kernel_self_test_primitive_base58",
+            "kernel_self_test_primitive_ed25519",
+            "kernel_self_test_primitive_keccak256",
+            "kernel_self_test_primitive_ripemd160",
+            "kernel_self_test_primitive_secp256k1_compressed",
+            "kernel_self_test_primitive_secp256k1_uncompressed",
+            "kernel_self_test_primitive_sha256_32",
+            "kernel_self_test_primitive_sha256_variable",
+            "kernel_self_test_primitive_sha512",
+            "kernel_self_test_primitive_xoroshiro",
+            "kernel_self_test_reverse_range_write",
+            "kernel_self_test_shallenge_hash",
+            "kernel_self_test_shallenge_is_better",
+            "kernel_self_test_shallenge_nonce_len",
+            "kernel_self_test_slice_reverse_partial",
+            "kernel_self_test_solana_encoded",
+            "kernel_self_test_solana_priv",
+            "kernel_self_test_solana_pub",
+            "kernel_self_test_static_depth4_newtype_nesting",
+            "kernel_self_test_static_struct_wrapped_u64_lookup",
+            "kernel_self_test_static_u64_array_lookup",
+            "kernel_self_test_stub",
+            "kernel_self_test_subtle_choice_u8_into_bool",
+            "kernel_self_test_subtle_conditional_select_u64",
+            "kernel_self_test_wif_compressed_mainnet",
+            "kernel_self_test_wif_compressed_testnet",
+            "kernel_self_test_wif_uncompressed_mainnet",
+            "kernel_self_test_wif_uncompressed_testnet",
+            "kernel_self_test_xoroshiro_base64_nonce"
+          ]
+        },
+        "modes": {
+          "none": {
+            "llvm_ir_bytes": 26340781,
+            "llvm_definitions": 6166,
+            "ptx_bytes": 21849956,
+            "cubin_bytes": 24220008,
+            "hashes": {
+              "final-module.ll": "9cf0e946726d58bc7bb69bd2f55f5740226f367ffd026dee61ac0d2d20a740e5",
+              "rust_kernels.ptx": "b02e56a91ea3e2091f52e2f151581a9ce599380fe66a2b4b2fb7449cbd19b403",
+              "rust_kernels.cubin": "14088431787bdfb05bd78ede3a8c810e2c5b07ebf6ffc4ae9259c5d1319ddf3e",
+              "ptxas-resource-report.txt": "cc0f3cc72863c72364770759fb5cbbb8f451422cc153096ff08b452af844b780",
+              "resources.txt": "3fda899d4ab0e79e3eb159b939a424de3c6104d90ce7cbf00fa69cfc01d6b6b2",
+              "nvdisasm.txt": "0a5136e3cfcaf694e12f62f58a471507e5c84c8d2fe4dd55d308e4207e6d511e"
+            },
+            "inspection_reused": false
+          },
+          "default": {
+            "llvm_ir_bytes": 4560285,
+            "llvm_definitions": 605,
+            "ptx_bytes": 21849956,
+            "cubin_bytes": 24220008,
+            "hashes": {
+              "final-module.ll": "86fef76c0be329f722be0a016d0d522a2179b24bfb1f82feeac6dd53aa84cdfc",
+              "rust_kernels.ptx": "b02e56a91ea3e2091f52e2f151581a9ce599380fe66a2b4b2fb7449cbd19b403",
+              "rust_kernels.cubin": "14088431787bdfb05bd78ede3a8c810e2c5b07ebf6ffc4ae9259c5d1319ddf3e",
+              "ptxas-resource-report.txt": "cc0f3cc72863c72364770759fb5cbbb8f451422cc153096ff08b452af844b780",
+              "resources.txt": "3fda899d4ab0e79e3eb159b939a424de3c6104d90ce7cbf00fa69cfc01d6b6b2",
+              "nvdisasm.txt": "0a5136e3cfcaf694e12f62f58a471507e5c84c8d2fe4dd55d308e4207e6d511e"
+            },
+            "inspection_reused": true
+          },
+          "inline-scalar": {
+            "llvm_ir_bytes": 4946377,
+            "llvm_definitions": 159,
+            "ptx_bytes": 39891407,
+            "cubin_bytes": 23053904,
+            "hashes": {
+              "final-module.ll": "5960f3aadd78f8bbc1adee86b461577d24aee0859a60fc4024b056a500e3cf2f",
+              "rust_kernels.ptx": "14043453362a644df13b454f9627ea7e179fc3c8f2905443dc7f4e08e8b6abf9",
+              "rust_kernels.cubin": "eaff864fe47d4786025ea3f1c56b1445e4850db86c81a2d7b5961345b44a4311",
+              "ptxas-resource-report.txt": "21c31d750eb600fb92e5782eace3d459768e6a9f08bbcbfc8dfce8ef71534664",
+              "resources.txt": "cb5a1ba75c949cdd743f1ab676d65f38622003dd5c4db971f0aff8b549a7d6c4",
+              "nvdisasm.txt": "9b9af1421e723073092f9e18a5903ee685cfa12e8fa2a04de3e1fdb1f0167e43"
+            },
+            "inspection_reused": false
+          }
+        }
+      }
+    },
+    "verified_manifest_files": 378
+  }
+}
diff --git a/examples/ptx_export/evidence/representative-shuffle.ptx b/examples/ptx_export/evidence/representative-shuffle.ptx
new file mode 100644
index 00000000..9e87930c
--- /dev/null
+++ b/examples/ptx_export/evidence/representative-shuffle.ptx
@@ -0,0 +1,180 @@
+//
+// Generated by NVIDIA NVVM Compiler
+//
+// Compiler Build ID: UNKNOWN
+// Cuda compilation tools, release 13.2, V13.2.51
+// Based on NVVM 22.0.0
+//
+
+.version 9.2
+.target sm_100
+.address_size 64
+
+	// .globl	wave2_atomic
+.extern .func _RNvCsezl0Lmzkq7C_7___rustc35___rust_no_alloc_shim_is_unstable_v2
+()
+;
+// _RNvNvCs2kKYJgs4CIT_26ptx_representative_kernels12wave2_shared4TILE has been demoted
+
+.visible .entry wave2_atomic(
+	.param .u64 .ptr .align 1 wave2_atomic_param_0,
+	.param .u32 wave2_atomic_param_1
+)
+{
+	.reg .pred 	%p<2>;
+	.reg .b32 	%r<8>;
+	.reg .b64 	%rd<2>;
+
+	ld.param.b64 	%rd1, [wave2_atomic_param_0];
+	ld.param.b32 	%r2, [wave2_atomic_param_1];
+	mov.u32 	%r3, %tid.x;
+	mov.u32 	%r4, %ctaid.x;
+	mov.u32 	%r5, %ntid.x;
+	mad.lo.s32 	%r1, %r4, %r5, %r3;
+	setp.lt.u32 	%p1, %r1, %r2;
+	@%p1 bra 	$L__BB0_2;
+$L__BB0_1:
+	ret;
+$L__BB0_2:
+	add.s32 	%r7, %r1, 1;
+	// begin inline asm
+	atom.relaxed.gpu.add.u32 %r6, [%rd1], %r7;
+	// end inline asm
+	bra.uni 	$L__BB0_1;
+
+}
+	// .globl	wave2_float
+.visible .entry wave2_float(
+	.param .u64 .ptr .align 1 wave2_float_param_0,
+	.param .u64 .ptr .align 1 wave2_float_param_1,
+	.param .u64 .ptr .align 1 wave2_float_param_2,
+	.param .u32 wave2_float_param_3
+)
+{
+	.reg .pred 	%p<2>;
+	.reg .b32 	%r<9>;
+	.reg .b64 	%rd<11>;
+
+	ld.param.b64 	%rd1, [wave2_float_param_0];
+	ld.param.b64 	%rd2, [wave2_float_param_1];
+	ld.param.b64 	%rd3, [wave2_float_param_2];
+	ld.param.b32 	%r2, [wave2_float_param_3];
+	mov.u32 	%r3, %tid.x;
+	mov.u32 	%r4, %ctaid.x;
+	mov.u32 	%r5, %ntid.x;
+	mad.lo.s32 	%r1, %r4, %r5, %r3;
+	setp.lt.u32 	%p1, %r1, %r2;
+	@%p1 bra 	$L__BB1_2;
+$L__BB1_1:
+	ret;
+$L__BB1_2:
+	cvta.to.global.u64 	%rd4, %rd1;
+	cvta.to.global.u64 	%rd5, %rd2;
+	cvta.to.global.u64 	%rd6, %rd3;
+	mul.wide.u32 	%rd7, %r1, 4;
+	add.s64 	%rd8, %rd4, %rd7;
+	ld.global.b32 	%r6, [%rd8];
+	add.s64 	%rd9, %rd5, %rd7;
+	ld.global.b32 	%r7, [%rd9];
+	add.s64 	%rd10, %rd6, %rd7;
+	fma.rn.f32 	%r8, %r6, 0f3F000000, %r7;
+	st.global.b32 	[%rd10], %r8;
+	bra.uni 	$L__BB1_1;
+
+}
+	// .globl	wave2_shared
+.visible .entry wave2_shared(
+	.param .u64 .ptr .align 1 wave2_shared_param_0,
+	.param .u64 .ptr .align 1 wave2_shared_param_1,
+	.param .u32 wave2_shared_param_2
+)
+{
+	.reg .pred 	%p<2>;
+	.reg .b32 	%r<8>;
+	.reg .b64 	%rd<16>;
+	// demoted variable
+	.shared .align 4 .b8 _RNvNvCs2kKYJgs4CIT_26ptx_representative_kernels12wave2_shared4TILE[128];
+	ld.param.b64 	%rd2, [wave2_shared_param_0];
+	ld.param.b64 	%rd3, [wave2_shared_param_1];
+	ld.param.b32 	%r2, [wave2_shared_param_2];
+	mov.u32 	%r3, %tid.x;
+	mov.u32 	%r4, %ctaid.x;
+	mov.u32 	%r5, %ntid.x;
+	mad.lo.s32 	%r1, %r4, %r5, %r3;
+	cvt.u64.u32 	%rd1, %r3;
+	setp.lt.u32 	%p1, %r1, %r2;
+	@%p1 bra 	$L__BB2_2;
+	shl.b64 	%rd4, %rd1, 2;
+	mov.b64 	%rd5, _RNvNvCs2kKYJgs4CIT_26ptx_representative_kernels12wave2_shared4TILE;
+	add.s64 	%rd6, %rd5, %rd4;
+	st.shared.b32 	[%rd6], 0;
+	bar.sync 	0;
+	bra.uni 	$L__BB2_3;
+$L__BB2_2:
+	cvta.to.global.u64 	%rd7, %rd2;
+	cvta.to.global.u64 	%rd8, %rd3;
+	mul.wide.u32 	%rd9, %r1, 4;
+	add.s64 	%rd10, %rd7, %rd9;
+	ld.global.b32 	%r6, [%rd10];
+	shl.b64 	%rd11, %rd1, 2;
+	mov.b64 	%rd12, _RNvNvCs2kKYJgs4CIT_26ptx_representative_kernels12wave2_shared4TILE;
+	add.s64 	%rd13, %rd12, %rd11;
+	st.shared.b32 	[%rd13], %r6;
+	bar.sync 	0;
+	sub.s64 	%rd14, %rd12, %rd11;
+	ld.shared.b32 	%r7, [%rd14+124];
+	add.s64 	%rd15, %rd8, %rd9;
+	st.global.b32 	[%rd15], %r7;
+$L__BB2_3:
+	ret;
+
+}
+	// .globl	wave2_shuffle
+.visible .entry wave2_shuffle(
+	.param .u64 .ptr .align 1 wave2_shuffle_param_0,
+	.param .u64 .ptr .align 1 wave2_shuffle_param_1,
+	.param .u32 wave2_shuffle_param_2
+)
+{
+	.reg .pred 	%p<7>;
+	.reg .b32 	%r<15>;
+	.reg .b64 	%rd<9>;
+
+	ld.param.b64 	%rd1, [wave2_shuffle_param_0];
+	ld.param.b64 	%rd2, [wave2_shuffle_param_1];
+	ld.param.b32 	%r6, [wave2_shuffle_param_2];
+	mov.u32 	%r7, %tid.x;
+	mov.u32 	%r8, %ctaid.x;
+	mov.u32 	%r9, %ntid.x;
+	mad.lo.s32 	%r1, %r8, %r9, %r7;
+	setp.ge.u32 	%p5, %r1, %r6;
+	mov.b32 	%r14, 0;
+	@%p5 bra 	$L__BB3_2;
+	cvta.to.global.u64 	%rd3, %rd1;
+	mul.wide.u32 	%rd4, %r1, 4;
+	add.s64 	%rd5, %rd3, %rd4;
+	ld.global.b32 	%r14, [%rd5];
+$L__BB3_2:
+	setp.lt.u32 	%p6, %r1, %r6;
+	shfl.sync.idx.b32 	%r2|%p1, %r14, 31, 31, -1;
+	shfl.sync.up.b32 	%r3|%p2, %r14, 1, 0, -1;
+	shfl.sync.down.b32 	%r4|%p3, %r14, 1, 31, -1;
+	shfl.sync.bfly.b32 	%r5|%p4, %r14, 1, 31, -1;
+	@%p6 bra 	$L__BB3_4;
+$L__BB3_3:
+	ret;
+$L__BB3_4:
+	selp.b32 	%r10, %r2, -1, %p1;
+	cvta.to.global.u64 	%rd6, %rd2;
+	mul.wide.u32 	%rd7, %r1, 16;
+	add.s64 	%rd8, %rd6, %rd7;
+	st.global.b32 	[%rd8], %r10;
+	selp.b32 	%r11, %r3, -1, %p2;
+	st.global.b32 	[%rd8+4], %r11;
+	selp.b32 	%r12, %r4, -1, %p3;
+	st.global.b32 	[%rd8+8], %r12;
+	selp.b32 	%r13, %r5, -1, %p4;
+	st.global.b32 	[%rd8+12], %r13;
+	bra.uni 	$L__BB3_3;
+
+}
diff --git a/examples/ptx_export/evidence/size-s-apple.json b/examples/ptx_export/evidence/size-s-apple.json
new file mode 100644
index 00000000..d0204cf7
--- /dev/null
+++ b/examples/ptx_export/evidence/size-s-apple.json
@@ -0,0 +1,37 @@
+{
+  "run": 34788893575,
+  "mode": "size-s",
+  "producer_note": "Backend explicitly rebuilt from checked-out source f0d4bc2; full CI failed only on the then-restrictive host oracle.",
+  "consumer": "CuMetal generic PTX lowering",
+  "device": "Apple M5",
+  "nvidia_execution": false,
+  "performance_measurement": false,
+  "sha256": {
+    "ptx": "12816f04fe6378c3a6aca22340aa3ebbd6bddf79e8ddb5e4a4fb11a417af2ad6",
+    "cumetalc": "5d6dfdb0b26231d991226cf98d5d565c05e1a92cd374d2a1e71453a83531f45e",
+    "libcumetal": "a101fdff598e160af5ec6e9d5fffdb65b88bb19f47a9ae8364224abed1a7fdb0",
+    "vector_sha_runner": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448",
+    "vector_sha_harness": "bd62e6f8e55770f677697eb546569479a637796afc3bfa5e23e3821b57204992",
+    "guarded_runner": "165cad8e45b1fdc9f9c41ed2a69ae4fe3fc9d0d940b876aedd821c8ef87d8286",
+    "backend": "69d13bd1b945facf040916ae397e2a3dcf2cbf87e0bf069073430a5969f2b016"
+  },
+  "results": {
+    "vector_add": [
+      "NUMERICAL_PASS kernel=rust_vecadd count=1",
+      "NUMERICAL_PASS kernel=rust_vecadd count=31",
+      "NUMERICAL_PASS kernel=rust_vecadd count=32",
+      "NUMERICAL_PASS kernel=rust_vecadd count=33",
+      "NUMERICAL_PASS kernel=rust_vecadd count=257"
+    ],
+    "sha256": [
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=1",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=31",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=32",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=33",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=257"
+    ],
+    "guarded_select": [
+      "NUMERICAL_PASS rust_guarded_select: 1608 cases, independent oracle and guards; device=Apple M5 driver=/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib"
+    ]
+  }
+}
diff --git a/examples/ptx_export/evidence/size-z-apple.json b/examples/ptx_export/evidence/size-z-apple.json
new file mode 100644
index 00000000..3a6f12d9
--- /dev/null
+++ b/examples/ptx_export/evidence/size-z-apple.json
@@ -0,0 +1,37 @@
+{
+  "run": 34789386937,
+  "mode": "size-z",
+  "producer_note": "Backend explicitly rebuilt from checked-out source 9912360; size-z compiled and assembled, with its host oracle subsequently checked locally.",
+  "consumer": "CuMetal generic PTX lowering",
+  "device": "Apple M5",
+  "nvidia_execution": false,
+  "performance_measurement": false,
+  "sha256": {
+    "ptx": "2db6178ad724a88603a77362dc502b33a4f1c211605e1554de70c52f6f5726af",
+    "cumetalc": "5d6dfdb0b26231d991226cf98d5d565c05e1a92cd374d2a1e71453a83531f45e",
+    "libcumetal": "a101fdff598e160af5ec6e9d5fffdb65b88bb19f47a9ae8364224abed1a7fdb0",
+    "vector_sha_runner": "623f9230f26b9dbc5c4241b32b37c8831a0fb36e80970161d6aac72efd368448",
+    "vector_sha_harness": "bd62e6f8e55770f677697eb546569479a637796afc3bfa5e23e3821b57204992",
+    "guarded_runner": "165cad8e45b1fdc9f9c41ed2a69ae4fe3fc9d0d940b876aedd821c8ef87d8286",
+    "backend": "fe99352dc6af56df65435e6d8341822755e8c74f8c52514efa18c2e2012e4da7"
+  },
+  "results": {
+    "vector_add": [
+      "NUMERICAL_PASS kernel=rust_vecadd count=1",
+      "NUMERICAL_PASS kernel=rust_vecadd count=31",
+      "NUMERICAL_PASS kernel=rust_vecadd count=32",
+      "NUMERICAL_PASS kernel=rust_vecadd count=33",
+      "NUMERICAL_PASS kernel=rust_vecadd count=257"
+    ],
+    "sha256": [
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=1",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=31",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=32",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=33",
+      "NUMERICAL_PASS kernel=rust_sha256_32 count=257"
+    ],
+    "guarded_select": [
+      "NUMERICAL_PASS rust_guarded_select: 1608 cases, independent oracle and guards; device=Apple M5 driver=/Users/brandon/Desktop/gpu/cuda-metal/build-rust-ptx-apple/libcumetal.dylib"
+    ]
+  }
+}
diff --git a/examples/ptx_export/evidence/solana-first-sweep.json b/examples/ptx_export/evidence/solana-first-sweep.json
new file mode 100644
index 00000000..b9e8fcea
--- /dev/null
+++ b/examples/ptx_export/evidence/solana-first-sweep.json
@@ -0,0 +1,1388 @@
+{
+  "run_url": "https://github.com/brandonros/Rust-CUDA/actions/runs/34787847715",
+  "source_commit": "035dd42",
+  "overall_conclusion": "failure: size-s libm unnamed-closure ICE; independent mining and per-module stages passed",
+  "mining_source": {
+    "repository": "brandonros/vanity-miner-rs",
+    "commit": "9791234249fc8cb762c296c4fda4503d2686ff77",
+    "features": [
+      "solana"
+    ],
+    "source_change": "cuda_std dependency path only; algorithm source unchanged"
+  },
+  "module_comparison": [
+    {
+      "mode": "module-scalar",
+      "checked_modules": [
+        {
+          "module": "alloc.db92d2cefd4b37c3-cgu.0",
+          "before_sha256": "e36fd152272fc8c1335e3c2feea15f7e7e1c35e85912f159109829e7eda01bd9",
+          "after_sha256": "f3d61a32b8db91ca6152c3b48c924ed0d162e5758259d9e61322b55dfa05a290"
+        },
+        {
+          "module": "approx.a5aeaa64b8b16a1a-cgu.0",
+          "before_sha256": "a09803573eda9c38df0e32ddc95afd0e8f5066a2f3de37ef64a7346862a27d59",
+          "after_sha256": "a09803573eda9c38df0e32ddc95afd0e8f5066a2f3de37ef64a7346862a27d59"
+        },
+        {
+          "module": "bitflags.a1aa5b3b847d94b1-cgu.0",
+          "before_sha256": "5b3a8fa14ad6ca0bbfa4748d8313553c6c178e555a7d3a842b3e330263f7afeb",
+          "after_sha256": "59fe82184ff722b86ae33a5b30f06e606f6a958599b14873fdefab3244e92ce4"
+        },
+        {
+          "module": "block_buffer.ae48ca0a9eee40da-cgu.0",
+          "before_sha256": "41a028bc4881212e6cc9ecb8692a4b0a49305f74da6a2a778fea84717b5f86ac",
+          "after_sha256": "9ae01f2692158c0fcdc290b0f23be2a46c3a3caa8ebc5843e30797de9a4a6ca8"
+        },
+        {
+          "module": "bytemuck.ecfb16e253e8a4cc-cgu.0",
+          "before_sha256": "4c01787fbbc7032c90bf37539e85878e84a7697ede5a62e2d2fa57417b0bea7e",
+          "after_sha256": "9ba0faa63d3551e52514b4876f1d0666b0b345a95e320a2cfd026326569069eb"
+        },
+        {
+          "module": "cfg_if.b0d531e8253afbb1-cgu.0",
+          "before_sha256": "9ed5cece512c44cd2093ace95bd9b6e9daa9b2fcd16d9313b3966c3ec9379e4b",
+          "after_sha256": "9ed5cece512c44cd2093ace95bd9b6e9daa9b2fcd16d9313b3966c3ec9379e4b"
+        },
+        {
+          "module": "compiler_builtins.12c16fcd1a28ec14-cgu.0",
+          "before_sha256": "dbfd849d603fde1d3825724f0aab5730faa79737413406ccb1258ad5970e24dd",
+          "after_sha256": "b8b217a981725c3694b346a6c0ce61f639576bbb43d0752594e18c091a5e7a1a"
+        },
+        {
+          "module": "core.4beac192b0c016ff-cgu.0",
+          "before_sha256": "09f7c44981b0bed2351c161bffd4a7d32c8d0227e6c69fae69f97a9df5764ff4",
+          "after_sha256": "bac53277079428bd04f4b86cb95abbce75769c1ae3d7c42fa91f05c5e7b1f240"
+        },
+        {
+          "module": "crypto_common.a1e62d50f299315e-cgu.0",
+          "before_sha256": "7dbda2bde3fb9e52111684efb9fe5b61d9aef17e22fcc2e68ed15df9221b60a0",
+          "after_sha256": "99104b375bd44acb9a8080d9e8b93b90462860f6d58266b648cc21ec6a47894e"
+        },
+        {
+          "module": "cuda_std.a99d2b7dea7e26ee-cgu.0",
+          "before_sha256": "f8a7b4bd47a3c59fb2c949b5f38918fe7011975c8188175f2318e22799119079",
+          "after_sha256": "ff821cfb08e22cf1b61ea6b370655abcc04febb138612952da5003621c204736"
+        },
+        {
+          "module": "digest.38fa80e9116fa510-cgu.0",
+          "before_sha256": "1837b70e5765710c63735e3ab06158d505e0356249c7ca2811d540e227266733",
+          "after_sha256": "212ec6b5d48bdb418039a0637aa10b7224a80744267ba6200bcd2cf09ed0dc4d"
+        },
+        {
+          "module": "generic_array.ad3cf9217b947477-cgu.0",
+          "before_sha256": "0185175118e1a7813cd736807e64b6148055f7621d464a357cc68876172b198f",
+          "after_sha256": "2b4f86c1de107ac405d1375ed71b448fe25031f68ba0c743a8a08b78bf8ebc06"
+        },
+        {
+          "module": "glam.b20a111701f5a77d-cgu.0",
+          "before_sha256": "9302b65f7a4ac3fc94b8dec0465bbc3e67ab8ddae415fe1bbc3b32bf529cfd45",
+          "after_sha256": "3a8cb222421d5462162d738cef56a48754317b6d24bbda112df4ab9bfe7e8c30"
+        },
+        {
+          "module": "half.ef1b7904f047c497-cgu.0",
+          "before_sha256": "7f0aac31ecc3f0e30f07d3339585e092d5de960260dc6e0d054cd68b119ce571",
+          "after_sha256": "97e0e1f149f39abdd6062db87755db7961179922497623987c67b70594fa7985"
+        },
+        {
+          "module": "libm.34fca6bfda8fb45b-cgu.0",
+          "before_sha256": "548881e962b488b6438810ac12904ce3e665c0c8671b848615af71925fc65239",
+          "after_sha256": "86e5b28c3a838b4b61a977bffb79010e8e88657673aa8c4efbf491f562f6eea6"
+        },
+        {
+          "module": "num_integer.e486938c4c00d23e-cgu.0",
+          "before_sha256": "528dee4d1c32ef729e0270395f20c08cc5b33f609b01baa870cf55a2e09472dc",
+          "after_sha256": "1114a5d0a4b96b2803cd6149357d41769b0ea23974fb899c5e395d22c2ba1293"
+        },
+        {
+          "module": "num_traits.2772326fbe4efa6d-cgu.0",
+          "before_sha256": "2eb28cdd566996d73c3835912616e20e54ed74226ec8486c7ab4af451986cda4",
+          "after_sha256": "b881f105cc90f4170bf41d24c00e6001800c52fbdc1bf50b7630462f9c7beb5e"
+        },
+        {
+          "module": "ptx_export_kernels.c758adb8f2139fb0-cgu.0",
+          "before_sha256": "adc277269df3e50e3f85b730f3471518895e431208aea31843fbc22d6b8ba780",
+          "after_sha256": "dc8728166d15798925c60afcf5e4d5350fa89c0653bd1e2a496554971c04a72a"
+        },
+        {
+          "module": "sha2.1b8263e9f9388f11-cgu.0",
+          "before_sha256": "1b8397a0b7a7ab6beefa1b6e8a077efa5b728931d79d9a35ca5fb29da1e532f9",
+          "after_sha256": "3791cf40ee6bbdcc4168ced224a7063d54d5afc8404750bf5412c25bd74fe34a"
+        },
+        {
+          "module": "typenum.138dec7c706b21ff-cgu.0",
+          "before_sha256": "6751602b4f0ae4576b5ed5107330faf1b99ec495a8e68bb6861f26f8a861d854",
+          "after_sha256": "7dcc50d99c7cd4a11ff78043ba8cedd29676739eff1f75e75faeb24f5a3f1858"
+        },
+        {
+          "module": "vek.8da6af31559d6ddf-cgu.0",
+          "before_sha256": "c96338c4f46cfc2edd4025b613f75def18f13edc3ddbe719e8ba140f8527af44",
+          "after_sha256": "8ef4d7f785b984e1733e58d17e8a5dfbb6332b34f44d6c64b11b838d158c3585"
+        },
+        {
+          "module": "zerocopy.7d4ab889374fcaee-cgu.0",
+          "before_sha256": "32f1a28ad1067dc7175394fe1c0bbe7918179d217649206e383a832b9ec8a8a4",
+          "after_sha256": "32f1a28ad1067dc7175394fe1c0bbe7918179d217649206e383a832b9ec8a8a4"
+        }
+      ]
+    },
+    {
+      "mode": "module-inline",
+      "checked_modules": [
+        {
+          "module": "alloc.db92d2cefd4b37c3-cgu.0",
+          "before_sha256": "e36fd152272fc8c1335e3c2feea15f7e7e1c35e85912f159109829e7eda01bd9",
+          "after_sha256": "f3d61a32b8db91ca6152c3b48c924ed0d162e5758259d9e61322b55dfa05a290"
+        },
+        {
+          "module": "approx.a5aeaa64b8b16a1a-cgu.0",
+          "before_sha256": "a09803573eda9c38df0e32ddc95afd0e8f5066a2f3de37ef64a7346862a27d59",
+          "after_sha256": "a09803573eda9c38df0e32ddc95afd0e8f5066a2f3de37ef64a7346862a27d59"
+        },
+        {
+          "module": "bitflags.a1aa5b3b847d94b1-cgu.0",
+          "before_sha256": "5b3a8fa14ad6ca0bbfa4748d8313553c6c178e555a7d3a842b3e330263f7afeb",
+          "after_sha256": "59fe82184ff722b86ae33a5b30f06e606f6a958599b14873fdefab3244e92ce4"
+        },
+        {
+          "module": "block_buffer.ae48ca0a9eee40da-cgu.0",
+          "before_sha256": "41a028bc4881212e6cc9ecb8692a4b0a49305f74da6a2a778fea84717b5f86ac",
+          "after_sha256": "9ae01f2692158c0fcdc290b0f23be2a46c3a3caa8ebc5843e30797de9a4a6ca8"
+        },
+        {
+          "module": "bytemuck.ecfb16e253e8a4cc-cgu.0",
+          "before_sha256": "4c01787fbbc7032c90bf37539e85878e84a7697ede5a62e2d2fa57417b0bea7e",
+          "after_sha256": "9ba0faa63d3551e52514b4876f1d0666b0b345a95e320a2cfd026326569069eb"
+        },
+        {
+          "module": "cfg_if.b0d531e8253afbb1-cgu.0",
+          "before_sha256": "9ed5cece512c44cd2093ace95bd9b6e9daa9b2fcd16d9313b3966c3ec9379e4b",
+          "after_sha256": "9ed5cece512c44cd2093ace95bd9b6e9daa9b2fcd16d9313b3966c3ec9379e4b"
+        },
+        {
+          "module": "compiler_builtins.12c16fcd1a28ec14-cgu.0",
+          "before_sha256": "dbfd849d603fde1d3825724f0aab5730faa79737413406ccb1258ad5970e24dd",
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+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/baseline/module.bc"
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+      "total_seconds": 13.623974400000066,
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+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
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+          "end_label": ".L_x_80"
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+        },
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+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
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+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:216 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 216 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3913.169 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "df6b941a9612c8354d6e01a5aa46c8a651b1c9194cdb6a61f270dbb96a9e37eb",
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+        "rust_kernels.cubin": "f836fbfd7327b6e948d34c8f056ecccc68cc7501916caf2c50ef038da992b577",
+        "sass.txt": "300a7d653fe19ffef66d12a387c1d5744689ff4e3e3b38153c669419fe733a55"
+      }
+    },
+    {
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+      "passes": "globaldce,verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/dce-only/module.bc"
+      ],
+      "opt_seconds": 0.5055255649999708,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 12.134574445999988,
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+          },
+          "non_nop_instructions": 39738,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
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+            "IMAD.MOV.U32": 1,
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+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
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+          "end_label": ".L_x_80"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants23ED25519_BASEPOINT_TABLE": {
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+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:216 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 216 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3880.566 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "d9b55c42c2fe1eb65c552674fca5a290d40c21df8b9927c533db8336f1ab83c9",
+        "rust_kernels.ptx": "59486d4378de80f787d247e5713918f39305aa8a2b94409b4299082f09db0891",
+        "rust_kernels.cubin": "f836fbfd7327b6e948d34c8f056ecccc68cc7501916caf2c50ef038da992b577",
+        "sass.txt": "300a7d653fe19ffef66d12a387c1d5744689ff4e3e3b38153c669419fe733a55"
+      }
+    },
+    {
+      "name": "memory-early-cse",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/memory-early-cse/module.bc"
+      ],
+      "opt_seconds": 1.6801955029999363,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 10.925696800999958,
+      "ir_bytes": 609033,
+      "ir_definitions": 7,
+      "ptx_bytes": 1301076,
+      "cubin_bytes": 716024,
+      "sass_symbols": {
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+            "RET.REL.NODEC": 2,
+            "BMOV.32.CLEAR": 1,
+            "BMOV.32": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 38428,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "opcode_histogram": {
+            "PRMT": 1,
+            "STL.U8": 1,
+            "LDL.U8": 1,
+            "IMAD.MOV.U32": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "opcode_histogram": {
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+            "MOV": 1,
+            "STL.128": 1,
+            "CALL.REL.NOINC": 1,
+            "BSYNC.RECONVERGENT": 1,
+            "LDL": 8,
+            "BMOV.32": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants23ED25519_BASEPOINT_TABLE": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:178 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3804.921 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "e14d5f4493e78f7d9598f6039db9bcf7c35af1b1ada9fd2a984b759391a319dd",
+        "rust_kernels.ptx": "a57cc6320ccb23d9db1fc34a8f96721da84ebdc239e2d3b034935b5015d3557e",
+        "rust_kernels.cubin": "e2438014642756be6c4e80540269201aa819a935ac8c428d6ffbf8126c2b0b7f",
+        "sass.txt": "a6a8dab3feaeb1c0b4d61473d0780b9e3ea97e02bcfe0a13e94bf20c1240539e"
+      }
+    },
+    {
+      "name": "memory-gvn",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(gvn,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(gvn,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/memory-gvn/module.bc"
+      ],
+      "opt_seconds": 1.6944986820000167,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 10.924424359999989,
+      "ir_bytes": 608821,
+      "ir_definitions": 7,
+      "ptx_bytes": 1301076,
+      "cubin_bytes": 716024,
+      "sass_symbols": {
+        "kernel_find_solana_vanity_private_key": {
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+            "S2UR": 3,
+            "S2R": 4,
+            "LDCU": 8,
+            "VIADD": 4582,
+            "MOV": 7,
+            "IMAD.MOV.U32": 813,
+            "LDCU.64": 7,
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+            "UIMAD": 2,
+            "IMAD": 394,
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+            "SHF.R.U32.HI": 411,
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+            "PRMT": 188,
+            "ISETP.GE.U32.AND": 2499,
+            "ISETP.GE.U32.AND.EX": 2502,
+            "SEL": 2502,
+            "SHF.R.S32.HI": 10,
+            "LEA.HI.SX32": 1,
+            "LEA.HI.X.SX32": 1,
+            "STL.64": 6,
+            "LDL.64": 3,
+            "LEA.HI": 186,
+            "LDL": 69,
+            "IMAD.SHL.U32": 39,
+            "IMAD.MOV": 83,
+            "LDG.E.64.CONSTANT": 1,
+            "CS2R": 26,
+            "BRA": 163,
+            "LDL.S8": 2,
+            "ISETP.NE.U32.AND": 81,
+            "LD.E.64": 30,
+            "UIADD3": 12,
+            "UIADD3.X": 3,
+            "UISETP.NE.U32.AND": 11,
+            "UISETP.NE.U32.AND.EX": 2,
+            "BRA.U": 12,
+            "IMAD.U32.X": 60,
+            "LEA": 100,
+            "LEA.HI.X": 100,
+            "UISETP.GT.U32.AND": 1,
+            "UISETP.GT.U32.AND.EX": 1,
+            "UISETP.GE.U32.AND": 1,
+            "UISETP.GE.U32.AND.EX": 1,
+            "USEL": 1,
+            "P2R": 24,
+            "ISETP.NE.AND": 24,
+            "PLOP3.LUT": 934,
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+            "LDL.U8": 155,
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+            "EXIT": 5,
+            "LDG.E.U8": 2,
+            "VOTEU.ANY": 2,
+            "FLO.U32": 1,
+            "ATOM.E.ADD.STRONG.GPU": 2,
+            "SHFL.IDX": 1,
+            "STG.E.U8": 128,
+            "STG.E": 1,
+            "UFLO.U32": 1,
+            "POPC": 1,
+            "RET.REL.NODEC": 2,
+            "BMOV.32.CLEAR": 1,
+            "BMOV.32": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 38428,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "opcode_histogram": {
+            "PRMT": 1,
+            "STL.U8": 1,
+            "LDL.U8": 1,
+            "IMAD.MOV.U32": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "opcode_histogram": {
+            "IMAD.MOV.U32": 11,
+            "VIADD": 2,
+            "LOP3.LUT": 8,
+            "STL": 8,
+            "BMOV.32.CLEAR": 1,
+            "LDCU": 2,
+            "LDL.U8": 16,
+            "BSSY.RECONVERGENT": 1,
+            "PRMT": 4,
+            "IMAD.U32": 4,
+            "IMAD.SHL.U32": 4,
+            "IADD3": 1,
+            "IMAD.X": 1,
+            "BRA": 2,
+            "MOV": 1,
+            "STL.128": 1,
+            "CALL.REL.NOINC": 1,
+            "BSYNC.RECONVERGENT": 1,
+            "LDL": 8,
+            "BMOV.32": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 12
+          },
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants23ED25519_BASEPOINT_TABLE": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:178 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3789.898 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "e431f1410516b673a9b9536ffa2ad14ce5b5cee78c8d2a8b9564c60cfa13cdae",
+        "rust_kernels.ptx": "a57cc6320ccb23d9db1fc34a8f96721da84ebdc239e2d3b034935b5015d3557e",
+        "rust_kernels.cubin": "e2438014642756be6c4e80540269201aa819a935ac8c428d6ffbf8126c2b0b7f",
+        "sass.txt": "a6a8dab3feaeb1c0b4d61473d0780b9e3ea97e02bcfe0a13e94bf20c1240539e"
+      }
+    },
+    {
+      "name": "memory-stores",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/memory-stores/module.bc"
+      ],
+      "opt_seconds": 1.7033125330000303,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 11.165993568999966,
+      "ir_bytes": 631267,
+      "ir_definitions": 7,
+      "ptx_bytes": 1301076,
+      "cubin_bytes": 715800,
+      "sass_symbols": {
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+            "MOV": 7,
+            "IMAD.MOV.U32": 816,
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+            "STG.E": 1,
+            "UFLO.U32": 1,
+            "POPC": 1,
+            "RET.REL.NODEC": 2,
+            "BMOV.32.CLEAR": 1,
+            "BMOV.32": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 38430,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "opcode_histogram": {
+            "PRMT": 1,
+            "STL.U8": 1,
+            "LDL.U8": 1,
+            "IMAD.MOV.U32": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "opcode_histogram": {
+            "IMAD.MOV.U32": 11,
+            "VIADD": 2,
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+            "IADD3": 1,
+            "IMAD.X": 1,
+            "BRA": 2,
+            "MOV": 1,
+            "STL.128": 1,
+            "CALL.REL.NOINC": 1,
+            "BSYNC.RECONVERGENT": 1,
+            "LDL": 8,
+            "BMOV.32": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants23ED25519_BASEPOINT_TABLE": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:178 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3918.378 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "335dfd6f9910e83ebef22dc66590f810e0b1925f177978dab01f9c148ab45505",
+        "rust_kernels.ptx": "6f0144acfc47cd5e2da4c91218cec8ce9ac29802fa844806728e7b3e027c090a",
+        "rust_kernels.cubin": "040f85f9dc2753b460873e7cea1bfe64e6952b360ab552a9fa6ef6e1eed0bfd7",
+        "sass.txt": "1b5917352921efd2715cc4e277ce32ebdd922407e74ed067781eef999dcd57a5"
+      }
+    },
+    {
+      "name": "memory-combined",
+      "passes": "globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,gvn,memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+      "opt_options": [],
+      "opt_command": [
+        "opt-19",
+        "-passes=globaldce,cgscc(inline),function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),globaldce,function(early-cse<memssa>,gvn,memcpyopt,dse,instcombine<max-iterations=2;no-verify-fixpoint>,adce),verify",
+        "-verify-each",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/final-module.ll",
+        "-o",
+        "/home/runner/work/Rust-CUDA/Rust-CUDA/artifacts/ptx/mining-solana/cleanup-experiment/memory-combined/module.bc"
+      ],
+      "opt_seconds": 1.7131483460000254,
+      "ptx_helpers": {},
+      "status": "compiled_and_assembled",
+      "total_seconds": 10.940300528999956,
+      "ir_bytes": 594746,
+      "ir_definitions": 7,
+      "ptx_bytes": 1301076,
+      "cubin_bytes": 715800,
+      "sass_symbols": {
+        "kernel_find_solana_vanity_private_key": {
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+            "S2UR": 3,
+            "S2R": 4,
+            "LDCU": 8,
+            "VIADD": 4579,
+            "MOV": 7,
+            "IMAD.MOV.U32": 816,
+            "LDCU.64": 7,
+            "LDC.64": 8,
+            "UIMAD": 2,
+            "IMAD": 394,
+            "IADD3": 4976,
+            "IADD3.X": 2184,
+            "SHF.R.U32.HI": 411,
+            "SHF.R.U64": 289,
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+            "IMAD.WIDE.U32": 5096,
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+            "SHF.L.W.U32.HI": 2186,
+            "UMOV": 271,
+            "IMAD.U32": 26,
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+            "PRMT": 188,
+            "ISETP.GE.U32.AND": 2499,
+            "ISETP.GE.U32.AND.EX": 2502,
+            "SEL": 2502,
+            "SHF.R.S32.HI": 10,
+            "LEA.HI.SX32": 1,
+            "LEA.HI.X.SX32": 1,
+            "STL.64": 6,
+            "LDL.64": 3,
+            "LEA.HI": 186,
+            "LDL": 69,
+            "IMAD.SHL.U32": 39,
+            "IMAD.MOV": 83,
+            "LDG.E.64.CONSTANT": 1,
+            "CS2R": 24,
+            "BRA": 163,
+            "LDL.S8": 2,
+            "ISETP.NE.U32.AND": 81,
+            "LD.E.64": 30,
+            "UIADD3": 12,
+            "UIADD3.X": 3,
+            "UISETP.NE.U32.AND": 11,
+            "UISETP.NE.U32.AND.EX": 2,
+            "BRA.U": 12,
+            "IMAD.U32.X": 60,
+            "LEA": 100,
+            "LEA.HI.X": 100,
+            "UISETP.GT.U32.AND": 1,
+            "UISETP.GT.U32.AND.EX": 1,
+            "UISETP.GE.U32.AND": 1,
+            "UISETP.GE.U32.AND.EX": 1,
+            "USEL": 1,
+            "P2R": 24,
+            "ISETP.NE.AND": 24,
+            "PLOP3.LUT": 934,
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+            "IMAD.HI.U32": 62,
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+            "IMAD.WIDE.U32.X": 50,
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+            "ISETP.LT.U32.AND": 3,
+            "ISETP.LT.U32.AND.EX": 3,
+            "ISETP.EQ.U32.AND": 5,
+            "ISETP.EQ.U32.OR.EX": 3,
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+            "ISETP.GT.U32.AND.EX": 10,
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+            "EXIT": 5,
+            "LDG.E.U8": 2,
+            "VOTEU.ANY": 2,
+            "FLO.U32": 1,
+            "ATOM.E.ADD.STRONG.GPU": 2,
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+            "STG.E.U8": 128,
+            "STG.E": 1,
+            "UFLO.U32": 1,
+            "POPC": 1,
+            "RET.REL.NODEC": 2,
+            "BMOV.32.CLEAR": 1,
+            "BMOV.32": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 38430,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_x_80"
+        },
+        "$kernel_find_solana_vanity_private_key$_RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek": {
+          "opcode_histogram": {
+            "PRMT": 1,
+            "STL.U8": 1,
+            "LDL.U8": 1,
+            "IMAD.MOV.U32": 1,
+            "RET.REL.NODEC": 1
+          },
+          "non_nop_instructions": 5,
+          "scope": "helper",
+          "end_label": "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed"
+        },
+        "$kernel_find_solana_vanity_private_key$_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed": {
+          "opcode_histogram": {
+            "IMAD.MOV.U32": 11,
+            "VIADD": 2,
+            "LOP3.LUT": 8,
+            "STL": 8,
+            "BMOV.32.CLEAR": 1,
+            "LDCU": 2,
+            "LDL.U8": 16,
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+            "PRMT": 4,
+            "IMAD.U32": 4,
+            "IMAD.SHL.U32": 4,
+            "IADD3": 1,
+            "IMAD.X": 1,
+            "BRA": 2,
+            "MOV": 1,
+            "STL.128": 1,
+            "CALL.REL.NOINC": 1,
+            "BSYNC.RECONVERGENT": 1,
+            "LDL": 8,
+            "BMOV.32": 1,
+            "RET.REL.NODEC": 1,
+            "NOP": 10
+          },
+          "non_nop_instructions": 79,
+          "scope": "helper",
+          "end_label": ".L_x_80"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants23ED25519_BASEPOINT_TABLE": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN"
+        },
+        "_RNvNtNtNtNtCs6Dk9HfbCoLE_16curve25519_dalek7backend6serial3u649constants40ED25519_BASEPOINT_TABLE_INNER_DOC_HIDDEN": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": "private$1V"
+        },
+        "private$1V": {
+          "opcode_histogram": {},
+          "non_nop_instructions": 0,
+          "scope": "entry_including_helpers",
+          "end_label": ".L_0"
+        }
+      },
+      "resources": "\nResource usage:\n Common:\n  GLOBAL:30786 CONSTANT[4]:24\n Function kernel_find_solana_vanity_private_key:\n  REG:178 STACK:208 SHARED:0 LOCAL:0 CONSTANT[0]:976 TEXTURE:0 SURFACE:0 SAMPLER:0\n",
+      "ptxas_report": "ptxas warning : '--preserve-relocs' option is not fully implemented for 'sm_100' and may not work as expected\nptxas warning : Registers are spilled to local memory in function '_RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed', 32 bytes spill stores, 32 bytes spill loads\nptxas info    : 30786 bytes gmem\nptxas info    : Compiling entry function 'kernel_find_solana_vanity_private_key' for 'sm_100'\nptxas info    : Function properties for kernel_find_solana_vanity_private_key\n    208 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\nptxas info    : Used 178 registers, used 0 barriers, 208 bytes cumulative stack size\nptxas info    : Compile time = 3898.325 ms\nptxas info    : Function properties for _RNvXs0_NtCslhAn9NXnFmt_12rand_xoshiro20xoroshiro128starstarNtB5_20Xoroshiro128StarStarNtCsjpL00qHfNVI_9rand_core11SeedableRng9from_seed\n    56 bytes stack frame, 32 bytes spill stores, 32 bytes spill loads\nptxas info    : Function properties for _RINvCs55dNBJaGPlB_6subtle9black_boxhECs6Dk9HfbCoLE_16curve25519_dalek\n    0 bytes stack frame, 0 bytes spill stores, 0 bytes spill loads\n",
+      "hashes": {
+        "final-module.ll": "e53b3959fa3ad29585308bc8bb544ea353a654a3dfd8fdb6f071bc6b83e13ccf",
+        "rust_kernels.ptx": "6f0144acfc47cd5e2da4c91218cec8ce9ac29802fa844806728e7b3e027c090a",
+        "rust_kernels.cubin": "040f85f9dc2753b460873e7cea1bfe64e6952b360ab552a9fa6ef6e1eed0bfd7",
+        "sass.txt": "1b5917352921efd2715cc4e277ce32ebdd922407e74ed067781eef999dcd57a5"
+      }
+    }
+  ],
+  "numerical_limit": "No NVIDIA runtime execution. CuMetal rejects baseline and memory-stores before launch: trap reporting requires a call-free kernel without barriers or collectives.",
+  "attribution_limit": "Inlining-only ablation is running separately; do not attribute all memory-pipeline gains to memory passes."
+}
diff --git a/examples/ptx_export/guarded-select.md b/examples/ptx_export/guarded-select.md
new file mode 100644
index 00000000..f93288a1
--- /dev/null
+++ b/examples/ptx_export/guarded-select.md
@@ -0,0 +1,429 @@
+# Guarded loop-carried value experiment
+
+This is a producer-side semantic experiment, not a confirmed Rust-CUDA bug
+reproducer. The original LLVM 19 Ed25519 PTX preserved a register on even loop
+iterations, then replaced it on odd iterations before using it. CuMetal's SSA
+import initially rejected the incoming undefined register. A smaller source
+program lets us investigate independently of curve arithmetic and CuMetal.
+
+The shared source is `kernels/src/guarded_select.rs`. It uses fully initialized,
+defined Rust and contains three separately named, non-inlined functions:
+
+| Function | Behavior | Expected dependency on initial value |
+| --- | --- | --- |
+| `preserved` | Conditionally update the remembered index; read the table only on odd iterations | None |
+| `direct` | Read the table at the current odd index directly | None |
+| `observed` | Conditionally update, but read the table on every iteration | Yes, when the loop executes |
+
+All loops cap the runtime limit at 64. All arithmetic sums wrap at 64 bits.
+The third function is a negative control: changing its conditional assignment
+to an unconditional assignment must change some results. We do not use
+uninitialized Rust values, `MaybeUninit`, or hand-authored PTX to force a shape.
+The compiler may legally remove the first function's initializer or the entire
+select. Emitting no self-referential `selp` is not a test failure; it means this
+candidate did not reproduce that instruction shape.
+
+## CPU checks on a Mac or Linux
+
+Run from the repository root; this needs only a native Rust compiler, no CUDA:
+
+```sh
+rustc --edition=2024 --test examples/ptx_export/kernels/src/guarded_select.rs -o /tmp/guarded-select-debug
+/tmp/guarded-select-debug
+rustc --edition=2024 -O --test examples/ptx_export/kernels/src/guarded_select.rs -o /tmp/guarded-select-release
+/tmp/guarded-select-release
+```
+
+Tests cover four tables, six initial values and 67 limits (0..65 plus u32::MAX):
+1,608 input combinations per build, each checking all three functions against
+an independent index-based oracle. High-bit values and wrapping sums are
+included. An explicit negative control uses table[i]=i, limit=1, initial=17:
+outputs must be `[0, 0, 17]`.
+
+These tests passed locally with native rustc 1.97.1 in both modes. They do not
+exercise the NVVM backend. The export workflow also runs them before exporting.
+
+Native optimized LLVM IR provides another useful observation: `preserved` no
+longer uses its initial-value argument or carries `remembered` around the loop;
+its odd branch directly indexes with the loop counter. `observed` retains the
+initial-value dependency. This demonstrates a legal optimization on the native
+backend, not the instruction shape that NVVM will produce. To inspect it:
+
+```sh
+rustc --edition=2024 -O --crate-type lib --emit=llvm-ir examples/ptx_export/kernels/src/guarded_select.rs -o /tmp/guarded-select-native.ll
+```
+
+## PTX generation and inspection
+
+On the supported Linux CUDA/NVVM environment for this checkout:
+
+```sh
+nix develop .#v19 --command cargo run -p ptx_export --features llvm19 -- artifacts/ptx
+```
+
+This worktree uses the portable PTX branch's LLVM 19 producer. The existing exporter includes `final-module.ll` and LLVM IR emission.
+Record the source revision, rustc version, CUDA/NVVM version and target for every
+comparison. The default/LLVM 7 path can also export with its matching `.#v7`
+flake shell and without `--features llvm19`. Keep outputs in
+separate directories. Do not assume identical targets between dialects.
+
+Find `rust_guarded_select` and its reachable helper functions in the PTX. Check
+whether a self-referential false operand survives optimization, and trace its
+uses and branch predicate if it does. Compare the observable control as well.
+The presence of a self-reference alone is not proof of incorrect code generation.
+
+## GPU ABI and oracle
+
+`rust_guarded_select(table, limits, initials, out, count)` takes:
+
+- A common 64-element u64 table.
+- `count` u32 limits and `count` u64 initial values.
+- An output allocation of `3 * count` u64s, plus optional guard words.
+
+Each work item writes `[preserved, direct, observed]`. Inputs and outputs must
+not overlap. The kernel bounds-checks its work-item index; launch extra threads
+to test this and verify trailing output guards.
+
+For `n = min(limit, 64)`, the independent expected outputs are:
+
+1. Sum of table[i] for odd i in 0..n, wrapping modulo 2^64.
+2. The same sum.
+3. For i=0 use table[initial & 63]; for i>0 use table[(i-1)|1],
+   summing over 0..n with the same wrapping. For n=0, all sums are zero.
+
+A future NVIDIA execution should compare all three outputs, not merely compare
+the first two: two incorrect functions could otherwise agree. Running on NVIDIA
+isolates Rust-CUDA/NVVM from CuMetal; running the same artifact on Metal adds a
+consumer comparison. This change adds the export kernel and CPU oracle, but no
+NVIDIA runner or GPU numerical result. PTX generation cannot run natively in
+this Mac's CUDA-less environment and has not yet been verified for this change.
+
+## LLVM 19 offline codegen artifact
+
+The export workflow now runs `inspect_codegen.py` after PTX generation. It uses
+that PTX's declared target, assembles at `-O3` with relocation preservation,
+and records NVIDIA disassembly and resource usage without launching a GPU.
+The `rust-ptx` artifact includes build commands/logs, compiler/tool versions,
+lockfiles, per-crate LLVM IR, linked `final-module.ll`, unchanged PTX, cubin,
+`nvdisasm.txt`, `sass.txt`, assembler spill/register reports, and checksums.
+`codegen-summary.md` and `.json` inventory named functions and opcodes.
+
+The analysis must follow the preserved/direct helpers through any merging,
+inlining or renaming. Static counts and matching histograms are not proofs of
+semantic equivalence or runtime cost. Use the observable control to distinguish
+removing unused preservation from incorrectly deleting a meaningful dependency.
+A missing self-select means this candidate did not reproduce the original PTX
+shape; it does not prove that the larger Ed25519 case was optimized identically.
+
+Tool semantics: [NVIDIA binary utilities](https://docs.nvidia.com/cuda/cuda-binary-utilities/).
+This artifact pipeline is LLVM 19 only; it does not involve the LLVM 21 worktree.
+
+## Measured LLVM 19 baseline (2026-09-13)
+
+[CI run 34782620441](https://github.com/brandonros/Rust-CUDA/actions/runs/34782620441)
+succeeded at source `f5df0590d2938c5dec42c38bf908dcd34ef193e8`. Download the
+`rust-ptx` artifact there for IR, PTX, cubin, disassembly and resource reports.
+All 43 checksummed artifact files verified after download. PTX SHA-256:
+`0abd6c9c5dc9b40eafd382180385bbd3c02d44a91c1e2e904e7951e835d72f60`.
+Assembler: CUDA 13.2, ptxas V13.2.51, target sm_100, optimization O3.
+
+| Helper | PTX instructions | Self-false PTX selects | SASS instructions through return | SASS global-load sites | SASS SEL sites |
+| --- | ---: | ---: | ---: | ---: | ---: |
+| preserved | 123 | 0 | 172 | 21 | 0 |
+| direct | 123 | 0 | 174 | 21 | 0 |
+| observed control | 180 | 1 | 238 | 22 | 11 |
+
+These are static counts, not per-launch or per-iteration counts. SASS counts
+exclude the trailing unreachable self-branch and ten NOP padding instructions
+following the final helper's return. Helper boundaries are the named function
+labels in `nvdisasm.txt`; cuobjdump groups them under the calling kernel.
+The assembler reports zero stack frame, spill stores and spill loads for all
+three helpers. The combined `rust_guarded_select` kernel uses 32 registers;
+that is not an independently measured register count for each variant.
+
+The PTX bodies for preserved/direct are textually identical after replacing
+their own function names and function-specific `$L__BB` prefixes. In contrast,
+the pre-NVVM `final-module.ll` still contains the initial/remembered storage.
+That dump is written before adding the module to NVVM (`nvvm.rs`), so the
+redundancy is eliminated by the time NVVM emits PTX. SASS has register-allocation
+and move differences; it is not byte-identical. The difference in static
+instruction counts does not establish that either source form runs faster.
+
+Conclusion: this candidate does not reproduce the original Ed25519 missed-
+optimization suspicion. It shows NVVM removes the unnecessary bookkeeping in
+the small guarded example while retaining selection for the observable control.
+The next useful reduction starts from the original Ed25519 loop and preserves
+its PTX self-select as a reduction criterion, rather than forcing an instruction
+into the small Rust source. NVIDIA runtime correctness and performance remain
+unmeasured.
+
+`ptxas` warned that relocation preservation is not fully implemented for sm_100.
+Both disassemblers completed successfully; the warning is retained in the raw
+assembler report and no complete-relocation guarantee is inferred.
+
+## Source-guided reduction: filtered iteration
+
+Dalek 4.1.3 `edwards.rs`, `mul_base`, iterates with
+`(0..$adds).filter(|x| x % 2 == 1)` before an even-index pass. The first
+reproducer used an explicit conditional inside the loop and omitted this
+iterator structure. The next candidate retains the filtered range but removes
+curve arithmetic, scalar conversion and the precomputed-point table, replacing
+the body with a wrapping sum of runtime table entries. `stepped` performs the
+same odd-index accesses using `step_by(2)` as a source-level comparison.
+
+`rust_filtered_select(table, limits, out, count)` writes two u64 results per
+case: filtered and stepped. Both must equal the existing independent sum of
+odd-index table entries for `min(limit, 64)`. CPU tests exercise both functions
+alongside the previous variants. No instruction shape is forced with assembly
+or undefined Rust. This is a candidate reduction until LLVM 19 output confirms
+whether an unobserved self-select survives.
+
+## Successful source reduction: filtered range (2026-09-13)
+
+[CI run 34783117581](https://github.com/brandonros/Rust-CUDA/actions/runs/34783117581)
+compiled, assembled and uploaded the reduction at source
+`d360d1184dfd36ec9723dea83c047cb234613e2b`. All downloaded artifact checksums
+verified. Full PTX SHA-256:
+`d97b462c4c17e9390b82f676d39d3359dd5a438598b10382fef8705ab9379f37`.
+
+The small `filtered` Rust function DOES reproduce the original shape. No curve
+arithmetic, scalar conversion, precomputed tables, or undefined Rust is needed:
+
+```rust
+let mut sum = 0u64;
+for i in (0..limit.min(64) as usize).filter(|x| x % 2 == 1) {
+    sum = sum.wrapping_add(table[i]);
+}
+```
+
+The exact emitted helper is checked in at
+[evidence/llvm19-filtered-helper.ptx](evidence/llvm19-filtered-helper.ptx).
+Its relevant original instructions are:
+
+```ptx
+and.b64 %rd5, %rd10, 1;
+setp.ne.b64 %p2, %rd5, 0;
+selp.b64 %rd11, %rd10, %rd11, %p2;
+mov.b64 %rd10, %rd3;
+@%p2 bra $L__BB1_3;
+bra.uni $L__BB1_1;
+$L__BB1_3:
+shl.b64 %rd6, %rd11, 3;
+```
+
+As in Ed25519, the selected index is read only on the matching true path. The
+false path preserves an index that is not observed before replacement. This is
+not the sum accumulator: `%rd9` carries that separately. The `stepped` comparison
+has no self-referential false select. Both source variants pass the CPU oracle in
+debug and optimized builds, including empty, capped, and wrapping-sum cases.
+
+Unlike the explicit-if candidate, NVIDIA assembly retains the index selection:
+
+```text
+/*0530*/      LOP3.LUT P1, RZ, R10, 0x1, RZ, 0xc0, !PT ;
+/*0540*/      SEL R11, R10, R11, P1 ;
+/*0550*/      SEL R14, R9, R14, P1 ;
+...
+/*0590*/  @P1 LEA R4, P0, R11, R4, 0x3 ;
+/*05a0*/  @P1 LEA.HI.X R5, R11, R5, R14, 0x3, P0 ;
+/*05b0*/  @P1 LDG.E.64 R4, desc[UR6][R4.64] ;
+```
+
+The 64-bit PTX select becomes two unpredicated 32-bit SASS selects. The indexed
+load remains predicated, so this is evidence of retained register bookkeeping,
+not an unnecessary table load. Both helpers have zero reported stack frame and
+spills. The combined `rust_filtered_select` kernel uses 17 registers; per-helper
+register savings are not established.
+
+The pre-NVVM LLVM IR for `filtered` calls the standard library's
+`Range<usize>::try_fold` with `Iterator::find::check`, returning an aggregate
+`ControlFlow<usize>` value. This provides the next compiler-side tracing point
+for how a filtered iterator result turns into the loop-carried select.
+
+This is now a concrete candidate missed optimization that survives PTX and SASS
+on CUDA 13.2 / sm_100, not merely a rejected CuMetal input. It is not a measured
+performance regression or proof of a Rust source correctness bug. `step_by`
+also changes loop structure; its instruction count alone is not a performance
+comparison. Next investigations can use this small case to compare NVIDIA's
+handling of the iterator lowering or benchmark equivalent loops on hardware.
+
+## Opt-in handoff cleanup investigation
+
+The workflow's manual `cleanup_experiment` input replays the saved pre-NVVM
+module with LLVM 19 `opt`, without changing compiler defaults. It compares:
+
+- `verify`: unchanged assembly/replay baseline.
+- `function(sroa,instcombine<max-iterations=2;no-verify-fixpoint>,simplifycfg,adce),verify`: local scalar/control cleanup.
+- `inline-only`: GlobalDCE, inlining, the same scalar cleanup, then GlobalDCE.
+- `inline-cleanup`: the `inline-only` stages followed by correlated-value
+  propagation, instruction combining, CFG simplification and aggressive DCE.
+  Exact bounded pass strings are recorded in `experiment.json`.
+
+`replay_cleanup.py` uses the backend's LLVM 19 intrinsic bitcode, toolkit
+libdevice, and the exporter's sole explicit NVVM option `-arch=compute_100`.
+Library hashes, commands, pass strings and per-stage logs are retained. The
+baseline must reproduce the original PTX function bodies (ignoring whitespace
+and comments) before cleanup comparisons proceed. This guard does not substitute
+for GPU numerical tests. Modified IR rejected by NVVM is reported as failure,
+not evidence that the cleanup is safe to enable by default.
+
+Artifacts are under `cleanup-experiment/`, with a separate IR/PTX/cubin/SASS and
+resource-report directory per variant and `experiment.json` for status. The
+initial investigation was launched as
+[run 34783692948](https://github.com/brandonros/Rust-CUDA/actions/runs/34783692948)
+on source `4678196`; this entry records launch, not a successful result.
+
+### Handoff verification prerequisite
+
+The first replay failed before running any cleanup: stock LLVM 19 rejected
+`@llvm.used = internal global ...` with `invalid linkage for intrinsic global
+variable`. The backend's internalization loop was changing every defined global
+to internal linkage, including special appending globals. The fix preserves
+appending linkage (including `llvm.used` and `llvm.compiler.used`) and leaves
+ordinary defined globals subject to the existing internalization behavior.
+The export workflow now verifies the real LLVM 19 handoff module with stock
+`opt-19` on every run, independent of whether cleanup replay is requested.
+This fixes a concrete IR validity issue; it is not a performance claim.
+
+### Experimental compiler integration
+
+`CudaBuilder::llvm19_cleanup(Llvm19Cleanup::Scalar)` opts into modern-PM
+SROA, instruction combining, CFG simplification and aggressive DCE at the
+merged-module handoff. `Llvm19Cleanup::Inline` additionally runs the modern
+inliner between GlobalDCE stages, then correlated-value propagation and
+a second scalar cleanup. The default is `None`; LLVM 7 requests
+are rejected. The low-level flags are `--llvm19-cleanup=scalar` and
+`--llvm19-cleanup=inline`. No target-independent CPU default pipeline is enabled.
+The wrapper registers modern analyses/proxies and verifies LLVM IR before and
+after the pass pipeline. NVVM verification/compilation still follow normally.
+
+The exporter accepts an optional second argument `scalar` or `inline` after
+its output directory. It saves both `final-module.before-cleanup.ll` and
+`final-module.ll`. The opt-in workflow now also compiles both modes through the
+real backend and requires their PTX function bodies to match offline replay,
+then assembles and disassembles them. This tests plumbing and output consistency;
+it does not establish numerical GPU correctness or warrant enabling defaults.
+
+InstCombine is explicitly bounded to two iterations with its fixed-point
+assertion disabled. LLVM 19's default one-iteration fixed-point assertion aborts
+on this valid handoff module; failing to finish all simplifications is distinct
+from producing invalid IR. Replay still uses `-verify-each`, and the integrated
+backend verifies the module before and after cleanup. This setting permits
+bounded optimization without promising that every combining opportunity is exhausted.
+
+### Runtime numerical check
+
+`run_guarded_select.py MODULE --kernel rust_guarded_select` loads unchanged PTX
+or cubin using NVIDIA's CUDA Driver API (`libcuda.so.1` by default). It checks
+1,608 runtime-input cases against an independent Python index oracle, including
+wrapping sums, boundary limits, the observable-false-path control and output
+guards. Use `--kernel rust_filtered_select` for the filtered/stepped pair.
+A compatible consumer can be selected explicitly with `--driver PATH`.
+
+The baseline artifact from run 34784267526 passed the guarded-select check on
+Apple M5 through CuMetal's generic PTX lowering, with workload specializations
+disabled. This is additional consumer evidence, not NVIDIA execution evidence.
+The filtered/stepped entry did not translate: CuMetal rejects a `trap` in the
+stepped helper. Do not report that entry as numerically validated or alter its
+PTX to bypass the check.
+
+The same baseline also passes vector addition and SHA-256 at counts 1, 31, 32,
+33 and 257 on M5. [`evidence/cleanup-baseline-apple.json`](evidence/cleanup-baseline-apple.json)
+records the PTX, translator/library and runner hashes plus numerical results.
+These are correctness checks, not timing comparisons.
+
+### Branch-correlated cleanup candidate
+
+Local LLVM 19.1.7 experiments on the verified handoff IR from run 34784267526
+found 3,299 definitions before cleanup. Pruning unreachable functions before
+inlining produced byte-identical final IR to pruning afterward, but the complete
+pruned pipeline took 0.56 seconds on this Mac. This is an illustrative local
+compiler-time observation, not a benchmark or GPU performance result.
+
+After inlining and initial scalar cleanup, the filtered helper has five IR
+selects. Repeating scalar cleanup leaves two. Correlated-value propagation
+before that second cleanup removes all of them; the observable-false-path
+control retains its one meaningful select. Adding jump threading did not
+further reduce the filtered helper's select/phi counts, so it is not included.
+All these local runs used `-verify-each`. NVIDIA compilation and numerical
+validation of this candidate remain separate gates. The integrated CI check
+asserts the filtered/control select counts and retention of all four exports.
+
+### Integrated target analysis and host IR regression
+
+Run 34784897164 compiled and assembled both standalone cleanup variants. The
+scalar integrated output matched replay, but inline SHA-256 differed despite
+byte-identical pre-cleanup IR. Stock `opt` supplies a target machine to its
+PassBuilder; the first integrated implementation omitted it. The integration
+now supplies a generic NVPTX target machine to match standalone analysis costs,
+with exact PTX comparison retained as a gate. NVVM still selects the compute
+architecture for final compilation. Run 34786097065 confirms this correction: both integrated modes match replay.
+
+`check_cleanup_ir.py` extracts the five integer-only helpers from the actual
+optimized module and links them to `cleanup_ir_oracle.c` for 1,608 host numerical
+cases. It changes only the target triple and data layout in the extracted host
+copy, rejects unexpected external/GPU declarations, and records commands,
+hashes and results. This passed locally for correlated-cleanup IR and now runs
+in the integrated inline CI check. It tests optimized IR behavior, not NVVM
+or NVIDIA execution, and supplements the PTX consumer checks.
+
+### NVIDIA results and remaining control flow
+
+Standalone replay in run 34785534228 confirms that correlated cleanup removes
+the two SASS selects in the filtered helper. Across the combined
+filtered/stepped kernel, selects drop from four to two, but non-NOP instructions
+increase from 103 to 124 and registers from 17 to 18. Global-load sites remain
+three and stack/spills remain zero. Scalar cleanup and inline-only cleanup
+still have four SASS selects. Removing bookkeeping is therefore established;
+a net performance improvement is not.
+
+A further standalone `constrained-cleanup` candidate tests LLVM constraint
+elimination after correlated cleanup. Locally it proves the filtered loop's
+remaining bounds check redundant and removes its trap; repeating correlated
+cleanup or running induction-variable cleanup did not. Its five extracted
+helpers pass the 1,608-case host oracle. It is replay-only until NVIDIA codegen
+measurements justify integrating it.
+
+[`evidence/cleanup-comparison.json`](evidence/cleanup-comparison.json) records
+per-variant PTX/SASS hashes and resource results from run 34785534228; artifact
+manifests were verified before recording them. Its correlated-cleanup PTX passes
+vector-add and SHA-256 at all five batch sizes and the 1,608 guarded-select cases
+on M5 through generic CuMetal lowering. The filtered/stepped entry remains
+blocked by the stepped helper's trap. These are standalone replay results; the
+integrated target-analysis correction is not yet confirmed by them.
+
+## Validated integration
+
+[Run 34786097065](https://github.com/brandonros/Rust-CUDA/actions/runs/34786097065),
+on `973e0ae`, passes all five standalone replay/assembly variants and both
+integrated modes. The integrated PTX function bodies match replay exactly.
+The inline IR has zero selects in `filtered` and one in the observable control;
+all four kernel exports remain. The five extracted optimized helpers pass
+1,608 numerical cases on Linux x86-64, in addition to local Apple ARM checks.
+The default remains disabled.
+
+| Pipeline | Combined filtered/stepped non-NOP SASS instructions | SASS selects | Registers |
+| --- | ---: | ---: | ---: |
+| Baseline | 103 | 4 | 17 |
+| Scalar | 115 | 4 | 16 |
+| Inline without correlated cleanup | 114 | 4 | 19 |
+| Integrated inline with correlated cleanup | 124 | 2 | 18 |
+| Additional constraint elimination (replay only) | 124 | 2 | 18 |
+
+Constraint elimination produces byte-identical PTX and SASS to correlated
+cleanup in this experiment, so it is not added to the compiler API. These
+counts describe static code for the combined kernel, not dynamic instruction
+counts or performance. Load sites stay unchanged; this is register bookkeeping,
+not removal of unnecessary table reads.
+
+Both integrated modes pass the available Apple M5 vector-add, SHA-256 and
+1,608-case guarded-select checks through generic CuMetal lowering. Inline PTX
+is byte-identical to the previously GPU-checked replay artifact. The combined
+filtered/stepped entry remains blocked by CuMetal's handling of `trap`; it has
+host IR numerical coverage but no GPU execution result. NVIDIA numerical tests,
+performance measurements and broader workload coverage remain prerequisites
+for considering a default optimization pipeline.
+
+[`evidence/cleanup-validated.json`](evidence/cleanup-validated.json) records
+source/run provenance, IR checks, PTX/SASS hashes, numerical evidence and
+consumer hashes. The CI artifact contains the full compiler output and logs.
diff --git a/examples/ptx_export/inspect_codegen.py b/examples/ptx_export/inspect_codegen.py
new file mode 100644
index 00000000..df98ae7d
--- /dev/null
+++ b/examples/ptx_export/inspect_codegen.py
@@ -0,0 +1,167 @@
+#!/usr/bin/env python3
+"""Collect offline NVIDIA codegen evidence; instruction counts are not timings."""
+import argparse
+from collections import Counter
+import hashlib
+import json
+from pathlib import Path
+import re
+import shutil
+import subprocess
+
+
+INSPECTION_OUTPUTS = ('rust_kernels.cubin', 'ptxas-resource-report.txt', 'nvdisasm.txt',
+                      'sass.txt', 'resources.txt', 'codegen-summary.json', 'codegen-summary.md')
+
+
+def reuse_inspection(candidate, out):
+    """Reuse offline reports only for identical PTX, tools and inspector code."""
+    if candidate.resolve() == out.resolve():
+        return False
+    required = (*INSPECTION_OUTPUTS, 'inspection-producer-sha256.txt', 'inspection-tools-sha256.json', 'inspection-commands.json',
+                'ptxas-version.txt', 'nvdisasm-version.txt', 'cuobjdump-version.txt', 'rust_kernels.ptx')
+    if not all((candidate/name).is_file() for name in required):
+        return False
+    for name in ('rust_kernels.ptx', 'inspection-producer-sha256.txt', 'inspection-tools-sha256.json',
+                 'ptxas-version.txt', 'nvdisasm-version.txt', 'cuobjdump-version.txt'):
+        if (candidate/name).read_bytes() != (out/name).read_bytes():
+            return False
+    copied = {}
+    for name in INSPECTION_OUTPUTS:
+        shutil.copy2(candidate/name, out/name)
+        copied[name] = hashlib.sha256((out/name).read_bytes()).hexdigest()
+    (out/'reused-inspection.json').write_text(json.dumps({
+        'source':str(candidate.resolve()),
+        'ptx_sha256':hashlib.sha256((out/'rust_kernels.ptx').read_bytes()).hexdigest(),
+        'original_commands':json.loads((candidate/'inspection-commands.json').read_text()),
+        'copied_sha256':copied,
+        'note':'Identical PTX, inspector source and tool version outputs; assembly/disassembly not rerun.'
+    },indent=2)+'\n')
+    return True
+
+
+def write_hashes(out):
+    hashes = [f'{hashlib.sha256(p.read_bytes()).hexdigest()}  {p.relative_to(out)}'
+              for p in sorted(out.rglob('*')) if p.is_file() and p.name != 'SHA256SUMS']
+    (out/'SHA256SUMS').write_text('\n'.join(hashes)+'\n')
+
+
+def ptx_functions(source):
+    # Only function definitions; prototypes end with ';' and are excluded.
+    pattern = r'\.(?:entry|func)\s+(?:\([^)]*\)\s*)?([\w.$]+)\s*\([^;{}]*\)[^;{}]*\{'
+    for match in re.finditer(pattern, source):
+        depth, end = 1, match.end()
+        while end < len(source) and depth:
+            depth += (source[end] == '{') - (source[end] == '}')
+            end += 1
+        if depth:
+            raise ValueError('unclosed PTX function body')
+        yield match[1], source[match.end():end - 1]
+
+
+def ptx_summary(source):
+    result = {}
+    for name, body in ptx_functions(source):
+        ops, selects = Counter(), []
+        for line in body.splitlines():
+            line = line.split('//', 1)[0].strip()
+            match = re.match(r'(?:@!?%[\w.$]+\s+)?([a-z][\w.]*)\s*(.*?)\s*;', line)
+            if not match:
+                continue
+            opcode, operands = match.groups()
+            ops[opcode] += 1
+            if opcode.startswith('selp.'):
+                parts = [part.strip() for part in operands.split(',')]
+                if len(parts) == 4 and parts[0] == parts[2]:
+                    selects.append(line)
+        result[name] = {'opcode_histogram': dict(ops), 'self_false_selects': selects}
+    return result
+
+
+def sass_summary(source):
+    result = {}
+    for chunk in re.split(r'Function\s*:\s*', source)[1:]:
+        name, _, body = chunk.partition('\n')
+        ops = Counter(re.findall(r'/\*[0-9a-fA-F]+\*/\s+(?:@!?[\w]+\s+)?([A-Z][A-Z0-9_.]*)\b', body))
+        result[name.strip()] = dict(ops)
+    return result
+
+
+def sass_symbols(source):
+    """Use nvdisasm symbol extents; entry extents may include helper bodies."""
+    labels = {m[1]: m.end() for m in re.finditer(r'^([\w.$]+):[ \t]*$', source, re.M)}
+    result = {}
+    for m in re.finditer(r'^\s*\.size\s+([\w.$]+),\(([\w.$]+)\s*-\s*([\w.$]+)\)', source, re.M):
+        name, end, start = m.groups()
+        if name != start or start not in labels or end not in labels:
+            raise ValueError(f'unresolved SASS symbol extent: {m[0].strip()}')
+        if labels[end] <= labels[start]: raise ValueError(f'invalid SASS extent: {name}')
+        body = source[labels[start]:labels[end]]
+        ops = Counter(re.findall(r'/\*[0-9a-fA-F]+\*/\s+(?:@!?[\w]+\s+)?([A-Z][A-Z0-9_.]*)\b', body))
+        result[name] = {'opcode_histogram': dict(ops),
+                        'non_nop_instructions': sum(ops.values()) - ops.get('NOP', 0),
+                        'scope': 'helper' if name.startswith('$') else 'entry_including_helpers',
+                        'end_label': end}
+    return result
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('artifacts', type=Path)
+    parser.add_argument('--reuse-from', type=Path, action='append', default=[])
+    args = parser.parse_args()
+    out = args.artifacts.resolve()
+    (out/'inspection-producer-sha256.txt').write_text(hashlib.sha256(Path(__file__).read_bytes()).hexdigest()+'\n')
+    source = (out / 'rust_kernels.ptx').read_text()
+    target = re.search(r'^\s*\.target\s+(sm_\d+[af]?)\b', source, re.M)
+    if not target:
+        raise ValueError('PTX target missing; refusing to guess an architecture')
+    commands = []
+
+    def run(argv, filename):
+        commands.append(argv)
+        (out / 'inspection-commands.json').write_text(json.dumps(commands, indent=2) + '\n')
+        with (out / filename).open('w') as log:
+            subprocess.run(argv, stdout=log, stderr=subprocess.STDOUT, check=True)
+
+    tool_hashes = {}
+    for tool in ('ptxas', 'nvdisasm', 'cuobjdump'):
+        path = shutil.which(tool)
+        if path is None:
+            raise RuntimeError(f'{tool} is unavailable')
+        run([path, '--version'], f'{tool}-version.txt')
+        tool_hashes[tool] = hashlib.sha256(Path(path).read_bytes()).hexdigest()
+    (out/'inspection-tools-sha256.json').write_text(json.dumps(tool_hashes,sort_keys=True)+'\n')
+    for candidate in args.reuse_from:
+        if reuse_inspection(candidate.resolve(), out):
+            write_hashes(out)
+            print(f'reused identical PTX inspection from {candidate}',flush=True)
+            return
+    run(['ptxas', '-arch=' + target[1], '-O3', '--verbose', '--warn-on-spills',
+         '--preserve-relocs', str(out / 'rust_kernels.ptx'), '-o', str(out / 'rust_kernels.cubin')],
+        'ptxas-resource-report.txt')
+    run(['nvdisasm', str(out / 'rust_kernels.cubin')], 'nvdisasm.txt')
+    run(['cuobjdump', '--dump-sass', str(out / 'rust_kernels.cubin')], 'sass.txt')
+    run(['cuobjdump', '--dump-resource-usage', str(out / 'rust_kernels.cubin')], 'resources.txt')
+    summary = {'target': target[1], 'ptx': ptx_summary(source),
+               'sass': sass_summary((out / 'sass.txt').read_text()),
+               'sass_symbols': sass_symbols((out / 'nvdisasm.txt').read_text()),
+               'ptx_bytes': (out / 'rust_kernels.ptx').stat().st_size,
+               'cubin_bytes': (out / 'rust_kernels.cubin').stat().st_size}
+    (out / 'codegen-summary.json').write_text(json.dumps(summary, indent=2) + '\n')
+    lines = ['# Guarded-select codegen inventory', '',
+             'Static instruction counts only; no GPU execution or performance claim.',
+             'Names absent below may have been inlined, merged or removed; inspect raw output.', '',
+             '| PTX symbol | Static instructions | Self-false selects |', '| --- | ---: | ---: |']
+    for name, data in summary['ptx'].items():
+        if any(word in name for word in ('preserved', 'direct', 'observed', 'guarded_select')):
+            lines.append(f"| `{name}` | {sum(data['opcode_histogram'].values())} | {len(data['self_false_selects'])} |")
+    lines += ['', 'SASS opcode histograms are in `codegen-summary.json`; use `resources.txt`',
+              'and `ptxas-resource-report.txt` for registers, stack and spill reports.',
+              'Matching histograms do not establish equivalent machine code.', '']
+    (out / 'codegen-summary.md').write_text('\n'.join(lines))
+    write_hashes(out)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/kernels/Cargo.toml b/examples/ptx_export/kernels/Cargo.toml
new file mode 100644
index 00000000..8495a999
--- /dev/null
+++ b/examples/ptx_export/kernels/Cargo.toml
@@ -0,0 +1,12 @@
+[package]
+name = "ptx-export-kernels"
+version = "0.1.0"
+edition = "2024"
+publish = false
+
+[dependencies]
+cuda_std = { path = "../../../crates/cuda_std" }
+sha2 = { version = "0.10", default-features = false }
+
+[lib]
+crate-type = ["cdylib", "rlib"]
diff --git a/examples/ptx_export/kernels/src/guarded_select.rs b/examples/ptx_export/kernels/src/guarded_select.rs
new file mode 100644
index 00000000..69697e22
--- /dev/null
+++ b/examples/ptx_export/kernels/src/guarded_select.rs
@@ -0,0 +1,112 @@
+//! Defined Rust source for investigating loop-carried conditional selection.
+//! All initial values and table contents come from the caller; no uninitialized
+//! Rust memory or compiler-specific assembly is used.
+
+#[inline(never)]
+pub fn preserved(table: &[u64; 64], limit: u32, initial: u64) -> u64 {
+    let mut remembered = initial;
+    let mut sum = 0u64;
+    for i in 0..limit.min(64) {
+        let odd = i & 1 != 0;
+        if odd {
+            remembered = u64::from(i);
+        }
+        if odd {
+            sum = sum.wrapping_add(table[(remembered & 63) as usize]);
+        }
+    }
+    sum
+}
+
+#[inline(never)]
+pub fn direct(table: &[u64; 64], limit: u32) -> u64 {
+    let mut sum = 0u64;
+    for i in 0..limit.min(64) {
+        if i & 1 != 0 {
+            sum = sum.wrapping_add(table[i as usize]);
+        }
+    }
+    sum
+}
+
+/// Negative control: the false-path value is observed, including at i=0.
+/// Replacing the conditional assignment with `remembered = i` is incorrect.
+#[inline(never)]
+pub fn observed(table: &[u64; 64], limit: u32, initial: u64) -> u64 {
+    let mut remembered = initial;
+    let mut sum = 0u64;
+    for i in 0..limit.min(64) {
+        if i & 1 != 0 {
+            remembered = u64::from(i);
+        }
+        sum = sum.wrapping_add(table[(remembered & 63) as usize]);
+    }
+    sum
+}
+
+/// Preserve Dalek's filtered-range idiom; strip curve arithmetic first.
+#[inline(never)]
+pub fn filtered(table: &[u64; 64], limit: u32) -> u64 {
+    let mut sum = 0u64;
+    for i in (0..limit.min(64) as usize).filter(|x| x % 2 == 1) {
+        sum = sum.wrapping_add(table[i]);
+    }
+    sum
+}
+
+/// Same odd-index accesses, without Filter::next's retained result.
+#[inline(never)]
+pub fn stepped(table: &[u64; 64], limit: u32) -> u64 {
+    let mut sum = 0u64;
+    for i in (1..limit.min(64) as usize).step_by(2) {
+        sum = sum.wrapping_add(table[i]);
+    }
+    sum
+}
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn compare_against_independent_index_oracle() {
+        for seed in [0u64, 1, 0x8000_0000_0000_0000, u64::MAX] {
+            let table = core::array::from_fn(|i| {
+                (i as u64)
+                    .wrapping_mul(0x9e37_79b9_7f4a_7c15)
+                    .wrapping_add(seed)
+            });
+            for limit in (0..=65).chain([u32::MAX]) {
+                for initial in [0u64, 1, 17, 63, 64, u64::MAX] {
+                    let n = limit.min(64) as usize;
+                    let expected = (1..n)
+                        .step_by(2)
+                        .fold(0u64, |sum, i| sum.wrapping_add(table[i]));
+                    // Last odd index <= i; on the first iteration use initial.
+                    let observed_expected = (0..n).fold(0u64, |sum, i| {
+                        let index = if i == 0 {
+                            (initial & 63) as usize
+                        } else {
+                            (i - 1) | 1
+                        };
+                        sum.wrapping_add(table[index])
+                    });
+                    assert_eq!(preserved(&table, limit, initial), expected);
+                    assert_eq!(direct(&table, limit), expected);
+                    assert_eq!(filtered(&table, limit), expected);
+                    assert_eq!(stepped(&table, limit), expected);
+                    assert_eq!(observed(&table, limit, initial), observed_expected);
+                }
+            }
+        }
+    }
+
+    #[test]
+    fn control_detects_discarding_a_live_false_arm() {
+        let table = core::array::from_fn(|i| i as u64);
+        assert_eq!(preserved(&table, 1, 17), 0);
+        assert_eq!(direct(&table, 1), 0);
+        assert_eq!(observed(&table, 1, 17), 17);
+        assert_ne!(observed(&table, 1, 17), table[0]);
+    }
+}
diff --git a/examples/ptx_export/kernels/src/lib.rs b/examples/ptx_export/kernels/src/lib.rs
new file mode 100644
index 00000000..29f199be
--- /dev/null
+++ b/examples/ptx_export/kernels/src/lib.rs
@@ -0,0 +1,85 @@
+use cuda_std::prelude::*;
+use sha2::{Digest, Sha256};
+
+/// Add `count` floats. All pointers address buffers of at least `count` elements.
+///
+/// # Safety
+/// Inputs must be readable and output writable, with no overlapping buffers.
+#[kernel]
+pub unsafe fn rust_vecadd(a: *const f32, b: *const f32, out: *mut f32, count: u32) {
+    let i = thread::index_1d();
+    if i < count {
+        unsafe { *out.add(i as usize) = *a.add(i as usize) + *b.add(i as usize) };
+    }
+}
+
+/// Hash `count` independent 32-byte messages into 32-byte digests.
+///
+/// # Safety
+/// Input/output each address `count * 32` bytes and must not overlap.
+#[kernel]
+pub unsafe fn rust_sha256_32(input: *const u8, out: *mut u8, count: u32) {
+    let i = thread::index_1d();
+    if i < count {
+        let offset = i as usize * 32;
+        let message = unsafe { core::slice::from_raw_parts(input.add(offset), 32) };
+        let digest = Sha256::digest(message);
+        unsafe { core::ptr::copy_nonoverlapping(digest.as_ptr(), out.add(offset), 32) };
+    }
+}
+
+mod guarded_select;
+
+/// Compare guarded loop forms with runtime inputs; write three u64s per case:
+/// preserved, direct, and the observable-false-arm negative control.
+///
+/// # Safety
+/// `table` addresses 64 readable u64s, `limits` and `initials` address `count`
+/// readable elements, and `out` addresses `count * 3` writable u64s.
+/// Output must not overlap any input. The loop limit is capped at 64.
+#[kernel]
+pub unsafe fn rust_guarded_select(
+    table: *const u64,
+    limits: *const u32,
+    initials: *const u64,
+    out: *mut u64,
+    count: u32,
+) {
+    let i = thread::index_1d();
+    if i < count {
+        let i = i as usize;
+        let table = unsafe { &*table.cast::<[u64; 64]>() };
+        let limit = unsafe { *limits.add(i) };
+        let initial = unsafe { *initials.add(i) };
+        unsafe {
+            *out.add(i * 3) = guarded_select::preserved(table, limit, initial);
+            *out.add(i * 3 + 1) = guarded_select::direct(table, limit);
+            *out.add(i * 3 + 2) = guarded_select::observed(table, limit, initial);
+        }
+    }
+}
+
+/// Compare the filtered iterator in Dalek's basepoint multiplication with a
+/// stepped iterator, using runtime table contents and loop limits.
+///
+/// # Safety
+/// `table` addresses 64 readable u64s, `limits` addresses `count` readable u32s,
+/// and `out` addresses `count * 2` writable u64s. Output must not overlap inputs.
+#[kernel]
+pub unsafe fn rust_filtered_select(
+    table: *const u64,
+    limits: *const u32,
+    out: *mut u64,
+    count: u32,
+) {
+    let i = thread::index_1d();
+    if i < count {
+        let i = i as usize;
+        let table = unsafe { &*table.cast::<[u64; 64]>() };
+        let limit = unsafe { *limits.add(i) };
+        unsafe {
+            *out.add(i * 2) = guarded_select::filtered(table, limit);
+            *out.add(i * 2 + 1) = guarded_select::stepped(table, limit);
+        }
+    }
+}
diff --git a/examples/ptx_export/optimization-results.md b/examples/ptx_export/optimization-results.md
new file mode 100644
index 00000000..b389732e
--- /dev/null
+++ b/examples/ptx_export/optimization-results.md
@@ -0,0 +1,116 @@
+# LLVM 19 optimization results
+
+The five-area investigation found two useful opt-in additions: standalone
+GlobalDCE reduces the IR handed to NVVM, and inlining plus scalar cleanup
+improves static Solana code metrics. Extra memory passes, tested CFG reorderings,
+and size-oriented profiles did not justify a general default change.
+
+This is an LLVM 19 / CUDA 13.2 / `compute_100` investigation. It does not compare
+LLVM 7 or LLVM 21. NVIDIA results are compilation/disassembly measurements;
+NVIDIA runtime performance remains unmeasured.
+
+The complete [Linux matrix passed](https://github.com/brandonros/Rust-CUDA/actions/runs/34789945556)
+on source `11f26a4`. [Machine-readable results](evidence/optimization-final.json)
+include all 17 small-suite variants, eight Solana variants, four integrated
+merged modes, both per-module modes and both size profiles, with hashes,
+per-symbol counts, resource reports and host-oracle results. The final artifacts
+are byte-identical to the PTX used for the linked Apple GPU checks.
+
+## Decisions
+
+| Area | Result | Implementation decision |
+| --- | --- | --- |
+| CFG cleanup ordering | Tested reordered/omitted SimplifyCFG stages. None beats the small filtered helper's 28 baseline non-NOP instructions. Correlated propagation removes two selects but grows that helper to 49 instructions. | Keep correlated cleanup experimental; no more CFG passes added. |
+| Independent GlobalDCE | Small module: 3,299 → 93 definitions. Solana: 3,883 → 151. PTX and SASS remain byte-identical to their respective baselines. | Add verified `Llvm19Cleanup::GlobalDce`, independent of scalar cleanup/inlining. |
+| Computation/memory cleanup | EarlyCSE and GVN add no improvement beyond inlining on SHA-256 or Solana. Store cleanup does not reduce registers or load/store sites and adds two Solana instructions. | Retain the experiments; do not add these passes to the integrated pipelines. |
+| Inlining/size policy | Inlining plus scalar cleanup improves Solana metrics. Thresholds 0/50/450 do not improve the small helper's count. Size profiles produce mixed results and increase SHA-256 stack usage. | Add `Llvm19Cleanup::InlineScalar`; retain explicit size experiments. No universal threshold/preset change. |
+| Per-module cleanup | Both modes verify and match independent replay across 22 codegen units, including dependencies. No SHA-256 instruction improvement; the filtered/stepped entry grows. | Add verified `.llvm19_module_cleanup(true)` for further workload experiments, disabled by default. |
+
+## Larger workload
+
+The actual Solana mining source is pinned to vanity-miner-rs `9791234`.
+Only its cuda_std dependency is redirected to the backend being tested;
+algorithm source is unchanged. Full source/manifest/lock provenance is in CI.
+
+| Pipeline | PTX bytes | Cubin bytes | Non-NOP SASS instructions | Registers |
+| --- | ---: | ---: | ---: | ---: |
+| Baseline | 1,481,081 | 739,480 | 39,738 | 216 |
+| GlobalDCE only | 1,481,081 | 739,480 | 39,738 | 216 |
+| Inlining + scalar cleanup | 1,301,076 | 716,024 | 38,428 | 178 |
+| Plus correlated propagation | 1,300,592 | 715,912 | 38,436 | 180 |
+| Plus EarlyCSE or GVN | 1,301,076 | 716,024 | 38,428 | 178 |
+| Plus memcpy/DSE cleanup | 1,301,076 | 715,800 | 38,430 | 178 |
+
+The inlining-only ablation is essential: the memory pipelines include inlining
+and scalar cleanup, which account for their improvement over baseline.
+Additional correlated propagation also loses to the simpler pipeline here.
+
+Kernel stack usage remains 208 bytes. The same RNG helper retains 32 bytes
+of spill stores and loads; the kernel entry reports zero spill bytes. Static
+load sites remain 288, while store sites change from 433 to 436 after inlining.
+These counts include helper code and are not dynamic memory traffic or timings.
+
+GlobalDCE shrinks Solana's printed LLVM module from 15,716,570 to 1,341,603 bytes.
+Single-run compiler timings are retained as observations, not controlled
+benchmarks. Byte-identical PTX/SASS means DCE's measured benefit is upstream
+compiler work, not a different GPU program.
+
+## Size-oriented builds
+
+These build the same Rust source with Cargo opt-level `s` or `z`, holding the
+merged `Inline` cleanup pipeline constant. They are not a new CPU-style LLVM
+optimization preset installed in the backend.
+
+| Profile | Whole-module PTX bytes | Whole-module cubin bytes | SHA-256 non-NOP instructions | SHA-256 registers | SHA-256 stack bytes |
+| --- | ---: | ---: | ---: | ---: | ---: |
+| Release level 3 + Inline | 106,091 | 58,376 | 1,623 | 40 | 112 |
+| Size `s` + Inline | 96,349 | 66,928 | 2,009 | 40 | 320 |
+| Size `z` + Inline | 94,320 | 60,008 | 1,920 | 39 | 320 |
+
+The guarded-select entry gets smaller (614 → 405 → 127 static instructions),
+but the filtered/stepped entry does not (124 → 130 → 128). Changing loop
+structure affects static counts; this does not establish runtime speed.
+A smaller PTX file is insufficient justification for a global size preset.
+
+## Correctness and reproducibility
+
+The workflow verifies LLVM IR, assembles PTX with ptxas, records disassembly,
+resources, versions, flags and hashes, and compares integrated output against
+independent `opt`/NVVM replay. The five extracted integer helpers have an
+independent 1,608-case host oracle, including the observable-false-path control.
+Extraction preserves referenced globals and target-independent intrinsics;
+it does not erase trap paths or substitute dummy data.
+
+Generic CuMetal execution on Apple M5 passes vector addition and SHA-256 at
+counts 1/31/32/33/257, plus 1,608 guarded-select cases, for the inlining/scalar
+and both size configurations. Guards remain intact. Evidence is recorded in
+`evidence/inline-scalar-apple.json`, `evidence/size-s-apple.json`, and
+`evidence/size-z-apple.json`; per-module scalar evidence is recorded separately.
+These are tests of the hashed PTX through another consumer, not NVIDIA execution.
+
+Full Solana numerical execution remains unvalidated: the current CuMetal
+consumer rejects both baseline and optimized PTX before launch because its trap
+reporting requires a call-free kernel without barriers or collectives. The
+filtered/stepped GPU entry also remains outside the successful GPU checks.
+Neither limitation was bypassed to obtain a pass.
+
+Two infrastructure fixes were required: the libdevice override lookup now skips
+unnamed libm closures instead of crashing at size optimization, and CI explicitly
+rebuilds the checked-out backend instead of trusting a restored shared library.
+Device outputs are regenerated so all per-module IR is present. The expensive
+host/backend dependency cache is retained.
+
+## Using the measured options
+
+```rust
+// Reduce unused IR before NVVM; no scalar rewriting or inlining.
+builder.llvm19_cleanup(Llvm19Cleanup::GlobalDce)
+
+// The simpler inlining pipeline favored by the Solana measurements.
+builder.llvm19_cleanup(Llvm19Cleanup::InlineScalar)
+```
+
+Both require the LLVM 19 feature and remain opt-in. The exporter accepts `dce`
+and `inline-scalar` after its output directory. When changing backend source,
+explicitly rebuild it as the workflow does; a cached backend library alone is
+not proof that the current source is being used. See the [exporter guide](README.md).
diff --git a/examples/ptx_export/optimization-roadmap.md b/examples/ptx_export/optimization-roadmap.md
new file mode 100644
index 00000000..6ca1fe3d
--- /dev/null
+++ b/examples/ptx_export/optimization-roadmap.md
@@ -0,0 +1,134 @@
+# LLVM 19 optimization investigation
+
+Wave 1 completed: the full [validation matrix](https://github.com/brandonros/Rust-CUDA/actions/runs/34789945556) passes.
+
+Wave 2 is tracked in [optimization-wave2.md](optimization-wave2.md). It promotes
+GlobalDCE with explicit disable and retention tests, while keeping instruction-transforming cleanup opt-in pending broader evidence.
+
+The evaluated outcomes are consolidated in [optimization-results.md](optimization-results.md).
+The chronological notes below retain the intermediate failures and their fixes.
+
+Objective: work through all five areas below using actual Rust-generated IR,
+NVIDIA PTX/SASS, resource reports and numerical checks. A smaller IR or PTX file
+alone is not a runtime performance result. Existing defaults stay unchanged
+until broader correctness and hardware measurements justify a change.
+
+| Area | Experiment | Required evidence | Status |
+| --- | --- | --- | --- |
+| CFG ordering | Omit/reorder final SimplifyCFG; compare cleanup with neither CFG stage | Per-helper filtered/stepped SASS, registers, numerical oracle | Evaluated: no improvement over baseline helper instruction count |
+| Independent DCE | GlobalDCE alone and before/after scalar cleanup | Reachable exports/data retained; IR/PTX sizes, compile time, unchanged behavior | Evaluated on both workloads; independent opt-in DCE integrated |
+| Computation/memory cleanup | EarlyCSE, GVN, memcpy optimization and DSE, separately and together | SHA-256 and a larger mining kernel; loads/stores, spills, numerical results | Evaluated on SHA and full Solana; no gain beyond inlining/scalar cleanup |
+| Inlining policy | Thresholds 0/50/450 plus a size-oriented build | Call sites, code size, registers, spills and correctness | Evaluated thresholds and both size modes; simpler inlining mode integrated |
+| Per-module optimization | Verified opt-in LLVM 19 cleanup before serialization, compared with merged-only cleanup | Before/after per-module IR; final PTX/SASS and correctness; default-off and LLVM feature gates | Both modes verified across 22 CGUs; no measured static advantage on the small suite |
+
+The previous stage is documented in `guarded-select.md` and
+`evidence/cleanup-validated.json`. It removed two filtered-helper SASS selects
+but increased that helper's non-NOP instruction count from 28 to 49. The old
+combined-kernel totals masked how much of the growth belonged to that helper.
+
+The workflow's `optimization_sweep` input enables the extended standalone
+experiments. Exact pipelines and options live in `optimization_pipelines.py`
+and are retained in each artifact. Results include LLVM-pass and total elapsed
+seconds; CI machine load makes these illustrative compiler-cost observations,
+not controlled benchmarks. The original five comparisons and both integrated
+backend checks remain in the suite.
+
+Completion requires evaluating every row, recording negative results as well
+as improvements, retaining meaningful regression checks, and integrating only
+changes justified by the evidence. NVIDIA runtime benchmarking remains distinct
+from offline compilation and Apple-GPU consumer checks.
+
+The per-module experiment uses `CudaBuilder::llvm19_module_cleanup(true)`
+(`--llvm19-module-cleanup`) after each codegen unit's definitions, used globals
+and debug information are finalized, before serialization and the legacy
+optimization hook. It uses scalar cleanup only, preserving cross-module linkage.
+It is independent of merged cleanup and disabled by default. Exporter modes
+`module-scalar` and `module-inline` test it alone and with merged inline cleanup.
+The extended workflow saves before/after IR for every rebuilt codegen unit and
+checks each against standalone LLVM replay, including dependency modules.
+
+Size modes `size-s` and `size-z` hold merged inline cleanup constant and change
+Cargo's release opt-level. The `mining_workload` workflow input checks out
+vanity-miner-rs at `9791234`, builds the full Solana mining kernel, and repeats
+the independent DCE and memory-cleanup comparisons. Only cuda_std's dependency
+location changes to the backend under test; original/resolved manifests and
+locks are retained. This does not modify the user's vanity-miner checkout.
+
+## First extended sweep
+
+Run 34787085815 passes all 17 variants and the existing integrated checks.
+`evidence/extended-sweep.json` records verified artifact hashes and per-helper
+metrics. None of the tested CFG orderings, memory passes or inlining thresholds
+improves the small filtered helper's instruction count over baseline (28).
+SHA-256's non-NOP SASS count remains 1,623. Equal counts do not imply identical
+code; some threshold variants alter output without improving these metrics.
+
+GlobalDCE alone reduces the printed module from 13,107,292 to 257,877 bytes and
+3,299 to 93 definitions while producing byte-identical PTX and SASS. In this
+single CI observation, total replay/inspection time drops from 3.137 to 2.147
+seconds. This supports a compiler-cost candidate, not a GPU speed claim.
+Validation on the larger workload is still pending, as are the per-module and
+size-oriented comparisons; the five-area objective is not complete.
+
+The first per-module run compiled successfully but its textual comparison was
+too strict about LLVM predecessor comments, local SSA names and PHI pair order.
+The comparison now uses LLVM's `strip-nondebug` on comparison copies, ignores
+comments outside strings and sorts complete PHI incoming pairs. Instructions,
+attributes, constants and each value/block association remain compared. Negative
+tests cover changed values and strings. All 22 saved module-scalar units from
+run 34787242514 match standalone replay under this comparison; module-inline
+and final workload checks still need the new CI run. Independent size/mining
+checks now run after a successful baseline export even if another experiment
+fails, while the overall workflow continues to report those failures.
+
+Per-module scalar PTX from run 34787242514 passes vector-add and SHA-256 at
+counts 1/31/32/33/257, plus all 1,608 guarded-select cases, on Apple M5 through
+generic CuMetal lowering. `evidence/module-scalar-apple.json` records its hash
+and consumer provenance. This adds numerical evidence while final per-module,
+size-oriented and mining comparisons are still running; it is not a timing
+result or NVIDIA execution proof.
+
+## Larger workload and per-module evidence
+
+Run 34787847715 passes both per-module modes (22 codegen units each) and the
+Solana DCE/memory sweep. Its overall failure is the independent size-s build:
+the libdevice override lookup calls `item_name` on an unnamed libm closure.
+Commit cf5965a replaces that lookup with `opt_item_name`; both size modes must
+compile before that investigation can be considered validated.
+
+`evidence/solana-first-sweep.json` records the first full mining comparison,
+including per-symbol instruction histograms, resource reports and hashes.
+GlobalDCE alone reduces LLVM definitions from 3,883 to 151 and printed IR from
+15,716,570 to 1,341,603 bytes, with byte-identical PTX and SASS. This reinforces
+the compiler-cost result from the smaller suite. An independent opt-in builder
+mode `Llvm19Cleanup::GlobalDce` now has integrated replay and oracle checks in CI.
+
+The memory pipelines reduce registers from 216 to 178 and PTX from 1,481,081
+to 1,301,076 bytes. All include inlining and scalar cleanup, so these gains
+cannot yet be attributed to memory passes: the next run adds `inline-only`.
+No NVIDIA runtime performance or numerical claim follows from these static
+metrics. Current CuMetal rejects both baseline and memory-stores before launch
+with the same restriction: trap reporting requires a call-free kernel without
+barriers or collectives. That consumer limitation remains separate from the
+optimization experiment; no trap semantics were bypassed.
+
+The offline inlining-only ablation from run 34788545905 gives 38,428 non-NOP
+Solana SASS instructions and 178 registers, versus baseline 39,738 and 216.
+EarlyCSE and GVN add no instruction/register improvement; store cleanup adds
+two instructions, with the same registers and load/store counts. All variants
+retain a 208-byte kernel stack and a helper with 32-byte spill loads/stores.
+This supports testing the simpler `InlineScalar` builder mode rather than
+adding the memory passes. Integrated replay checks now cover that mode on
+both the small suite and the full Solana kernel.
+
+That run restored an old backend because cuda_builder finds an existing shared
+library before asking Cargo to rebuild it. The offline ablation remains valid
+for its recorded input, but this run does not validate cf5965a's backend fix.
+The workflow now explicitly builds the checked-out backend, records its hash,
+and removes only cached device outputs before generating fresh IR evidence.
+The same cache reuse also explains the missing per-module dependency dumps.
+
+`evidence/inline-scalar-apple.json` records generic M5 execution of the hashed
+offline inline-scalar PTX: vector-add and SHA-256 at five boundary counts and
+1,608 guarded-select oracle cases, with guards intact. This supplies numerical
+evidence for the small suite, not for the full mining kernel.
diff --git a/examples/ptx_export/optimization-wave2.md b/examples/ptx_export/optimization-wave2.md
new file mode 100644
index 00000000..0e177e21
--- /dev/null
+++ b/examples/ptx_export/optimization-wave2.md
@@ -0,0 +1,185 @@
+# LLVM 19 optimization: broader validation
+
+Status: all seven workloads pass in [the final matrix](https://github.com/brandonros/Rust-CUDA/actions/runs/34794484421),
+including the 119-entry self-test/probe module. Native NVIDIA measurements
+remain unavailable. This report separates offline, host and Apple-GPU evidence.
+
+GlobalDCE is now enabled by default at the merged LLVM 19 handoff. Scalar,
+inlining, per-module and loop transformations remain opt-in. LLVM 7 retains
+its existing pipeline. `CudaBuilder::llvm19_global_dce(false)` explicitly
+disables the new default; explicit cleanup modes may themselves include DCE.
+The exporter now defaults to `default`; use `none` for the unpruned control.
+
+## Default-DCE evidence
+
+[Run 34792081740](https://github.com/brandonros/Rust-CUDA/actions/runs/34792081740)
+passes the production builder/standalone replay checks and retention regression.
+The small suite shrinks from 3,299 to 93 LLVM definitions; the retention fixture
+shrinks from 3,192 to five. Both produce identical PTX with DCE disabled/enabled.
+The fixture retains kernel entries, explicitly externally visible functions,
+function-pointer tables, referenced initialized data, and both `llvm.used` and
+`llvm.compiler.used`; deliberately unreachable function/data controls disappear.
+The small-suite host oracle also passes. These are compiler pruning results,
+not evidence of faster GPU execution.
+
+## Four full mining workloads
+
+[Run 34792081315](https://github.com/brandonros/Rust-CUDA/actions/runs/34792081315)
+uses miner commit `9791234249fc8cb762c296c4fda4503d2686ff77` and backend commit
+`6cefd7d3f92a71a3e19f5363441c5a7fbd2e7f62`. Every mining build passes LLVM
+verification, NVVM compilation, `ptxas` and disassembly. Production InlineScalar
+matches independent LLVM replay. Default DCE produces byte-identical PTX and
+cubins for all four workloads.
+
+| Workload | SASS instructions: disabled → InlineScalar | Registers | Cumulative stack bytes |
+| --- | ---: | ---: | ---: |
+| Solana | 39,738 → 38,428 | 216 → 178 | 208 → 208 |
+| Bitcoin | 90,877 → 96,968 | 255 → 255 | 11,120 → 11,024 |
+| Ethereum | 87,009 → 86,774 | 255 → 255 | 10,928 → 3,984 |
+| Shallenge | 2,380 → 2,710 | 96 → 96 | 144 → 176 |
+
+Instruction counts are static non-NOP counts over each entry's disassembly
+extent, including its helpers. They are not dynamic executed instructions.
+Do not add helper counts to those totals. Register and stack figures are
+assembler reports, not measured occupancy or bandwidth.
+
+These mixed results reject promotion of InlineScalar as a general default.
+Ethereum's stack reduction is worth a hardware measurement, while Bitcoin and
+Shallenge demonstrate why PTX size alone is insufficient.
+
+## Final matrix and self-test module
+
+The final matrix uses backend commit `d111f80dbfa2374fb50af5b6d49407ffab13bd1a`.
+All seven workloads pass baseline, default-DCE and InlineScalar compilation,
+LLVM/NVVM verification, NVIDIA assembly/disassembly and independent replay.
+Default DCE produces identical PTX and cubins to the disabled control in every
+workload. The evidence ledger records the final artifacts separately from the
+earlier experiments; all 378 files listed in the 21 inspection manifests were
+checked against their SHA-256 hashes after download.
+
+The large module contains 118 numerical self-test entry points and one plumbing
+probe. These are 119 compiled entries, not 119 executed numerical tests.
+
+| Mode | LLVM definitions | LLVM IR bytes | PTX bytes | Cubin bytes |
+| --- | ---: | ---: | ---: | ---: |
+| Disabled | 6,166 | 26,340,781 | 21,849,956 | 24,220,008 |
+| Default DCE | 605 | 4,560,285 | 21,849,956 | 24,220,008 |
+| InlineScalar | 159 | 4,946,377 | 39,891,407 | 23,053,904 |
+
+Inlining grows this module's PTX while shrinking its cubin. Neither file size
+establishes a runtime improvement; the mixed mining results still argue for
+keeping it opt-in.
+
+Subsequent changes fix lint diagnostics and keep the exporter's explicit `none`
+control usable on LLVM 7. [Linux CI on that code](https://github.com/brandonros/Rust-CUDA/actions/runs/34795701436)
+passes all six Ubuntu/Rocky, x86/ARM, CUDA 12/13 jobs and compile tests.
+[Export/retention checks](https://github.com/brandonros/Rust-CUDA/actions/runs/34795912080)
+also pass. Windows validation remains pending: an earlier job failed downloading
+prebuilt LLVM 7 with an SSL connection reset, and subsequent runs are still
+in progress. This does not establish Windows compatibility or a compiler failure.
+
+## Inlining and local memory
+
+The recorded LLVM inlining remarks identify `Xoroshiro128StarStar::from_seed`
+as recursive, with an uninlinable cost rather than a threshold miss. Its
+zero-seed fallback recurses. Increasing the generic threshold does not address
+that reason. Its 79-instruction SASS helper retains a 56-byte stack frame and
+32-byte spill stores/loads under all three tested loop/inlining configurations.
+
+The bounded `tiny-loops` pipeline runs loop canonicalization, induction-variable
+simplification, full unrolling capped at four trips, and scalar cleanup. Runtime
+unrolling, partial unrolling and peeling are disabled. It reduces the RNG
+helper's intermediate allocations from five to four without changing its SASS.
+Standalone function-attribute/tail-call elimination and a second inlining pass
+also leave its recursive call and five allocations intact. A further native LLVM experiment with IPSCCP retains the same five allocations.
+Argument promotion plus another inlining pass retains the pointer-based recursive
+helper and four allocations while expanding the module to 2.24 MB; it is not
+advanced to NVIDIA measurement. No recursion or undefined-register semantics
+were changed to obtain a smaller result.
+
+| Solana experiment | SASS instructions | Registers | Cumulative stack bytes |
+| --- | ---: | ---: | ---: |
+| InlineScalar | 38,428 | 178 | 208 |
+| InlineScalar + tiny loops | 36,480 | 200 | 192 |
+| InlineScalar + correlated cleanup + tiny loops | 35,971 | 179 | 192 |
+
+The last variant is a promising static candidate, not a new default. Its full
+mining numerical behavior and speed have not been measured on NVIDIA hardware.
+Both loop variants pass the five-helper 1,608-case host oracle and vector-add/
+SHA-256 tests at counts 1, 31, 32, 33 and 257 on Apple M5 through generic CuMetal.
+Those checks cover the small suite, not the complete Solana kernel.
+
+SHA-256 remains at 1,623 SASS instructions, 40 registers and 112 stack bytes
+under both bounded loop variants. Its PTX contains an actual 112-byte local
+buffer with hash-state and input/padding stores; the assembler reports zero
+spills. Treating that storage as a register-allocation spill would misdiagnose
+it. The separate loop-idiom/memcpy/SROA experiment in run 34793033638 reduces
+intermediate allocations but leaves the SHA machine code and stack unchanged.
+It adds two Solana SASS instructions with unchanged registers and spills; it
+is not selected for integration.
+
+## Representative operations and hardware validation
+
+The representative crate adds runtime-input floating-point, shared-memory,
+atomic and warp-shuffle probes. Run 34793214204 isolates the pre-existing NVVM
+crash to shuffle: the other three operations compile under all builder modes,
+then pass six input sizes each on Apple M5 (54 checks), including guards.
+Per-entry extraction retains referenced global initializers and runs NVVM in
+child processes so one crash cannot hide remaining results. No new verifier exception was introduced. These are extracted modules, not a passing full-module compilation.
+
+The LLVM 19 intrinsic library now uses the modern IDX/UP/DOWN/BFLY forms while
+LLVM 7 keeps the legacy wrapper. This follows the [CUDA 13.2 NVVM specification](https://docs.nvidia.com/cuda/archive/13.2.0/nvvm-ir-spec/index.html#data-movement).
+Both retain the packed i64 Rust-facing value/predicate ABI. The expanded
+regression covers all four directions. Reviewing that probe also exposed an
+incorrect UP clamp (31 instead of 0) and an invalid power-of-two assertion in
+cuda_std. The shared control helper fixes both, with tests applying the PTX
+bound calculation independently across all lanes and supported widths, plus
+invalid-width rejection. [Run 34793862065](https://github.com/brandonros/Rust-CUDA/actions/runs/34793862065)
+passes the complete four-entry module in all three builder modes, including
+LLVM/NVVM verification, assembly, disassembly and independent replay.
+
+The full-module float/shared/atomic entries pass all 54 numerical checks on M5.
+The shuffle predicate check fails in every mode: at count 32, output[0] is
+`0xffffffff` instead of `0x28b7bc80`. The generated MSL declares four predicate
+variables (`v16`, `v18`, `v20`, `v22`) and reads them in output selects without
+ever assigning them. The PTX defines all four predicates through `shfl.sync`.
+This is a separate CuMetal lowering blocker; its generic/exact provenance label
+is not sufficient evidence of correctness. No generated MSL or expected answer
+was modified to turn this into a pass.
+
+[The unchanged four-entry PTX fixture](evidence/representative-shuffle.ptx) and
+the commands/logs/hashes in [the evidence ledger](evidence/optimization-wave2.json)
+provide the handoff. For the current CuMetal build, compile with
+`--backend=cumetal-ir --ptx-strict --entry wave2_shuffle --emit=msl`, then use
+`run_wave2_gpu.py --kernel wave2_shuffle --counts 32` with the explicit driver.
+NVIDIA numerical validation of the corrected shuffle remains outstanding.
+
+`run_wave2_gpu.py` provides independent expected results and guard checks for
+these probes, with optional CUDA-event timing on a native NVIDIA driver. It
+records module/runner hashes, driver version, device and per-count results.
+Timing excludes initialization, compilation, allocation and copies; small
+kernels can still be dominated by launch overhead. Compatible drivers are
+numerical-only. The compatible-driver numerical path is exercised; native NVIDIA timing remains
+unvalidated: this Mac
+has an Apple M5 and both forks currently have zero self-hosted runners.
+
+The workflow supports selecting a single workload for repeat investigations:
+
+```sh
+gh workflow run optimization_wave2.yml --repo brandonros/Rust-CUDA \
+  --ref poc/portable-ptx-export -f workload=representative
+```
+
+Raw CI artifacts include original/resolved workload locks, compiler/backend
+provenance, exact commands, before/after IR, PTX, cubins, disassembly, assembler
+resource reports and inlining/loop remarks. Compilation success is kept
+separate from numerical validation and runtime performance.
+
+## Inspection reuse
+
+The final matrix avoids repeating assembly/disassembly only when PTX bytes,
+inspector source hash, tool executable hashes and all three version outputs
+match. Every reused result names its source, original commands and copied-file
+hashes in `reused-inspection.json`; fresh LLVM/NVVM compilation still runs.
+Changed-input tests reject reuse. This reduces redundant CI work, not GPU
+execution time. Self-test jobs have a 90-minute ceiling; other jobs retain 45.
diff --git a/examples/ptx_export/optimization_pipelines.py b/examples/ptx_export/optimization_pipelines.py
new file mode 100644
index 00000000..d6e56cb9
--- /dev/null
+++ b/examples/ptx_export/optimization_pipelines.py
@@ -0,0 +1,48 @@
+"""Bounded LLVM 21 experiments. Explicit options are saved with each result."""
+IC = 'instcombine<max-iterations=2;no-verify-fixpoint>'
+SCALAR = f'function(sroa,{IC},simplifycfg,adce)'
+INLINE = f'globaldce,cgscc(inline),{SCALAR},globaldce'
+CORRELATED = f'function(correlated-propagation,{IC},simplifycfg,adce)'
+
+
+def experiments(extended=False):
+    pipelines = {
+        'baseline': ('verify', []),
+        'dce-only': ('globaldce,verify', []),
+        'local-cleanup': (f'{SCALAR},verify', []),
+        'inline-only': (f'{INLINE},verify', []),
+        'inline-cleanup': (f'{INLINE},{CORRELATED},verify', []),
+        'constrained-cleanup': (f'{INLINE},{CORRELATED},function(constraint-elimination,{IC},simplifycfg,adce),verify', []),
+    }
+    if extended:
+        pipelines.update({
+            'cfg-no-final': (f'{INLINE},function(correlated-propagation,{IC},adce),verify', []),
+            'cfg-before-combine': (f'{INLINE},function(correlated-propagation,simplifycfg,{IC},adce),verify', []),
+            'cfg-no-both': (f'globaldce,cgscc(inline),function(sroa,{IC},adce),globaldce,function(correlated-propagation,{IC},adce),verify', []),
+            'dce-scalar': (f'globaldce,{SCALAR},globaldce,verify', []),
+            'memory-early-cse': (f'{INLINE},function(early-cse<memssa>,{IC},adce),verify', []),
+            'memory-gvn': (f'{INLINE},function(gvn,{IC},adce),verify', []),
+            'memory-stores': (f'{INLINE},function(memcpyopt,dse,{IC},adce),verify', []),
+            'memory-combined': (f'{INLINE},function(early-cse<memssa>,gvn,memcpyopt,dse,{IC},adce),verify', []),
+            'inline-threshold-0': (f'{INLINE},{CORRELATED},verify', ['-inline-threshold=0', '-inlinehint-threshold=0']),
+            'inline-threshold-50': (f'{INLINE},{CORRELATED},verify', ['-inline-threshold=50', '-inlinehint-threshold=50']),
+            'inline-threshold-450': (f'{INLINE},{CORRELATED},verify', ['-inline-threshold=450', '-inlinehint-threshold=450']),
+        })
+    return pipelines
+
+
+# Small constant-trip loops are a concrete source of residual RNG stack buffers.
+# Disable runtime/partial/peeling expansion and cap full unrolling at four trips.
+TINY_UNROLL = 'loop-unroll<O2;full-unroll-max=4;no-partial;no-peeling;no-profile-peeling;no-runtime;no-upperbound>'
+TINY_LOOPS = f'loop-simplify,lcssa,loop(indvars),{TINY_UNROLL},sroa,{IC},simplifycfg,adce'
+
+
+def wave2_experiments():
+    return {
+        'baseline': ('verify', []),
+        'dce-only': ('globaldce,verify', []),
+        'inline-only': (f'{INLINE},verify', []),
+        'tiny-loops': (f'{INLINE},function({TINY_LOOPS}),verify', []),
+        'correlated-tiny-loops': (f'{INLINE},{CORRELATED},function({TINY_LOOPS}),verify', []),
+        'loop-idiom': (f'{INLINE},function(loop-simplify,lcssa,loop(loop-idiom),memcpyopt,sroa,{IC},simplifycfg,adce),verify', []),
+    }
diff --git a/examples/ptx_export/replay_cleanup.py b/examples/ptx_export/replay_cleanup.py
new file mode 100644
index 00000000..ac386940
--- /dev/null
+++ b/examples/ptx_export/replay_cleanup.py
@@ -0,0 +1,139 @@
+#!/usr/bin/env python3
+"""Opt-in pre-NVVM cleanup experiment; never changes Rust-CUDA defaults."""
+import argparse
+import ctypes as c
+import hashlib
+import json
+import os
+from pathlib import Path
+import re
+import subprocess
+import sys
+import time
+from optimization_pipelines import experiments, wave2_experiments
+from inspect_codegen import ptx_functions, ptx_summary
+
+
+def compile_nvvm(bitcode, libraries, output):
+    lib = c.CDLL('libnvvm.so')
+    ptr = c.c_void_p
+    signatures = {
+        'nvvmCreateProgram': [c.POINTER(ptr)], 'nvvmDestroyProgram': [c.POINTER(ptr)],
+        'nvvmAddModuleToProgram': [ptr, ptr, c.c_size_t, c.c_char_p],
+        'nvvmLazyAddModuleToProgram': [ptr, ptr, c.c_size_t, c.c_char_p],
+        'nvvmCompileProgram': [ptr, c.c_int, c.POINTER(c.c_char_p)],
+        'nvvmVerifyProgram': [ptr, c.c_int, c.POINTER(c.c_char_p)],
+        'nvvmGetProgramLogSize': [ptr, c.POINTER(c.c_size_t)],
+        'nvvmGetProgramLog': [ptr, ptr],
+        'nvvmGetCompiledResultSize': [ptr, c.POINTER(c.c_size_t)],
+        'nvvmGetCompiledResult': [ptr, ptr],
+    }
+    for name, types in signatures.items():
+        fn = getattr(lib, name); fn.argtypes = types; fn.restype = c.c_int
+    program = ptr()
+    def call(name, *args):
+        status = getattr(lib, name)(*args)
+        if status: raise RuntimeError(f'{name}: NVVM status {status}')
+    def log():
+        size = c.c_size_t()
+        if lib.nvvmGetProgramLogSize(program, c.byref(size)) or not size.value: return ''
+        data = c.create_string_buffer(size.value)
+        if lib.nvvmGetProgramLog(program, data): return 'cannot read NVVM log'
+        return data.value.decode(errors='replace')
+    call('nvvmCreateProgram', c.byref(program))
+    # Keep all backing buffers alive until destruction of the NVVM program.
+    buffers = []
+    try:
+        for index, path in enumerate([bitcode, *libraries]):
+            data = path.read_bytes(); buf = c.create_string_buffer(data); buffers.append(buf)
+            call('nvvmAddModuleToProgram' if index == 0 else 'nvvmLazyAddModuleToProgram',
+                 program, buf, len(data), [b'merged', b'libdevice', b'libintrinsics'][index])
+        options = (c.c_char_p * 1)(b'-arch=compute_100')
+        status = lib.nvvmVerifyProgram(program, 1, options)
+        verification_log = log()
+        (output / 'nvvm-verify.log').write_text(verification_log)
+        if status:
+            # Match the existing LLVM 21 backend's narrowly recognized verifier
+            # false negative; retain the log and let compilation decide.
+            known = all(x in verification_log for x in
+                        ("Producer: 'LLVM21", "Reader: 'LLVM 7.0.1'", 'parse Invalid value'))
+            if not known: raise RuntimeError(f'NVVM verification failed: {status}')
+        status = lib.nvvmCompileProgram(program, 1, options)
+        (output / 'nvvm-compile.log').write_text(log())
+        if status: raise RuntimeError(f'NVVM compilation failed: {status}')
+        size = c.c_size_t(); call('nvvmGetCompiledResultSize', program, c.byref(size))
+        data = c.create_string_buffer(size.value)
+        call('nvvmGetCompiledResult', program, data)
+        (output / 'rust_kernels.ptx').write_bytes(data.raw.rstrip(b'\0'))
+    finally:
+        call('nvvmDestroyProgram', c.byref(program))
+
+
+def normalized_functions(ptx):
+    return {name: re.sub(r'\s+', ' ', re.sub(r'//[^\n]*', '', body)).strip()
+            for name, body in ptx_functions(ptx)}
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('artifacts', type=Path)
+    parser.add_argument('--extended', action='store_true')
+    parser.add_argument('--wave2', action='store_true', help='Record inlining remarks and bounded loop experiments')
+    parser.add_argument('--only', help='Comma-separated experiment names; baseline is always included')
+    args = parser.parse_args()
+    root = args.artifacts.resolve()
+    out = root / 'cleanup-experiment'; out.mkdir(exist_ok=True)
+    # Require unique content when build caches contain multiple backend hashes.
+    candidates = list(Path('target/cuda-builder-codegen').rglob('libintrinsics_v21.bc'))
+    unique = {hashlib.sha256(p.read_bytes()).hexdigest(): p for p in candidates}
+    if len(unique) != 1: raise RuntimeError(f'expected one distinct LLVM 21 intrinsic library, got {len(unique)}')
+    intrinsics = next(iter(unique.values())).resolve()
+    libdevice = Path(os.environ['CUDA_HOME']) / 'nvvm/libdevice/libdevice.10.bc'
+    libraries = [libdevice, intrinsics]
+    metadata = {'nvvm_options': ['-arch=compute_100'],
+                'libraries': [{'path': str(p), 'sha256': hashlib.sha256(p.read_bytes()).hexdigest()} for p in libraries],
+                'input_sha256': hashlib.sha256((root/'final-module.ll').read_bytes()).hexdigest(),
+                'results': []}
+    pipelines = wave2_experiments() if args.wave2 else experiments(args.extended)
+    if args.only:
+        requested = set(args.only.split(',')) | {'baseline'}
+        unknown = requested - pipelines.keys()
+        if unknown: raise ValueError(f'unknown experiments: {sorted(unknown)}')
+        pipelines = {name: spec for name, spec in pipelines.items() if name in requested}
+    baseline_matches = False
+    for name, (passes, options) in pipelines.items():
+        dest = out/name; dest.mkdir(exist_ok=True)
+        if args.wave2:
+            options = [*options, '-pass-remarks=inline|loop-unroll|sroa', '-pass-remarks-missed=inline|loop-unroll|sroa',
+                       '-pass-remarks-analysis=inline|loop-unroll|sroa', '-pass-remarks-output='+str(dest/'remarks.yaml')]
+        command = ['opt-21', '-passes='+passes, '-verify-each', *options, str(root/'final-module.ll'), '-o', str(dest/'module.bc')]
+        item = {'name': name, 'passes': passes, 'opt_options': options, 'opt_command': command}
+        started = time.perf_counter()
+        try:
+            with (dest/'opt.log').open('w') as log:
+                subprocess.run(command, stdout=log, stderr=subprocess.STDOUT, check=True)
+            item['opt_seconds'] = time.perf_counter() - started
+            subprocess.run(['llvm-dis-21', str(dest/'module.bc'), '-o', str(dest/'final-module.ll')], check=True)
+            compile_nvvm(dest/'module.bc', libraries, dest)
+            source = (dest/'rust_kernels.ptx').read_text()
+            if name == 'baseline':
+                baseline_matches = normalized_functions(source) == normalized_functions((root/'rust_kernels.ptx').read_text())
+                item['matches_original_function_bodies'] = baseline_matches
+                if not baseline_matches: raise RuntimeError('baseline replay differs; do not attribute differences to cleanup')
+            subprocess.run([sys.executable, str(Path(__file__).with_name('inspect_codegen.py')), str(dest),
+                            '--reuse-from',str(root),'--reuse-from',str(root.parent/'inline-scalar')], check=True)
+            item['ptx_helpers'] = {n:v for n,v in ptx_summary(source).items() if 'guarded_select' in n}
+            item['status'] = 'compiled_and_assembled'
+        except (RuntimeError, subprocess.CalledProcessError) as error:
+            item['status'] = 'failed'; item['error'] = str(error)
+        item['total_seconds'] = time.perf_counter() - started
+        metadata['results'].append(item)
+        (out/'experiment.json').write_text(json.dumps(metadata, indent=2)+'\n')
+        print(name, item['status'], item.get('error',''), flush=True)
+        if name == 'baseline' and not baseline_matches: return 1
+    # Unsupported optimized IR is an experiment result, not a silent success.
+    return int(any(item['status'] == 'failed' for item in metadata['results']))
+
+
+if __name__ == '__main__':
+    raise SystemExit(main())
diff --git a/examples/ptx_export/representative-kernels/Cargo.toml b/examples/ptx_export/representative-kernels/Cargo.toml
new file mode 100644
index 00000000..21b57e13
--- /dev/null
+++ b/examples/ptx_export/representative-kernels/Cargo.toml
@@ -0,0 +1,11 @@
+[package]
+name = "ptx-representative-kernels"
+version = "0.1.0"
+edition = "2021"
+publish = false
+
+[dependencies]
+cuda_std = { path = "../../../crates/cuda_std" }
+
+[lib]
+crate-type = ["cdylib", "rlib"]
diff --git a/examples/ptx_export/representative-kernels/src/lib.rs b/examples/ptx_export/representative-kernels/src/lib.rs
new file mode 100644
index 00000000..276dbc97
--- /dev/null
+++ b/examples/ptx_export/representative-kernels/src/lib.rs
@@ -0,0 +1,60 @@
+//! Runtime-input probes for floating point, shared memory, atomics and shuffles.
+use core::{mem::MaybeUninit, sync::atomic::Ordering};
+use cuda_std::{address_space, kernel, thread, warp};
+
+/// # Safety
+/// Inputs and output address `count` elements; output does not overlap inputs.
+#[kernel]
+pub unsafe fn wave2_float(a: *const f32, b: *const f32, out: *mut f32, count: u32) {
+    let i = thread::index_1d();
+    if i < count {
+        *out.add(i as usize) = *a.add(i as usize) * 0.5 + *b.add(i as usize);
+    }
+}
+
+/// # Safety
+/// Launch exactly 32 threads per block. Buffers address `count` u32s and do not overlap.
+#[kernel]
+pub unsafe fn wave2_shared(input: *const u32, out: *mut u32, count: u32) {
+    #[address_space(shared)]
+    static mut TILE: [MaybeUninit<u32>; 32] = [MaybeUninit::uninit(); 32];
+    let i = thread::index_1d();
+    let lane = thread::thread_idx_x() as usize;
+    let tile = core::ptr::addr_of_mut!(TILE).cast::<u32>();
+    *tile.add(lane) = if i < count { *input.add(i as usize) } else { 0 };
+    thread::sync_threads();
+    if i < count {
+        *out.add(i as usize) = *tile.add(31 - lane);
+    }
+}
+
+/// # Safety
+/// `counter` addresses one aligned u32 initialized before launch.
+#[kernel]
+pub unsafe fn wave2_atomic(counter: *mut u32, count: u32) {
+    let i = thread::index_1d();
+    if i < count {
+        cuda_std::atomic::mid::atomic_fetch_add_u32_device(counter, Ordering::Relaxed, i + 1);
+    }
+}
+
+/// # Safety
+/// Launch exactly 32 threads per block. Input addresses `count` u32s; output
+/// addresses `4 * count` u32s. Buffers do not overlap.
+/// All lanes, including tail padding, participate in the shuffle.
+#[kernel]
+pub unsafe fn wave2_shuffle(input: *const u32, out: *mut u32, count: u32) {
+    let i = thread::index_1d();
+    let value = if i < count { *input.add(i as usize) } else { 0 };
+    let results = [
+        warp::warp_shuffle_idx(u32::MAX, value, 31, 32),
+        warp::warp_shuffle_up(u32::MAX, value, 1, 32),
+        warp::warp_shuffle_down(u32::MAX, value, 1, 32),
+        warp::warp_shuffle_xor(u32::MAX, value, 1, 32),
+    ];
+    if i < count {
+        for (direction, (other, valid)) in results.into_iter().enumerate() {
+            *out.add(i as usize * 4 + direction) = if valid { other } else { u32::MAX };
+        }
+    }
+}
diff --git a/examples/ptx_export/retention-kernels/Cargo.toml b/examples/ptx_export/retention-kernels/Cargo.toml
new file mode 100644
index 00000000..207b50b7
--- /dev/null
+++ b/examples/ptx_export/retention-kernels/Cargo.toml
@@ -0,0 +1,11 @@
+[package]
+name = "ptx-retention-kernels"
+version = "0.1.0"
+edition = "2021"
+publish = false
+
+[dependencies]
+cuda_std = { path = "../../../crates/cuda_std" }
+
+[lib]
+crate-type = ["cdylib", "rlib"]
diff --git a/examples/ptx_export/retention-kernels/src/lib.rs b/examples/ptx_export/retention-kernels/src/lib.rs
new file mode 100644
index 00000000..288bf899
--- /dev/null
+++ b/examples/ptx_export/retention-kernels/src/lib.rs
@@ -0,0 +1,70 @@
+//! Exercise actual Rust-CUDA internalization and DCE root discovery.
+#![feature(used_with_arg)]
+
+use cuda_std::{externally_visible, kernel};
+
+type Callback = extern "C" fn(u32) -> u32;
+
+#[no_mangle]
+#[inline(never)]
+pub extern "C" fn retention_table_target(x: u32) -> u32 {
+    x.wrapping_mul(7)
+}
+
+#[no_mangle]
+#[inline(never)]
+pub extern "C" fn retention_used_target(x: u32) -> u32 {
+    x.wrapping_add(19)
+}
+
+#[no_mangle]
+#[inline(never)]
+pub extern "C" fn retention_linker_target(x: u32) -> u32 {
+    x.wrapping_sub(13)
+}
+
+#[used(linker)]
+#[no_mangle]
+pub static RETENTION_LINKER_USED: [Callback; 1] = [retention_linker_target];
+
+#[externally_visible]
+#[no_mangle]
+pub extern "C" fn retention_external(x: u32) -> u32 {
+    x ^ 0x5a5a_5a5a
+}
+
+#[no_mangle]
+pub static RETENTION_TABLE: [Callback; 1] = [retention_table_target];
+
+// Never read by a kernel. Its initializer must nevertheless retain its target.
+#[used(compiler)]
+#[no_mangle]
+pub static RETENTION_USED: [Callback; 1] = [retention_used_target];
+
+#[no_mangle]
+pub static RETENTION_DATA: [u32; 3] = [11, 29, 47];
+
+#[no_mangle]
+pub static RETENTION_DATA_REF: &[u32; 3] = &RETENTION_DATA;
+
+// Emitted as externally named items, then internalized and eligible for DCE.
+#[no_mangle]
+pub extern "C" fn retention_unreachable(x: u32) -> u32 {
+    x.wrapping_add(23)
+}
+
+#[no_mangle]
+pub static RETENTION_UNREACHABLE_DATA: [u32; 3] = [101, 103, 107];
+
+/// # Safety
+/// `out` addresses three writable u64s. No inputs overlap the output.
+#[kernel]
+pub unsafe fn retention_probe(out: *mut u64, index: u32) {
+    // Volatile reads keep the initializer dependencies visible in the emitted IR.
+    let callback =
+        core::ptr::read_volatile(core::ptr::addr_of!(RETENTION_TABLE).cast::<Callback>());
+    let data = core::ptr::read_volatile(core::ptr::addr_of!(RETENTION_DATA_REF));
+    *out = callback as usize as u64;
+    *out.add(1) = core::ptr::read_volatile(data.as_ptr().add((index % 3) as usize)) as u64;
+    *out.add(2) = retention_external(index) as u64;
+}
diff --git a/examples/ptx_export/run_guarded_select.py b/examples/ptx_export/run_guarded_select.py
new file mode 100644
index 00000000..a0f28ed2
--- /dev/null
+++ b/examples/ptx_export/run_guarded_select.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+"""Numerically check runtime-input select kernels through a CUDA Driver API library.
+
+Native default: NVIDIA libcuda.so.1 and an unchanged PTX/cubin module.
+An explicit compatible driver/module can test another consumer separately.
+"""
+import argparse
+import ctypes as c
+import os
+from pathlib import Path
+
+MASK = (1 << 64) - 1
+
+
+def expected(table, limit, initial, filtered=False):
+    n = min(limit, 64)
+    odd_sum = sum(table[i] for i in range(1, n, 2)) & MASK
+    if filtered:
+        return [odd_sum, odd_sum]
+    observed = sum(table[(initial & 63) if i == 0 else ((i - 1) | 1)] for i in range(n)) & MASK
+    return [odd_sum, odd_sum, observed]
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('module', type=Path)
+    parser.add_argument('--kernel', choices=['rust_guarded_select', 'rust_filtered_select'], required=True)
+    parser.add_argument('--driver', default='libcuda.so.1')
+    args = parser.parse_args()
+    os.environ['CUMETAL_TRACE_GPU'] = '1'
+    os.environ['CUMETAL_ENABLE_WORKLOAD_SPECIALIZATIONS'] = '0'
+    lib = c.CDLL(args.driver)
+    ptr, u32, u64 = c.c_void_p, c.c_uint32, c.c_uint64
+
+    def api(name, types, *values):
+        # Prefer the size_t / 64-bit device-pointer versions on NVIDIA.
+        fn = getattr(lib, name + '_v2', None) or getattr(lib, name)
+        fn.argtypes, fn.restype = types, c.c_int
+        status = fn(*values)
+        if status: raise RuntimeError(f'{name} failed: {status}')
+
+    api('cuInit', [u32], 0)
+    device = c.create_string_buffer(256)
+    api('cuDeviceGetName', [ptr, c.c_int, c.c_int], device, len(device), 0)
+    context, module, kernel = ptr(), ptr(), ptr()
+    api('cuCtxCreate', [c.POINTER(ptr), u32, c.c_int], c.byref(context), 0, 0)
+    total = 0
+    try:
+        api('cuModuleLoad', [c.POINTER(ptr), c.c_char_p], c.byref(module), os.fsencode(args.module.resolve()))
+        api('cuModuleGetFunction', [c.POINTER(ptr), ptr, c.c_char_p], c.byref(kernel), module, args.kernel.encode())
+        cases = [(limit, initial) for limit in [*range(66), (1 << 32) - 1]
+                 for initial in [0, 1, 17, 63, 64, MASK]]
+        filtered = args.kernel == 'rust_filtered_select'
+        for seed in [0, 1, 1 << 63, MASK]:
+            table = [(i * 0x9e3779b97f4a7c15 + seed) & MASK for i in range(64)]
+            oracle = [v for limit, initial in cases for v in expected(table, limit, initial, filtered)]
+            poison = 0xa5a5a5a5a5a5a5a5
+            result = (u64 * (len(oracle) + 16))(*([poison] * (len(oracle) + 16)))
+            inputs = [(u64 * 64)(*table), (u32 * len(cases))(*(x[0] for x in cases))]
+            if not filtered: inputs.append((u64 * len(cases))(*(x[1] for x in cases)))
+            allocations = []
+            try:
+                for data in [*inputs, result]:
+                    address = u64()
+                    api('cuMemAlloc', [c.POINTER(u64), c.c_size_t], c.byref(address), c.sizeof(data))
+                    allocations.append(address)
+                    api('cuMemcpyHtoD', [u64, ptr, c.c_size_t], address, c.cast(data, ptr), c.sizeof(data))
+                # Native CUDA reads the low four bytes; wider backing storage
+                # also accommodates consumers whose scalar ABI reads eight.
+                count = u64(len(cases))
+                parameters = (ptr * (len(allocations) + 2))(
+                    *[c.cast(c.pointer(x), ptr) for x in [*allocations, count]], None)
+                api('cuLaunchKernel', [ptr] + [u32] * 7 + [ptr, c.POINTER(ptr), ptr],
+                    kernel, (len(cases) + 63) // 64, 1, 1, 64, 1, 1, 0, None, parameters, None)
+                api('cuCtxSynchronize', [])
+                api('cuMemcpyDtoH', [ptr, u64, c.c_size_t], c.cast(result, ptr), allocations[-1], c.sizeof(result))
+                for index, value in enumerate(oracle):
+                    if result[index] != value:
+                        raise RuntimeError(f'seed={seed} word={index}: got {result[index]:016x}, expected {value:016x}')
+                if list(result)[len(oracle):] != [poison] * 16: raise RuntimeError('output guard overwritten')
+                total += len(cases)
+            finally:
+                for address in reversed(allocations): api('cuMemFree', [u64], address)
+        print(f'NUMERICAL_PASS {args.kernel}: {total} cases, independent oracle and guards; '
+              f'device={device.value.decode()} driver={args.driver}')
+    finally:
+        if module.value: api('cuModuleUnload', [ptr], module)
+        api('cuCtxDestroy', [ptr], context)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/run_wave2.py b/examples/ptx_export/run_wave2.py
new file mode 100644
index 00000000..51ffa532
--- /dev/null
+++ b/examples/ptx_export/run_wave2.py
@@ -0,0 +1,102 @@
+#!/usr/bin/env python3
+"""Build one pinned workload and compare production DCE and bounded LLVM experiments."""
+import argparse
+import hashlib
+import json
+from pathlib import Path
+import re
+import shutil
+import subprocess
+import sys
+from replay_cleanup import normalized_functions
+
+MINER_COMMIT = '9791234249fc8cb762c296c4fda4503d2686ff77'
+WORKLOADS = ('solana', 'bitcoin', 'ethereum', 'shallenge', 'self_test', 'representative', 'small')
+
+
+def main():
+    parser = argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('workload', choices=WORKLOADS)
+    parser.add_argument('--out', type=Path, required=True)
+    parser.add_argument('--miner', type=Path)
+    args = parser.parse_args()
+    scripts = Path(__file__).resolve().parent
+    root = args.out.resolve(); root.mkdir(parents=True, exist_ok=True)
+    provenance = {'workload':args.workload, 'source_commit':subprocess.check_output(['git','rev-parse','HEAD'],text=True).strip()}
+    if args.workload in ('representative', 'small'):
+        kernels = scripts/('representative-kernels' if args.workload == 'representative' else 'kernels')
+        extra = [str(kernels)]
+        expected = set(re.findall(r'pub unsafe fn (\w+)\(', (kernels/'src/lib.rs').read_text()))
+    else:
+        if args.miner is None: raise RuntimeError('mining workload requires a pinned checkout')
+        miner = args.miner.resolve()
+        commit = subprocess.check_output(['git','-C',str(miner),'rev-parse','HEAD'],text=True).strip()
+        if commit != MINER_COMMIT: raise RuntimeError('mining revision differs from the experiment pin')
+        kernels = miner/'kernels'
+        manifest = kernels/'Cargo.toml'; original = manifest.read_text()
+        replacement = 'cuda_std = { path = '+json.dumps(str(scripts.parents[1]/'crates/cuda_std'))+' }'
+        patched, count = re.subn(r'^cuda_std = \{ git = "https://github.com/brandonros/Rust-CUDA.git", rev = "2f4fd1d" \}$',replacement,original,flags=re.M)
+        if count != 1: raise RuntimeError('unexpected cuda_std dependency')
+        (root/'Cargo.toml.original').write_text(original)
+        shutil.copy2(kernels/'Cargo.lock',root/'Cargo.lock.original')
+        manifest.write_text(patched); (root/'Cargo.toml.patched').write_text(patched)
+        provenance['mining_commit'] = commit
+        source_file = {'solana':'solana_vanity.rs','bitcoin':'bitcoin_vanity.rs','ethereum':'ethereum_vanity.rs','shallenge':'shallenge.rs','self_test':'self_test.rs'}[args.workload]
+        expected = set(re.findall(r'pub unsafe extern "C" fn (\w+)\(', (kernels/'src'/source_file).read_text()))
+        extra = [str(kernels),args.workload]
+    if not expected: raise RuntimeError('no expected kernel exports identified')
+    provenance['expected_entries'] = sorted(expected)
+    (root/'provenance.json').write_text(json.dumps(provenance,indent=2)+'\n')
+    modules = {}
+    failures = {}
+    for mode in ('none','default','inline-scalar'):
+        print(f'{args.workload}: building {mode}',flush=True)
+        out = root/mode; out.mkdir(parents=True,exist_ok=True)
+        command = ['cargo','run','-vv','-p','ptx_export','--features','llvm21','--',str(out),mode,*extra]
+        (out/'compiler-command.json').write_text(json.dumps(command,indent=2)+'\n')
+        with (out/'build.log').open('w') as log:
+            build = subprocess.run(command,stdout=log,stderr=subprocess.STDOUT)
+        if build.returncode:
+            failures[mode] = build.returncode
+            continue
+        subprocess.run(['opt-21','-passes=verify','-disable-output',str(out/'final-module.ll')],check=True)
+        print(f'{args.workload}: inspecting {mode}',flush=True)
+        subprocess.run([sys.executable,str(scripts/'inspect_codegen.py'),str(out),
+                        '--reuse-from',str(root/'none')],check=True)
+        source = (out/'rust_kernels.ptx').read_text()
+        if args.workload == 'representative':
+            for direction in ('idx','up','down','bfly'):
+                if 'shfl.sync.'+direction not in source:
+                    raise RuntimeError(f'{mode}: missing {direction} shuffle regression coverage')
+        entries = set(re.findall(r'\.entry\s+(\w+)\s*\(',source))
+        if entries != expected: raise RuntimeError(f'{mode}: unexpected kernel exports: missing={expected-entries}, extra={entries-expected}')
+        modules[mode] = normalized_functions(source)
+    if failures:
+        (root/'build-failures.json').write_text(json.dumps(failures,indent=2)+'\n')
+        if args.workload == 'representative':
+            for mode in failures:
+                ir = root/mode/'final-module.ll'
+                if ir.exists():
+                    subprocess.run([sys.executable,str(scripts/'diagnose_wave2_nvvm.py'),str(ir),
+                                    '--out',str(root/mode/'isolated')],check=True)
+        raise RuntimeError(f'build failures (other modes were still checked): {failures}')
+    if modules['default'] != modules['none']:
+        raise RuntimeError('production default DCE changes baseline PTX function bodies; investigate before promotion')
+    if args.workload not in ('representative','small'):
+        shutil.copy2(kernels/'Cargo.lock',root/'Cargo.lock.resolved')
+    command = [sys.executable,str(scripts/'replay_cleanup.py'),str(root/'none'),'--wave2']
+    if args.workload not in ('solana','small'):
+        command += ['--only','baseline,dce-only,inline-only']
+    subprocess.run(command,check=True)
+    replay = root/'none/cleanup-experiment/inline-only/rust_kernels.ptx'
+    if normalized_functions(replay.read_text()) != modules['inline-scalar']:
+        raise RuntimeError('integrated InlineScalar differs from independent replay')
+    result = {'workload':args.workload,'expected_entry_count':len(expected),'default_matches_disabled_ptx':True,
+              'inline_scalar_matches_replay':True,'nvidia_execution':False,
+              'ptx_sha256':{m:hashlib.sha256((root/m/'rust_kernels.ptx').read_bytes()).hexdigest() for m in modules}}
+    (root/'comparison.json').write_text(json.dumps(result,indent=2)+'\n')
+    print(json.dumps(result),flush=True)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/examples/ptx_export/run_wave2_gpu.py b/examples/ptx_export/run_wave2_gpu.py
new file mode 100644
index 00000000..b5bb7545
--- /dev/null
+++ b/examples/ptx_export/run_wave2_gpu.py
@@ -0,0 +1,152 @@
+#!/usr/bin/env python3
+"""Numerical probes and opt-in CUDA-event timings for unchanged wave-2 modules.
+
+Use native NVIDIA libcuda.so.1 for timing. An explicit compatible driver can
+validate another consumer numerically; those results are labeled separately.
+"""
+import argparse
+import ctypes as c
+import hashlib
+import json
+import os
+from pathlib import Path
+import statistics
+
+PTR, U32, U64 = c.c_void_p, c.c_uint32, c.c_uint64
+GUARD = 0xA5A5A5A5
+
+
+class Driver:
+    def __init__(self, library):
+        self.lib = c.CDLL(library)
+
+    def call(self, name, types, *values):
+        fn = getattr(self.lib, name+'_v2', None) or getattr(self.lib, name)
+        fn.argtypes, fn.restype = types, c.c_int
+        status = fn(*values)
+        if status:
+            raise RuntimeError(f'{name}: CUDA status {status}')
+
+    def launch(self, kernel, parameters, count):
+        self.call('cuLaunchKernel', [PTR]+[U32]*7+[PTR,c.POINTER(PTR),PTR],
+                  kernel, (count+31)//32,1,1,32,1,1,0,None,parameters,None)
+
+
+def input_and_oracle(kernel, count):
+    if kernel == 'wave2_float':
+        # Binary fractions in this range are exact with either fused or separate operations.
+        a = [(i % 1024 - 512) * 0.25 for i in range(count)]
+        b = [(i % 257 - 128) * 0.5 for i in range(count)]
+        expected = [(c.cast(c.pointer(c.c_float(x*0.5+y)), c.POINTER(U32))[0]) for x,y in zip(a,b)]
+        inputs = [(c.c_float*count)(*a), (c.c_float*count)(*b)]
+    elif kernel == 'wave2_atomic':
+        inputs, expected = [], [(count*(count+1)//2) & 0xFFFFFFFF]
+    else:
+        data = [(i*2654435761+17) & 0xFFFFFFFF for i in range(count)]
+        if kernel == 'wave2_shared':
+            partners = [(i//32)*32+31-i%32 for i in range(count)]
+            expected = [data[p] if p < count else 0 for p in partners]
+        else:
+            expected = []
+            for i in range(count):
+                base, lane = i//32*32, i%32
+                # IDX(31), UP(1), DOWN(1), XOR(1), including invalid edge lanes.
+                for partner in (31,lane-1,lane+1,lane^1):
+                    expected.append(0xFFFFFFFF if not 0<=partner<32 else
+                                    data[base+partner] if base+partner<count else 0)
+        inputs = [(U32*count)(*data)]
+    return inputs, expected
+
+
+def run_case(driver, kernel, name, count, repeats):
+    inputs, expected = input_and_oracle(name,count)
+    host_output = (U32*(len(expected)+16))(*([GUARD]*(len(expected)+16)))
+    if name == 'wave2_atomic': host_output[0] = 0
+    allocations = []
+    events = []
+    try:
+        for host in [*inputs,host_output]:
+            device = U64()
+            driver.call('cuMemAlloc',[c.POINTER(U64),c.c_size_t],c.byref(device),c.sizeof(host))
+            allocations.append(device)
+            driver.call('cuMemcpyHtoD',[U64,PTR,c.c_size_t],device,c.cast(host,PTR),c.sizeof(host))
+        scalar = U64(count)  # Low 32 bits for CUDA; accommodates compatible consumers.
+        parameters = (PTR*(len(allocations)+2))(*[c.cast(c.pointer(x),PTR) for x in [*allocations,scalar]],None)
+        driver.launch(kernel,parameters,count)
+        driver.call('cuCtxSynchronize',[])
+        driver.call('cuMemcpyDtoH',[PTR,U64,c.c_size_t],c.cast(host_output,PTR),allocations[-1],c.sizeof(host_output))
+        if list(host_output)[:len(expected)] != expected:
+            index = next(i for i, value in enumerate(expected) if host_output[i] != value)
+            raise RuntimeError(f'{name}/{count}: output[{index}] = {host_output[index]:#010x}, '
+                               f'expected {expected[index]:#010x}')
+        if list(host_output)[len(expected):] != [GUARD]*16:
+            raise RuntimeError(f'{name}/{count}: output guard overwritten')
+        result = {'kernel':name,'count':count,'numerical_pass':True,'guards_pass':True}
+        if repeats:
+            for _ in range(5): driver.launch(kernel,parameters,count)
+            driver.call('cuCtxSynchronize',[])
+            for _ in range(2):
+                event=PTR(); driver.call('cuEventCreate',[c.POINTER(PTR),U32],c.byref(event),0);events.append(event)
+            samples=[]
+            for _ in range(7):
+                driver.call('cuEventRecord',[PTR,PTR],events[0],None)
+                for _ in range(repeats): driver.launch(kernel,parameters,count)
+                driver.call('cuEventRecord',[PTR,PTR],events[1],None)
+                driver.call('cuEventSynchronize',[PTR],events[1])
+                elapsed=c.c_float()
+                driver.call('cuEventElapsedTime',[c.POINTER(c.c_float),PTR,PTR],c.byref(elapsed),*events)
+                samples.append(elapsed.value/repeats)
+            result['timing']={'method':'CUDA events around repeated launches after five warmups; allocation/JIT/copies excluded',
+                              'repeats_per_sample':repeats,'milliseconds_per_launch':samples,
+                              'median_milliseconds_per_launch':statistics.median(samples)}
+        return result
+    finally:
+        for event in reversed(events): driver.call('cuEventDestroy',[PTR],event)
+        for pointer in reversed(allocations): driver.call('cuMemFree',[U64],pointer)
+
+
+def main():
+    parser=argparse.ArgumentParser(description=__doc__)
+    parser.add_argument('module',type=Path)
+    parser.add_argument('--driver',default='libcuda.so.1')
+    parser.add_argument('--kernel',choices=['wave2_float','wave2_shared','wave2_atomic','wave2_shuffle'],required=True)
+    parser.add_argument('--counts',default='1,31,32,33,257,131072')
+    parser.add_argument('--benchmark',action='store_true')
+    parser.add_argument('--repeats',type=int,default=100)
+    parser.add_argument('--out',type=Path,required=True)
+    args=parser.parse_args()
+    if args.benchmark and args.driver!='libcuda.so.1':
+        parser.error('benchmarking requires native NVIDIA libcuda.so.1; compatible drivers are numerical-only')
+    counts=[int(v) for v in args.counts.split(',')]
+    if any(n<1 or n>2**24 for n in counts) or not 1<=args.repeats<=10000:
+        parser.error('counts must be 1..2^24 and repeats 1..10000')
+    os.environ['CUMETAL_ENABLE_WORKLOAD_SPECIALIZATIONS']='0'
+    os.environ['CUMETAL_TRACE_GPU']='1'
+    driver=Driver(args.driver)
+    driver.call('cuInit',[U32],0)
+    device=c.create_string_buffer(256)
+    driver.call('cuDeviceGetName',[PTR,c.c_int,c.c_int],device,len(device),0)
+    version=c.c_int();driver.call('cuDriverGetVersion',[c.POINTER(c.c_int)],c.byref(version))
+    context,module,kernel=PTR(),PTR(),PTR()
+    driver.call('cuCtxCreate',[c.POINTER(PTR),U32,c.c_int],c.byref(context),0,0)
+    report={'module_sha256':hashlib.sha256(args.module.read_bytes()).hexdigest(),'runner_sha256':hashlib.sha256(Path(__file__).read_bytes()).hexdigest(),
+            'driver':args.driver,'driver_version':version.value,'device':device.value.decode(),
+            'native_nvidia_driver_requested':args.driver=='libcuda.so.1','results':[]}
+    args.out.parent.mkdir(parents=True,exist_ok=True)
+    try:
+        driver.call('cuModuleLoad',[c.POINTER(PTR),c.c_char_p],c.byref(module),os.fsencode(args.module.resolve()))
+        driver.call('cuModuleGetFunction',[c.POINTER(PTR),PTR,c.c_char_p],c.byref(kernel),module,args.kernel.encode())
+        for count in counts:
+            result=run_case(driver,kernel,args.kernel,count,args.repeats if args.benchmark else 0)
+            report['results'].append(result)
+            args.out.write_text(json.dumps(report,indent=2)+'\n')
+            print(json.dumps(result),flush=True)
+    except Exception as error:
+        report['error']=str(error);args.out.write_text(json.dumps(report,indent=2)+'\n');raise
+    finally:
+        if module.value: driver.call('cuModuleUnload',[PTR],module)
+        driver.call('cuCtxDestroy',[PTR],context)
+
+
+if __name__=='__main__':
+    main()
diff --git a/examples/ptx_export/src/main.rs b/examples/ptx_export/src/main.rs
new file mode 100644
index 00000000..706a7681
--- /dev/null
+++ b/examples/ptx_export/src/main.rs
@@ -0,0 +1,63 @@
+use cuda_builder::{CudaBuilder, Llvm19Cleanup};
+use std::{env, fs, path::PathBuf};
+
+fn main() -> Result<(), Box<dyn std::error::Error>> {
+    let output = PathBuf::from(
+        env::args_os()
+            .nth(1)
+            .unwrap_or_else(|| "artifacts/ptx".into()),
+    );
+    fs::create_dir_all(&output)?;
+    let output = output.canonicalize()?;
+    let kernels = env::args_os()
+        .nth(3)
+        .map(PathBuf::from)
+        .unwrap_or_else(|| PathBuf::from(env!("CARGO_MANIFEST_DIR")).join("kernels"));
+    let mut builder = CudaBuilder::new(kernels);
+    if let Some(features) = env::args().nth(4) {
+        builder = builder.build_args(&["--no-default-features", "--features", &features]);
+    }
+    let mode = env::args().nth(2).unwrap_or_else(|| "default".into());
+    // Historical wave-1 experiments explicitly isolate their selected pipeline.
+    // The default mode exercises the production default without overrides.
+    if cfg!(feature = "llvm21") && mode != "default" {
+        builder = builder.llvm19_global_dce(false);
+    }
+    match mode.as_str() {
+        "default" => {}
+        "none" => {}
+        "size-s" => {
+            builder = builder
+                .llvm19_cleanup(Llvm19Cleanup::Inline)
+                .build_args(&["--config", "profile.release.opt-level=\"s\""])
+        }
+        "size-z" => {
+            builder = builder
+                .llvm19_cleanup(Llvm19Cleanup::Inline)
+                .build_args(&["--config", "profile.release.opt-level=\"z\""])
+        }
+        "module-scalar" => builder = builder.llvm19_module_cleanup(true),
+        "module-inline" => {
+            builder = builder
+                .llvm19_module_cleanup(true)
+                .llvm19_cleanup(Llvm19Cleanup::Inline)
+        }
+        "inline-scalar" => builder = builder.llvm19_cleanup(Llvm19Cleanup::InlineScalar),
+        "dce" => builder = builder.llvm19_cleanup(Llvm19Cleanup::GlobalDce),
+        "scalar" => builder = builder.llvm19_cleanup(Llvm19Cleanup::Scalar),
+        "inline" => builder = builder.llvm19_cleanup(Llvm19Cleanup::Inline),
+        _ => {
+            return Err(
+                "cleanup mode must be default, none, dce, scalar, inline, inline-scalar, module-scalar, module-inline, size-s, or size-z".into(),
+            );
+        }
+    }
+    let ptx = builder
+        .copy_to(output.join("rust_kernels.ptx"))
+        .final_module_path(output.join("final-module.ll"))
+        .emit_llvm_ir(true)
+        .build()
+        .map_err(|error| std::io::Error::other(format!("PTX compilation failed: {error:?}")))?;
+    println!("Exported {}", ptx.display());
+    Ok(())
+}
diff --git a/examples/ptx_export/test_inspect_codegen.py b/examples/ptx_export/test_inspect_codegen.py
new file mode 100644
index 00000000..394a4bbf
--- /dev/null
+++ b/examples/ptx_export/test_inspect_codegen.py
@@ -0,0 +1,67 @@
+import unittest
+from inspect_codegen import ptx_summary, sass_summary, sass_symbols
+
+
+class InventoryTests(unittest.TestCase):
+    def test_ptx_prototypes_nested_calls_and_self_select(self):
+        source = '''
+.extern .func (.param .b64 retval) prototype(.param .b64 arg);
+.visible .func (.param .b64 retval) preserved(.param .b64 arg) {
+ .reg .b64 %rd<3>;
+ { .param .b64 slot; }
+ selp.b64 %rd1, %rd2, %rd1, %p1;
+ @%p1 bra DONE;
+DONE:
+ ret;
+}
+.visible .entry direct() {
+ selp.b32 %r1, %r2, %r3, %p1;
+ ret;
+}
+'''
+        result = ptx_summary(source)
+        self.assertEqual(set(result), {'preserved', 'direct'})
+        self.assertEqual(len(result['preserved']['self_false_selects']), 1)
+        self.assertEqual(result['direct']['self_false_selects'], [])
+        self.assertEqual(result['preserved']['opcode_histogram']['bra'], 1)
+
+    def test_sass_counts_instructions_not_encoding_continuations(self):
+        result = sass_summary('''Function : preserved
+ /*0000*/ @!P0 LDG.E R2, [R4]; /* 0x123 */
+ /*0010*/ SEL R3, R2, R1, P0;
+ /* 0x000000 */
+Function : direct
+ /*0000*/ EXIT;
+''')
+        self.assertEqual(result['preserved'], {'LDG.E': 1, 'SEL': 1})
+        self.assertEqual(result['direct'], {'EXIT': 1})
+
+    def test_helper_extents_exclude_adjacent_functions(self):
+        source = """
+ .size kernel,(END - kernel)
+kernel:
+ /*0000*/ CALL.REL helper;
+ .size $kernel$first,($kernel$second - $kernel$first)
+$kernel$first:
+ /*0010*/ @P0 SEL R1, R2, R3, P0;
+LOCAL:
+ /*0020*/ RET.REL.NODEC;
+ .size $kernel$second,(END - $kernel$second)
+$kernel$second:
+ /*0030*/ LDG.E R2, [R4];
+ /*0040*/ NOP;
+END:
+"""
+        result = sass_symbols(source)
+        self.assertEqual(result['$kernel$first']['opcode_histogram'], {'SEL': 1, 'RET.REL.NODEC': 1})
+        self.assertEqual(result['$kernel$second']['non_nop_instructions'], 1)
+        self.assertEqual(result['kernel']['non_nop_instructions'], 4)
+        self.assertEqual(result['kernel']['scope'], 'entry_including_helpers')
+
+    def test_missing_symbol_end_is_an_error(self):
+        with self.assertRaises(ValueError):
+            sass_symbols('.size helper,(MISSING - helper)\nhelper:\n /*0000*/ RET;\n')
+
+
+if __name__ == '__main__':
+    unittest.main()
diff --git a/examples/ptx_export/test_inspection_reuse.py b/examples/ptx_export/test_inspection_reuse.py
new file mode 100644
index 00000000..f5615e7d
--- /dev/null
+++ b/examples/ptx_export/test_inspection_reuse.py
@@ -0,0 +1,34 @@
+import json
+from pathlib import Path
+import tempfile
+import unittest
+from inspect_codegen import INSPECTION_OUTPUTS, reuse_inspection
+
+
+class InspectionReuseTests(unittest.TestCase):
+    def test_identical_inputs_reuse_with_explicit_provenance(self):
+        with tempfile.TemporaryDirectory() as directory:
+            source, dest = self.fixtures(Path(directory))
+            self.assertTrue(reuse_inspection(source,dest))
+            for name in INSPECTION_OUTPUTS:
+                self.assertEqual((source/name).read_bytes(),(dest/name).read_bytes())
+            self.assertIn('assembly/disassembly not rerun',json.loads((dest/'reused-inspection.json').read_text())['note'])
+            self.assertFalse(reuse_inspection(source,source))
+
+    def test_changed_ptx_tool_or_inspector_never_reuses(self):
+        for name in ['rust_kernels.ptx','inspection-producer-sha256.txt','inspection-tools-sha256.json','ptxas-version.txt']:
+            with self.subTest(name=name), tempfile.TemporaryDirectory() as directory:
+                source,dest=self.fixtures(Path(directory))
+                (dest/name).write_text('different')
+                self.assertFalse(reuse_inspection(source,dest))
+                self.assertFalse((dest/'rust_kernels.cubin').exists())
+
+    @staticmethod
+    def fixtures(root):
+        source,dest=root/'source',root/'dest';source.mkdir();dest.mkdir()
+        for name in ['rust_kernels.ptx','inspection-producer-sha256.txt','inspection-tools-sha256.json',
+                     'ptxas-version.txt','nvdisasm-version.txt','cuobjdump-version.txt']:
+            for path in [source,dest]:(path/name).write_text(name)
+        for name in INSPECTION_OUTPUTS:(source/name).write_text('offline output '+name)
+        (source/'inspection-commands.json').write_text('[]')
+        return source,dest
diff --git a/examples/ptx_export/test_module_cleanup.py b/examples/ptx_export/test_module_cleanup.py
new file mode 100644
index 00000000..45a26114
--- /dev/null
+++ b/examples/ptx_export/test_module_cleanup.py
@@ -0,0 +1,28 @@
+import unittest
+from check_module_cleanup import canonical
+
+
+class ModuleComparisonTests(unittest.TestCase):
+    def test_comments_do_not_change_ir(self):
+        self.assertEqual(canonical('; ModuleID = one\nbb: ; preds = %a, %b\n ret void\n'),
+                         canonical('; ModuleID = two\nbb: ; preds = %b, %a\n ret void\n'))
+
+    def test_strings_and_semantic_differences_are_preserved(self):
+        line = '@"semi;colon" = constant [2 x i8] c";x" ; comment'
+        self.assertEqual(canonical(line), '@"semi;colon" = constant [2 x i8] c";x"')
+        self.assertNotEqual(canonical('ret i32 1 ; first'), canonical('ret i32 2 ; second'))
+        self.assertNotEqual(canonical('@s = constant [1 x i8] c";"'),
+                            canonical('@s = constant [1 x i8] c":"'))
+
+    def test_phi_order_preserves_value_block_associations(self):
+        a = '%0 = phi i64 [ 3, %1 ], [ 5, %2 ]'
+        b = '%0 = phi i64 [ 5, %2 ], [ 3, %1 ]'
+        wrong = '%0 = phi i64 [ 5, %1 ], [ 3, %2 ]'
+        self.assertEqual(canonical(a), canonical(b))
+        self.assertNotEqual(canonical(a), canonical(wrong))
+        self.assertEqual(canonical('%0 = phi [2 x i8] [ [i8 1, i8 2], %1 ], [ zeroinitializer, %2 ]'),
+                         canonical('%0 = phi [2 x i8] [ zeroinitializer, %2 ], [ [i8 1, i8 2], %1 ]'))
+
+
+if __name__ == '__main__':
+    unittest.main()
diff --git a/examples/vecadd/Cargo.toml b/examples/vecadd/Cargo.toml
index 8686504a..eb0c4f6f 100644
--- a/examples/vecadd/Cargo.toml
+++ b/examples/vecadd/Cargo.toml
@@ -5,10 +5,10 @@ edition = "2024"
 
 [features]
 default = []
-# Build the kernels crate with the LLVM 19 backend. Forwards to `cuda_builder`,
+# Build the kernels crate with the LLVM 21 backend. Forwards to `cuda_builder`,
 # which propagates the feature to `nvvm` (default arch -> Compute100 / Blackwell)
 # and to its nested `cargo build -p rustc_codegen_nvvm`.
-llvm19 = ["cuda_builder/llvm19"]
+llvm21 = ["cuda_builder/llvm21"]
 
 [dependencies]
 cust = { path = "../../crates/cust" }
diff --git a/flake.lock b/flake.lock
index 7eaca8a8..07e24137 100644
--- a/flake.lock
+++ b/flake.lock
@@ -2,11 +2,11 @@
   "nodes": {
     "nixpkgs": {
       "locked": {
-        "lastModified": 1775888245,
-        "narHash": "sha256-nwASzrRDD1JBEu/o8ekKYEXm/oJW6EMCzCRdrwcLe90=",
+        "lastModified": 1789264731,
+        "narHash": "sha256-llGJbC0CcU8DfROr6mZjRJgMLQd/SKwfpzxJH/2lHO4=",
         "owner": "NixOS",
         "repo": "nixpkgs",
-        "rev": "13043924aaa7375ce482ebe2494338e058282925",
+        "rev": "02f5696b0e6097e589076d886b317b83ff0437d7",
         "type": "github"
       },
       "original": {
diff --git a/flake.nix b/flake.nix
index c5a0f761..fb5a97cf 100644
--- a/flake.nix
+++ b/flake.nix
@@ -27,29 +27,29 @@
           # ---- CUDA toolkit (Nix-managed) ----
           # Toolkit pin chooses what PTX version NVVM emits, which then dictates
           # the minimum host driver version at runtime:
-          #   CUDA 13.2 → NVVM 22.0 → PTX 9.2 → needs driver 580.x+ (CUDA 13)
+          #   CUDA 13.3.1 → modern LLVM 21 dialect → PTX 9.3 → needs driver 580.x+ (CUDA 13)
           #   CUDA 12.9 → NVVM 21.x → PTX 8.x → runs on CUDA 12.x drivers
           # `cudatoolkit` is the kitchen-sink symlinkJoin maintained by nixpkgs —
           # every header path and lib layout is already wired correctly. The host
           # NVIDIA driver (libcuda.so.1) is needed at runtime; it is *not* shimmed
           # in here — supply it via the system or extend LD_LIBRARY_PATH yourself
           # before running CUDA programs.
-          cuda19Root = pkgs.cudaPackages_13_2.cudatoolkit;
+          cuda21Root = pkgs.cudaPackages_13_3.cudatoolkit;
           cuda7Root = pkgs.cudaPackages_12_9.cudatoolkit;
 
           toolchain = pkgs.rust-bin.fromRustupToolchainFile ./rust-toolchain.toml;
 
-          # ---- LLVM 19 (from current nixpkgs) ----
-          llvm19 = pkgs.llvmPackages_19;
-          llvm19Bin = lib.getBin llvm19.llvm;
-          llvm19Dev = lib.getDev llvm19.llvm;
-          llvm19CompatTools = pkgs.symlinkJoin {
-            name = "llvm19-compat-tools";
+          # ---- LLVM 21 (from current nixpkgs) ----
+          llvm21 = pkgs.llvmPackages_21;
+          llvm21Bin = lib.getBin llvm21.llvm;
+          llvm21Dev = lib.getDev llvm21.llvm;
+          llvm21CompatTools = pkgs.symlinkJoin {
+            name = "llvm21-compat-tools";
             paths = [
-              (pkgs.writeShellScriptBin "opt-19" ''exec ${llvm19Bin}/bin/opt "$@"'')
-              (pkgs.writeShellScriptBin "llvm-as-19" ''exec ${llvm19Bin}/bin/llvm-as "$@"'')
-              (pkgs.writeShellScriptBin "llvm-dis-19" ''exec ${llvm19Bin}/bin/llvm-dis "$@"'')
-              (pkgs.writeShellScriptBin "llc-19" ''exec ${llvm19Bin}/bin/llc "$@"'')
+              (pkgs.writeShellScriptBin "opt-21" ''exec ${llvm21Bin}/bin/opt "$@"'')
+              (pkgs.writeShellScriptBin "llvm-as-21" ''exec ${llvm21Bin}/bin/llvm-as "$@"'')
+              (pkgs.writeShellScriptBin "llvm-dis-21" ''exec ${llvm21Bin}/bin/llvm-dis "$@"'')
+              (pkgs.writeShellScriptBin "llc-21" ''exec ${llvm21Bin}/bin/llc "$@"'')
             ];
           };
 
@@ -75,10 +75,10 @@
             pkgs.cmake
             pkgs.ninja
           ];
-          # The v19 shell uses unstable's runtime libs (modern glibc). The v7 shell has
+          # The v21 shell uses unstable's runtime libs (modern glibc). The v7 shell has
           # to match LLVM 7's glibc generation (23.05), otherwise ncurses/libstdc++ from
           # unstable demand GLIBC_2.38+ symbols LLVM 7's linked glibc 2.37 doesn't have.
-          v19BuildInputs = [
+          v21BuildInputs = [
             pkgs.openssl
             pkgs.libxml2
             pkgs.zlib
@@ -116,7 +116,7 @@
             buildInputs = v7BuildInputs;
             LLVM_CONFIG = "${llvm7Dev}/bin/llvm-config";
             # Give bindgen an explicit libclang (matched to 23.05's glibc) so it doesn't
-            # fall back to scanning system paths and pick up an apt-installed LLVM 19
+            # fall back to scanning system paths and pick up an apt-installed LLVM 21
             # with deps the v7 shell's LD_LIBRARY_PATH doesn't satisfy.
             LIBCLANG_PATH = "${pkgsLlvm7.lib.getLib pkgsLlvm7.llvmPackages_7.libclang}/lib";
             shellHook = ''
@@ -129,33 +129,33 @@
             '';
           });
 
-          # ---- LLVM 19-only shell (CUDA 13.2 toolkit, the active-work shell) ----
-          v19Shell = pkgs.mkShell ((mkCudaEnv cuda19Root) // {
+          # ---- LLVM 21-only shell (CUDA 13.3.1 toolkit, the active-work shell) ----
+          v21Shell = pkgs.mkShell ((mkCudaEnv cuda21Root) // {
             nativeBuildInputs = commonNativeInputs ++ [
-              cuda19Root
-              llvm19.clang
-              llvm19.libclang
-              llvm19Bin
-              llvm19Dev
-              llvm19CompatTools
+              cuda21Root
+              llvm21.clang
+              llvm21.libclang
+              llvm21Bin
+              llvm21Dev
+              llvm21CompatTools
             ];
-            buildInputs = v19BuildInputs;
-            LLVM_CONFIG_19 = "${llvm19Dev}/bin/llvm-config";
-            LIBCLANG_PATH = "${lib.getLib llvm19.libclang}/lib";
+            buildInputs = v21BuildInputs;
+            LLVM_CONFIG_21 = "${llvm21Dev}/bin/llvm-config";
+            LIBCLANG_PATH = "${lib.getLib llvm21.libclang}/lib";
             shellHook = ''
-              export PATH="${llvm19CompatTools}/bin:${llvm19Bin}/bin:${llvm19Dev}/bin:${cuda19Root}/bin:${cuda19Root}/nvvm/bin:$PATH"
-              export LD_LIBRARY_PATH="${cuda19Root}/nvvm/lib:${cuda19Root}/nvvm/lib64:${cuda19Root}/lib64:${cuda19Root}/lib:${pkgs.ncurses.out}/lib:${pkgs.libxml2.out}/lib:${pkgs.zlib.out}/lib:${pkgs.stdenv.cc.cc.lib}/lib''${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}"
+              export PATH="${llvm21CompatTools}/bin:${llvm21Bin}/bin:${llvm21Dev}/bin:${cuda21Root}/bin:${cuda21Root}/nvvm/bin:$PATH"
+              export LD_LIBRARY_PATH="${cuda21Root}/nvvm/lib:${cuda21Root}/nvvm/lib64:${cuda21Root}/lib64:${cuda21Root}/lib:${pkgs.ncurses.out}/lib:${pkgs.libxml2.out}/lib:${pkgs.zlib.out}/lib:${pkgs.stdenv.cc.cc.lib}/lib''${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}"
 
-              echo "rust-cuda llvm19 shell (${system})"
+              echo "rust-cuda llvm21 shell (${system})"
               echo "  CUDA_HOME=$CUDA_HOME"
-              echo "  LLVM_CONFIG_19=$LLVM_CONFIG_19"
+              echo "  LLVM_CONFIG_21=$LLVM_CONFIG_21"
             '';
           });
         in
         {
-          default = v19Shell;
+          default = v21Shell;
           v7 = v7Shell;
-          v19 = v19Shell;
+          v21 = v21Shell;
         };
     in
     {
diff --git a/guide/src/guide/getting_started.md b/guide/src/guide/getting_started.md
index c5d792c8..d8a0b7b1 100644
--- a/guide/src/guide/getting_started.md
+++ b/guide/src/guide/getting_started.md
@@ -367,9 +367,9 @@ After installing the CUDA Toolkit, verify the following directories are on your
 
 ```powershell
 # CUDA 13.x
-$env:PATH += ";C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.2\bin"
-$env:PATH += ";C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.2\bin\x64"
-$env:PATH += ";C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.2\nvvm\bin\x64"
+$env:PATH += ";C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin"
+$env:PATH += ";C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\bin\x64"
+$env:PATH += ";C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v13.3\nvvm\bin\x64"
 
 # CUDA 12.x -- replace v12.x with your installed version
 $env:PATH += ";C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v12.9\bin"
diff --git a/scripts/trace-build.sh b/scripts/trace-build.sh
new file mode 100755
index 00000000..b9a5d5e7
--- /dev/null
+++ b/scripts/trace-build.sh
@@ -0,0 +1,30 @@
+#!/usr/bin/env bash
+# Run from the consuming project. Pass the entire command, including nix develop
+# if shell realization/download time should be included. No cache is deleted.
+set -u
+if [ "$#" -eq 0 ]; then
+    echo "Usage: $0 nix develop .#v21 --command cargo build --timings -vv [build options]" >&2
+    exit 2
+fi
+
+NVVM_TIMING_DIR=${NVVM_TIMING_DIR:-${XDG_CACHE_HOME:-$HOME/.cache}/rust-cuda-traces/$(date -u +%Y%m%dT%H%M%SZ)-$$}
+mkdir -p "$NVVM_TIMING_DIR" || exit 1
+NVVM_TIMING_DIR=$(cd "$NVVM_TIMING_DIR" && pwd -P) || exit 1
+export NVVM_TIMING_DIR
+build_log="$NVVM_TIMING_DIR/build.log"
+printf 'Build trace: %s\n' "$build_log"
+{
+    printf 'start_utc=%s cwd=%q command=' "$(date -u +%Y-%m-%dT%H:%M:%SZ)" "$PWD"
+    printf '%q ' "$@"
+    printf '\n'
+} >> "$build_log"
+SECONDS=0
+if "$@" >> "$build_log" 2>&1; then
+    build_status=0
+else
+    build_status=$?
+fi
+printf 'end_utc=%s elapsed_seconds=%s exit_status=%s\n' \
+    "$(date -u +%Y-%m-%dT%H:%M:%SZ)" "$SECONDS" "$build_status" >> "$build_log"
+printf 'Build exit status: %s; trace: %s\n' "$build_status" "$build_log"
+exit "$build_status"
diff --git a/scripts/vast-ai.sh b/scripts/vast-ai.sh
index 951c7ddd..e2018b4f 100755
--- a/scripts/vast-ai.sh
+++ b/scripts/vast-ai.sh
@@ -1,7 +1,7 @@
 #!/bin/bash
 
 # Build vecadd on the Nix-equipped build host, then push it to a vast.ai
-# Blackwell box with CUDA 13.2+ and run it there.
+# Blackwell box with CUDA 13.3+ and run it there.
 
 set -euo pipefail
 
@@ -23,7 +23,7 @@ VAST_SSH_OPTS=(-o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o Lo
 # in the container's glibc + the CUDA driver's libcuda.so.1.
 echo ">> Building on $BUILD_HOST"
 ssh "$BUILD_HOST" "cd '$BUILD_DIR' \
-  && nix develop .#v19 --command cargo build -p vecadd \
+  && nix develop .#v21 --command cargo build -p vecadd \
   && nix shell nixpkgs#patchelf --command patchelf \
        --set-interpreter /lib64/ld-linux-x86-64.so.2 \
        --remove-rpath '$BUILD_BIN'"
diff --git a/tests/llvm-wrapper/attributes.cpp b/tests/llvm-wrapper/attributes.cpp
new file mode 100644
index 00000000..0a6d6ab7
--- /dev/null
+++ b/tests/llvm-wrapper/attributes.cpp
@@ -0,0 +1,81 @@
+#include "rustllvm.h"
+#include "llvm/IR/Verifier.h"
+#include <cstdlib>
+#include "llvm/AsmParser/Parser.h"
+#include "llvm/Transforms/IPO/GlobalDCE.h"
+
+extern "C" void LLVMRustSetNormalizedTarget(LLVMModuleRef, const char *);
+extern "C" void LLVMRustAddFunctionAttribute(LLVMValueRef, unsigned, LLVMRustAttribute);
+extern "C" void LLVMRustAddFunctionAttributeWithType(LLVMValueRef, unsigned, LLVMRustAttribute, LLVMTypeRef);
+extern "C" void LLVMRustRemoveFunctionAttributes(LLVMValueRef, unsigned, LLVMRustAttribute);
+extern "C" void LLVMRustAddCallSiteAttribute(LLVMValueRef, unsigned, LLVMRustAttribute);
+
+// These tests never request Rust-owned string output.
+extern "C" void LLVMRustStringWriteImpl(RustStringRef, const char *, size_t) {
+  std::abort();
+}
+
+static void require(bool Condition) {
+  if (!Condition)
+    std::abort();
+}
+
+extern "C" void LLVMRustRestoreNvvmKernelAnnotations(LLVMModuleRef);
+
+static void kernelRetention() {
+  llvm::LLVMContext C;
+  llvm::SMDiagnostic Error;
+  auto M = llvm::parseAssemblyString(R"(
+    target triple = "nvptx64-nvidia-cuda"
+    define void @entry(ptr %out) { store i32 42, ptr %out ret void }
+    define internal void @dead() { ret void }
+    !nvvm.annotations = !{!0}
+    !0 = !{ptr @entry, !"kernel", i32 1}
+  )", Error, C);
+  require(bool(M));
+  auto *F = M->getFunction("entry");
+  require(F->getCallingConv() == llvm::CallingConv::PTX_Kernel);
+  require(M->getNamedMetadata("nvvm.annotations")->getNumOperands() == 0);
+  LLVMRustRestoreNvvmKernelAnnotations(llvm::wrap(M.get()));
+  LLVMRustRestoreNvvmKernelAnnotations(llvm::wrap(M.get()));
+  auto *Annotations = M->getNamedMetadata("nvvm.annotations");
+  require(Annotations->getNumOperands() == 1);
+  auto *Node = Annotations->getOperand(0);
+  require(llvm::cast<llvm::ValueAsMetadata>(Node->getOperand(0))->getValue() == F);
+  require(llvm::cast<llvm::MDString>(Node->getOperand(1))->getString() == "kernel");
+  require(llvm::mdconst::extract<llvm::ConstantInt>(Node->getOperand(2))->equalsInt(1));
+  llvm::ModuleAnalysisManager AM;
+  llvm::GlobalDCEPass().run(*M, AM);
+  require(M->getFunction("entry") == F);
+  require(M->getFunction("dead") == nullptr);
+  require(!llvm::verifyModule(*M, &llvm::errs()));
+}
+
+int main() {
+  kernelRetention();
+  llvm::LLVMContext C;
+  llvm::Module M("wrapper-test", C);
+  LLVMRustSetNormalizedTarget(llvm::wrap(&M), "nvptx64-nvidia-cuda");
+  require(M.getTargetTriple().str() == "nvptx64-nvidia-cuda");
+  auto *Ptr = llvm::PointerType::get(C, 0);
+  auto *FT = llvm::FunctionType::get(llvm::Type::getVoidTy(C), {Ptr}, false);
+  auto *F = llvm::Function::Create(FT, llvm::GlobalValue::ExternalLinkage, "callee", M);
+  auto CheckCapture = [](llvm::Attribute A) {
+    require(A.isValid());
+    require(A.getCaptureInfo() == llvm::CaptureInfo::none());
+    require(A.getAsString() == "captures(none)");
+  };
+  LLVMRustAddFunctionAttribute(llvm::wrap(F), 1, NoCapture);
+  CheckCapture(F->getAttributes().getParamAttr(0, llvm::Attribute::Captures));
+  LLVMRustRemoveFunctionAttributes(llvm::wrap(F), 1, NoCapture);
+  require(!F->hasParamAttribute(0, llvm::Attribute::Captures));
+  LLVMRustAddFunctionAttributeWithType(llvm::wrap(F), 1, NoCapture, llvm::wrap(Ptr));
+  CheckCapture(F->getAttributes().getParamAttr(0, llvm::Attribute::Captures));
+  auto *Caller = llvm::Function::Create(FT, llvm::GlobalValue::ExternalLinkage, "caller", M);
+  llvm::IRBuilder<> B(llvm::BasicBlock::Create(C, "entry", Caller));
+  auto *Call = B.CreateCall(F, {Caller->getArg(0)});
+  LLVMRustAddCallSiteAttribute(llvm::wrap(Call), 1, NoCapture);
+  CheckCapture(Call->getAttributes().getParamAttr(0, llvm::Attribute::Captures));
+  B.CreateRetVoid();
+  require(!llvm::verifyModule(M, &llvm::errs()));
+}
diff --git a/tests/llvm-wrapper/run.py b/tests/llvm-wrapper/run.py
new file mode 100644
index 00000000..a70b88e4
--- /dev/null
+++ b/tests/llvm-wrapper/run.py
@@ -0,0 +1,35 @@
+#!/usr/bin/env python3
+"""Compile both LLVM 21 wrappers and check attribute semantics without CUDA."""
+import os
+from pathlib import Path
+import shlex
+import subprocess
+import tempfile
+
+root = Path(__file__).resolve().parents[2]
+wrapper = root / 'crates/rustc_codegen_nvvm/rustc_llvm_wrapper'
+config = os.environ.get('LLVM_CONFIG_21', 'llvm-config-21')
+
+
+def llvm_flags(*args):
+    return shlex.split(subprocess.check_output([config, *args], text=True))
+
+
+version = subprocess.check_output([config, '--version'], text=True).strip()
+if not version.startswith('21.'):
+    raise RuntimeError(f'expected LLVM 21, got {version}')
+cxx = shlex.split(os.environ.get('CXX', 'c++'))
+flags = [*llvm_flags('--cxxflags'), '-DLLVM_VERSION_MAJOR=21',
+         '-DLLVM_COMPONENT_NVPTX', '-I' + str(wrapper)]
+with tempfile.TemporaryDirectory(prefix='llvm-wrapper-test-') as directory:
+    out = Path(directory)
+    for source in ('RustWrapper', 'PassWrapper'):
+        subprocess.run([*cxx, *flags, '-c', str(wrapper / (source + '.cpp')),
+                        '-o', str(out / (source + '.o'))], check=True)
+    executable = out / 'attributes'
+    subprocess.run([*cxx, *flags, str(Path(__file__).with_name('attributes.cpp')),
+                    str(out / 'RustWrapper.o'),
+                    *llvm_flags('--ldflags', '--libs', '--system-libs'),
+                    '-o', str(executable)], check=True)
+    subprocess.run([str(executable)], check=True)
+print('LLVM wrapper compilation and capture attribute checks passed')