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Merge pull request #3007 from fpistm/stm32cubeWB0_update
chore(wb0): update to latest STM32CubeWB0 v1.5.0
2 parents ba19af2 + a2b8a68 commit a06d4f6

15 files changed

Lines changed: 220 additions & 118 deletions

‎CI/update/patch/HAL/WB0/0001-fix-wb0-HAL-and-LL-warnings.patch‎

Lines changed: 22 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -7,10 +7,8 @@ Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
77
---
88
.../Inc/stm32wb0x_ll_dma.h | 40 +++++++++++++++++++
99
.../Inc/stm32wb0x_ll_radio_timer.h | 3 ++
10-
.../Src/stm32wb0x_hal_flash_ex.c | 2 +-
1110
.../Src/stm32wb0x_hal_radio_timer.c | 4 +-
12-
.../Src/stm32wb0x_ll_adc.c | 2 +-
13-
5 files changed, 47 insertions(+), 4 deletions(-)
11+
3 files changed, 45 insertions(+), 2 deletions(-)
1412

1513
diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h b/system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_ll_dma.h
1614
index bc237ac45..fff12f8c3 100644
@@ -23,15 +21,15 @@ index bc237ac45..fff12f8c3 100644
2321
+ (void)DMAx;
2422
SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN);
2523
}
26-
24+
2725
@@ -450,6 +451,7 @@ __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
2826
*/
2927
__STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
3028
{
3129
+ (void)DMAx;
3230
CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_EN);
3331
}
34-
32+
3533
@@ -470,6 +472,7 @@ __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
3634
*/
3735
__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)
@@ -191,127 +189,127 @@ index bc237ac45..fff12f8c3 100644
191189
+ (void)DMAx;
192190
WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress);
193191
}
194-
192+
195193
@@ -985,6 +1007,7 @@ __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel
196194
*/
197195
__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
198196
{
199197
+ (void)DMAx;
200198
WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, PeriphAddress);
201199
}
202-
200+
203201
@@ -1006,6 +1029,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel
204202
*/
205203
__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)
206204
{
207205
+ (void)DMAx;
208206
return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR));
209207
}
210-
208+
211209
@@ -1027,6 +1051,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Cha
212210
*/
213211
__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)
214212
{
215213
+ (void)DMAx;
216214
return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR));
217215
}
218-
216+
219217
@@ -1050,6 +1075,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Cha
220218
*/
221219
__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
222220
{
223221
+ (void)DMAx;
224222
WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR, MemoryAddress);
225223
}
226-
224+
227225
@@ -1073,6 +1099,7 @@ __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel
228226
*/
229227
__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
230228
{
231229
+ (void)DMAx;
232230
WRITE_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR, MemoryAddress);
233231
}
234-
232+
235233
@@ -1094,6 +1121,7 @@ __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel
236234
*/
237235
__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)
238236
{
239237
+ (void)DMAx;
240238
return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CPAR));
241239
}
242-
240+
243241
@@ -1115,6 +1143,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Cha
244242
*/
245243
__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)
246244
{
247245
+ (void)DMAx;
248246
return (READ_REG(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CMAR));
249247
}
250-
248+
251249
@@ -1137,6 +1166,7 @@ __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Cha
252250
*/
253251
__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request)
254252
{
255253
+ (void)DMAx;
256254
MODIFY_REG(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID, Request);
257255
}
258-
256+
259257
@@ -1158,6 +1188,7 @@ __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel
260258
*/
261259
__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)
262260
{
263261
+ (void)DMAx;
264262
return (READ_BIT(__LL_DMA_INSTANCE_TO_DMAMUX_CCR(DMAx, Channel - 1U)->CxCR, DMAMUX_CxCR_DMAREQ_ID));
265263
}
266-
264+
267265
@@ -1897,6 +1928,7 @@ __STATIC_INLINE void LL_DMA_ClearFlag_TE8(DMA_TypeDef *DMAx)
268266
*/
269267
__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
270268
{
271269
+ (void)DMAx;
272270
SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE);
273271
}
274-
272+
275273
@@ -1917,6 +1949,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
276274
*/
277275
__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
278276
{
279277
+ (void)DMAx;
280278
SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE);
281279
}
282-
280+
283281
@@ -1937,6 +1970,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
284282
*/
285283
__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
286284
{
287285
+ (void)DMAx;
288286
SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE);
289287
}
290-
288+
291289
@@ -1957,6 +1991,7 @@ __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
292290
*/
293291
__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
294292
{
295293
+ (void)DMAx;
296294
CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TCIE);
297295
}
298-
296+
299297
@@ -1977,6 +2012,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
300298
*/
301299
__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
302300
{
303301
+ (void)DMAx;
304302
CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE);
305303
}
306-
304+
307305
@@ -1997,6 +2033,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
308306
*/
309307
__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
310308
{
311309
+ (void)DMAx;
312310
CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_TEIE);
313311
}
314-
312+
315313
@@ -2017,6 +2054,7 @@ __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
316314
*/
317315
__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
@@ -357,26 +355,13 @@ index e3618cfc1..db5808c58 100644
357355
return 0;
358356
#else
359357
return (uint32_t)(READ_REG(WAKEUP->BLUE_SLEEP_REQUEST_MODE) & WAKEUP_BLUE_SLEEP_REQUEST_MODE_SLEEP_REQ_MODE);
360-
diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c
361-
index fe66a0a89..6bded19a1 100644
362-
--- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c
363-
+++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_flash_ex.c
364-
@@ -109,7 +109,7 @@ static void FLASH_KeyWrite(void);
365-
*/
366-
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
367-
{
368-
- HAL_StatusTypeDef status;
369-
+ HAL_StatusTypeDef status = HAL_ERROR;
370-
uint32_t index;
371-
372-
/* Check the parameters */
373358
diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c
374359
index 70219dc39..db269d88e 100644
375360
--- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c
376361
+++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_hal_radio_timer.c
377362
@@ -1131,7 +1131,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData)
378363
int32_t a2;
379-
364+
380365
period = LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL);
381366
- while (period != LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0)
382367
+ while (period != (int32_t)LL_RADIO_TIMER_GetLSIPeriod(RADIO_CTRL) || period == 0)
@@ -386,25 +371,12 @@ index 70219dc39..db269d88e 100644
386371
@@ -1145,7 +1145,7 @@ static void _get_calibration_data(CalibrationDataTypeDef *calibrationData)
387372
mult = 0x753 ;
388373
freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL);
389-
374+
390375
- while (freq != LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0)
391376
+ while (freq != (int32_t)LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL) || freq == 0)
392377
{
393378
freq = LL_RADIO_TIMER_GetLSIFrequency(RADIO_CTRL);
394379
}
395-
diff --git a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c
396-
index 5308d2980..c071750ba 100644
397-
--- a/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c
398-
+++ b/system/Drivers/STM32WB0x_HAL_Driver/Src/stm32wb0x_ll_adc.c
399-
@@ -24,7 +24,7 @@
400-
#ifdef USE_FULL_ASSERT
401-
#include "stm32_assert.h"
402-
#else
403-
-#define assert_param(expr) ((void)0UL)
404-
+#define assert_param(expr) ((void)0U)
405-
#endif /* USE_FULL_ASSERT */
406-
407-
/** @addtogroup STM32WB0x_LL_Driver
408-
--
380+
--
409381
2.34.1
410382

‎system/Drivers/STM32WB0x_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 15 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -363,7 +363,6 @@ extern "C" {
363363
#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI
364364
#elif defined(STM32L4P5xx) || defined(STM32L4Q5xx)
365365
#define DMA_REQUEST_PSSI DMA_REQUEST_DCMI_PSSI
366-
#define LL_DMAMUX_REQ_PSSI LL_DMAMUX_REQ_DCMI_PSSI
367366
#endif /* STM32L4R5xx || STM32L4R9xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
368367

369368
#endif /* STM32L4 */
@@ -1918,7 +1917,11 @@ extern "C" {
19181917
#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
19191918
#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
19201919
#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
1921-
1920+
#if defined(STM32G0C1xx) || defined(STM32G0B1xx)
1921+
#define PWR_PVM_USB PWR_PVM_ENABLE
1922+
#define PWR_FLAG_PVMOUSB PWR_FLAG_PVMOVDDIO2
1923+
#define PWR_FLAG_PVMO_USB PWR_FLAG_PVMO_VDDIO2
1924+
#endif /* STM32G0C1xx || STM32G0B1xx */
19221925
#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
19231926
#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
19241927
#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
@@ -2031,6 +2034,9 @@ extern "C" {
20312034

20322035
#define PWR_ALL_RAM_RUN_RETENTION_MASK PWR_ALL_RAM_RUN_MASK
20332036
#endif
2037+
#if defined (STM32H7RS)
2038+
#define PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO PWR_SMPS_1V8_SUPPLIES_EXT_VDD_SUPPLIES_LDO
2039+
#endif
20342040

20352041
/**
20362042
* @}
@@ -2159,6 +2165,13 @@ extern "C" {
21592165
#define HAL_GetFMCMemorySwappingConfig HAL_FMC_GetBankSwapConfig
21602166
#endif /* STM32H7RS || STM32N6 */
21612167

2168+
#if defined(STM32N6)
2169+
/* alias CMSIS */
2170+
#define CSI_PCR_PWRDOWN_Pos CSI_PCR_NPWRDOWN_Pos
2171+
#define CSI_PCR_PWRDOWN_Msk CSI_PCR_NPWRDOWN_Msk
2172+
#define CSI_PCR_PWRDOWN CSI_PCR_NPWRDOWN
2173+
#endif /* STM32N6 */
2174+
21622175
/**
21632176
* @}
21642177
*/

‎system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ extern "C" {
4848
* @brief HAL Driver version number
4949
*/
5050
#define __STM32WB0x_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
51-
#define __STM32WB0x_HAL_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */
51+
#define __STM32WB0x_HAL_VERSION_SUB1 (0x05U) /*!< [23:16] sub1 version */
5252
#define __STM32WB0x_HAL_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */
5353
#define __STM32WB0x_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
5454
#define __STM32WB0x_HAL_VERSION ((__STM32WB0x_HAL_VERSION_MAIN << 24U)\

‎system/Drivers/STM32WB0x_HAL_Driver/Inc/stm32wb0x_hal_uart.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1343,7 +1343,7 @@ typedef void (*pUART_RxEventCallbackTypeDef)
13431343
* divided by the smallest oversampling used on the USART (i.e. 8)
13441344
* @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
13451345
*/
1346-
#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 2000001U)
1346+
#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 2000000U)
13471347

13481348
/** @brief Check UART assertion time.
13491349
* @param __TIME__ 5-bit value assertion time.

‎system/Drivers/STM32WB0x_HAL_Driver/LICENSE.md‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,4 +24,4 @@ ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2424
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2525
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2626
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
27-
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27+
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

‎system/Drivers/STM32WB0x_HAL_Driver/README.md‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
# STM32CubeWB0 HAL Driver MCU Component
22

3-
![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32wb0x_hal_driver.svg?color=brightgreen)
3+
![tag](https://img.shields.io/badge/tag-v1.5.0-brightgreen.svg)
44

55
## Overview
66

@@ -33,4 +33,4 @@ The full **STM32CubeWB0** MCU package is available [here](https://github.com/STM
3333

3434
## Troubleshooting
3535

36-
Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.
36+
Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.

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