feat: color and unify sc CLI output

[Code0987]

Summary

Make sc easier to read: TTY colors, one wording scheme, and a compact help catalog.

• Color OK, errors, usage:, warning:, help headings, and the REPL prompt
• Color off when not a TTY, NO_COLOR, TERM=dumb, or -json
• Mutations: OK <verb> … (e.g. OK put k (3 bytes), OK del k)
• Misses: (nil) (including get and vdim/vemb)
• Bools: true / false (including bloom test)
• help is a grouped catalog; run a command with no args for usage
• Unknown commands no longer dump the full help

CLI presentation only — no cache data-path change.

Release

• This PR should not cut a release

Test plan

• go test ./cmd/sc
• CI test + bench

Notes for reviewers

Follow-up (separate PR): expand hosted OpenAPI at https://code0987.github.io/supercache/ — Cache spec still lists ModeVectorSet but has no VAdd/VSim pages.

[github-actions]

SuperCache bench vs main

Both sides ran once on this same GitHub runner (main, then this PR). Not a merge gate.

Baseline: 8e4ed7b (2026-09-06T12:42:19Z) → this run: 8e4ed7b (2026-09-06T12:41:33Z)

scbench smoke

cell	ops/s (main → PR)	Δ ops/s	p50	p99
get/hit n=1 c=1 uniform	7896 → 7863	-0.4%	128µs → 128µs	200µs → 199µs
get/hit n=1 c=10 uniform	29945 → 29519	-1.4%	306µs → 310µs	849µs → 889µs
get/hit n=3 c=10 uniform	36695 → 36261	-1.2%	244µs → 246µs	859µs → 882µs
miss/miss-cacheonly n=1 c=1 uniform	7738 → 7771	+0.4%	131µs → 130µs	212µs → 212µs
miss/miss-cacheonly n=1 c=10 uniform	30989 → 31179	+0.6%	295µs → 293µs	858µs → 867µs
set/put n=1 c=1 uniform	7271 → 7276	+0.1%	138µs → 138µs	213µs → 212µs
set/put n=1 c=10 uniform	28102 → 29219	+4.0%	326µs → 313µs	923µs → 902µs

Δ ops/s: green-ish is higher throughput. Latency: lower is better.

go test -bench (ns/op)

benchmark	ns/op (main → PR)	Δ	allocs/op
BenchmarkEngineDelete	805 → 795	-1.3%	6 → 6
BenchmarkEngineGetHit	1187 → 1196	+0.8%	15 → 15
BenchmarkEngineGetHitParallel	1010 → 995	-1.5%	15 → 15
BenchmarkEngineGetMissCacheOnly	884 → 902	+2.1%	14 → 14
BenchmarkEngineGetMissCacheOnlyParallel	672 → 664	-1.1%	14 → 14
BenchmarkEngineGetMissLoadThrough	1621 → 1643	+1.4%	24 → 24
BenchmarkEngineGetMissLoadThroughParallel	1837 → 1864	+1.5%	23 → 23
BenchmarkEnginePut	1489 → 1585	+6.4%	18 → 18
BenchmarkEnginePutParallel	1304 → 1274	-2.3%	18 → 18
BenchmarkStoreBitSet	106 → 106	+0.0%	1 → 1
BenchmarkStoreCGetHit	68 → 68	+0.4%	0 → 0
BenchmarkStoreCIncr	94 → 94	+0.5%	1 → 1
BenchmarkStoreCMSIncr	110 → 109	-0.3%	0 → 0
BenchmarkStoreCMSIncrN	110 → 110	+0.0%	0 → 0
BenchmarkStoreGeoAdd	11887 → 11733	-1.3%	2 → 2
BenchmarkStoreGeoPosHit	78 → 78	-0.1%	0 → 0
BenchmarkStoreGeoPosMiss	79 → 80	+0.4%	0 → 0
BenchmarkStoreGetHit	295 → 294	-0.2%	2 → 2
BenchmarkStoreGetHitParallel	358 → 372	+3.9%	2 → 2
BenchmarkStoreHGetHit	87 → 87	-0.0%	1 → 1
BenchmarkStoreHGetMiss	80 → 80	+0.2%	0 → 0
BenchmarkStoreHLLAdd	95 → 95	-0.3%	0 → 0
BenchmarkStoreHSet	12591 → 12716	+1.0%	3 → 3
BenchmarkStoreJsonSet	26094 → 26547	+1.7%	207 → 207
BenchmarkStorePut	309 → 314	+1.9%	2 → 2
BenchmarkStorePutParallel	374 → 383	+2.4%	2 → 2
BenchmarkStoreSetAdd	11507 → 11500	-0.1%	2 → 2
BenchmarkStoreSetContainsHit	84 → 75	-10.1%	0 → 0
BenchmarkStoreSetContainsMiss	77 → 82	+6.9%	0 → 0
BenchmarkStoreTopKAdd	1060 → 1044	-1.5%	20 → 20
BenchmarkStoreVAdd	109057 → 109320	+0.2%	512 → 512
BenchmarkStoreVSim	90785 → 89809	-1.1%	530 → 530
BenchmarkStoreZAdd	11974 → 14079	+17.6%	2 → 2
BenchmarkStoreZScoreHit	78 → 91	+16.7%	0 → 0
BenchmarkStoreZScoreMiss	78 → 79	+1.4%	0 → 0

_{Posted by CI bench job. Not a merge gate.}