Sync/main into issue 1373 20260803 - #1459
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Add MetaX backend for the quickgelu elementwise operator, reusing the existing cuda::QuickGeluOp kernel through the elementwise MetaX descriptor.
Changes:
- Add quickgelu/metax/quickgelu_metax.{h,maca}
- Wire MetaX into quickgelu/operator.cc
- Clean up quickgelu/cuda/kernel.cuh: remove nvidia-specific elementwise include and use cuda_bfloat16 for cross-backend compatibility
- Update nvidia/quickgelu_nvidia.cu to use cuda_bfloat16
- Register quickgelu ctypes bindings in test/libinfiniop/op_register.py
- Add test/infiniop/quickgelu.py for correctness verification
Verified with test/infiniop/quickgelu.py --metax on MetaX C500: passes accuracy check against torch reference (x * sigmoid(1.702 * x)) across shapes/strides and inplace/out-of-place for F16/F32/BF16.
Signed-off-by: LindseyMei <648816901@qq.com>
Add MetaX backend for softmax operator, reusing cuda/kernel.cuh with hccub/cub block reduce headers. Tested on MetaX C500: all shapes/axes/dtypes/inplace modes pass. Signed-off-by: LindseyMei <648816901@qq.com>
Add MetaX backend for lp_norm: - Create metax/lp_norm_metax.h and metax/lp_norm_metax.maca - Wire MetaX dispatch into operator.cc (CREATE/GET/CALCULATE/DELETE) - Make lp_norm/cuda/kernel.cuh compile on MACA by excluding MetaX from the CUDART_VERSION >= 12090 ::cuda::maximum() branch Validation: python3 test/infiniop/lp_norm.py --metax passes on MetaX C500 (F16/BF16/F32, contiguous and strided axis=-1 cases). Signed-off-by: LindseyMei <648816901@qq.com>
…ess_paged_cache The two operators only had cuda/ and nvidia/ implementations. Each gains metax/*_metax.h + metax/*_metax.maca and an INFINI_DEVICE_METAX branch in operator.cc; the device kernels reuse the shared cuda/kernel.cuh unchanged. That shared header needs two platform guards, keyed on the compiler's own __MACA__ / __MACACC__ rather than on ENABLE_METAX_API, which xmake.lua adds at project scope and would therefore also reach nvcc in a --nv-gpu=y --metax-gpu=y build: - <cuda_bf16.h> and <cuda_fp16.h> do not exist on MACA; metax_kernel_common.h provides the equivalents. - #pragma unroll on a runtime-bounded loop is rejected by MACA's clang under -Werror, so MACA joins the existing ILUVATAR/HYGON guard. Signed-off-by: 林晨 (Leo Cheng) <chengkelfan@qq.com>
mul_scalar, moe_sum, prepare_moe_input, rwkv5_wkv, mamba_selective_scan and dequantize_gptq only had nvidia/ implementations. Each gains metax/*_metax.h + metax/*_metax.maca and an INFINI_DEVICE_METAX branch in operator.cc; the device kernels are reused as they are. xmake/metax.lua globs, so the build needs no change. Three points the port has to get right, all of which the same-family operators already established: - #ifdef ENABLE_NVIDIA_API wraps the whole nvidia translation unit, so a copied .maca compiles and links to nothing until the guard is dropped. - metax_common.h must precede metax_kernel_common.h: the hcStream_t -> mcStream_t and hpcc_bfloat16 -> maca_bfloat16 shims come from devices/metax/metax_ht2mc.h, which the former pulls in. - __nv_bfloat16 is aliased in metax_kernel_common.h. The metax headers carry their own include guards rather than the nvidia ones, since operator.cc includes both under their respective vendor defines and a shared guard would skip the metax header wholesale. Signed-off-by: 林晨 (Leo Cheng) <chengkelfan@qq.com>
feat: mrope, sigmoid, gelu on Metax/Moore
feat(metax) support flash-attn-mha
Implement convolution and softmax operators for Metax backend. - Conv: Uses mcDNN library for standard paths plus custom MACA kernels for 2D direct conv and 3D patch embed optimizations. - Softmax: Implements custom kernel using warp/block reduction for high throughput. - Types: Supports FP16, BF16, and FP32 for both operators.
…v-softmax Feat/metax conv softmax
issue/1283 - optimize cambricon paged caching
issue/1270 - optimize test framework
feat/ascend fa2
…dense fix: moe fused dense and add test script
…r-ops feat: add optional Iluvatar vendor ops
issue/1393 - nsa paged attention and nsa compress paged cache for metax
issue/1395 - six more operators for metax
… to prevent SIGILL Co-authored-by: zhushuang <zhushuang1110@gmail.com>
…e-fix fix: lazy-load Moore Mate bindings
feat: add GLM core helper operators
feat InfiniCCL initRank/Send/Recv/Broadcast
issue/1415 - feat: support multi_head_attention with moore mate
…lash-attn-stream fix: use InfiniCore stream for Iluvatar attention
…lu-fa-doc chore: update iluvatar fa2 doc
feat: implement device-native ones
optimize flash-attn of Ascend
…lreduce fix: allow integer CUDA allreduce dtypes
feat: add situglu fused moe activation
feat Kimi Delta Attention on NV/Metax/Hygon/Moore
Merge upstream/main at 8c587ac into the shared issue/1373 development branch without rewriting its existing commits. Conflict resolutions: - src/infinicore/graph/graph.cc: retain main's segmented capture-safe/host replay, warmup, fallback, debug, and cancellation behavior while routing each device segment through issue/1373's standalone InfiniRT C++ graph API. - xmake.lua: retain main's current build/link behavior and issue/1373's standalone InfiniRT plus Moore, MetaX, Ascend, Ali, and Iluvatar SDK discovery. - xmake/ascend.lua: support both standard and aarch64-linux SDK layouts while retaining main's aclnnop includes. Compatibility adjustment: - Guard the T-Head kThead mapping and runtime initialization with ENABLE_ALI_API so non-Ali builds work with upstream InfiniRT while Ali support remains enabled with a matching InfiniRT. Validation: - Merge tree exactly matches verified rebase result 2017dacd. - NVIDIA + CPU + CCL + Graph C++ and Python targets build. - CUDA graph capture/replay and eager fallback tests pass.
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同步main分支改动到issue/1373，解决issue/1373落后主分支产生的冲突