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Keep TF32 as the default and support INFINIOP_METAX_ALLOW_TF32=0 at descriptor creation. Validate the precision choice in isolated processes.
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MetaX FP32 GEMM unconditionally selects TF32, so strict FP32 Mamba continuation comparisons fail even when NVIDIA's TF32 switch is disabled. Honor
INFINIOP_METAX_ALLOW_TF32=0at descriptor creation while preserving the default and existing FP16/BF16 accumulation behavior.Branch:
fix/metax-fp32-gemm. Base:InfiniLM-v0.2.9c.Three files (+73/-2): the precision switch, a subprocess regression covering default/strict modes, and usage documentation. Existing descriptors and captured graphs retain their selected policy; change it before process startup. This is numerical compatibility, not a claimed performance speedup.
Validation: both process-isolated regression cases passed on C500, MACA 3.5.3.20 and PyTorch 2.8.0+metax3.5.3.9. They cover three activation dtypes and rows 1/3/257. Current source matches the tested library's source snapshot. Format/whitespace checks passed. No fresh isolated-branch build or upstream CI was run.
Published as a draft while independent branch builds and upstream CI are pending.
Saved output, source provenance, device conditions and archived measurements: immutable evidence. Attachments live on a separate fork branch and are not part of this source diff.
CI at publication: fork Ruff passed; the independent fork CPU build/test matrix is in progress. The upstream run reports
action_requiredand needs repository-side approval. No successful upstream build is claimed.