[bsp][c908]Added support for rt-smart and mmu Sv39/48 to QEMU xiaohui c908, and added mmu_demo for test. by BadmintonMaster · Pull Request #11775 · RT-Thread/rt-thread

BadmintonMaster · 2026-08-31T05:26:24Z

拉取/合并请求描述：(PR description)

[

为什么提交这份PR (why to submit this PR)

在QEMU xiaohui平台上，增加c908对rt-smart支持，并接入libcpu以支持mmu

你的解决方案是什么 (what is your solution)

1.修改原有libcpu中mmu框架，增加SV48/SV57支持，并提供测试mmu_demo
2.参考K230和Virt/C906实现方式，增加c908对rt-smart支持

请提供验证的bsp和config (provide the config and bsp)

BSP:bsp\xuantie\xiaohui\c908

.config:bsp\xuantie\xiaohui\c908.config

action:

]

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality：

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

已经仔细查看过代码改动的对比 Already check the difference between PR and old code
代码风格正确，包括缩进空格，命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
没有垃圾代码，代码尽量精简，不包含#if 0代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up
所有变更均有原因及合理的，并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
代码是高质量的 Code in this PR is of high quality
已经使用clang-format 源码格式化工具确保格式符合RT-Thread代码规范 This PR has been formatted with clang-format and complies with RT-Thread code specification
如果是新增bsp, 已经添加ci检查到.github/ALL_BSP_COMPILE.json 详细请参考链接BSP自查

… for C908.

github-actions · 2026-08-31T05:26:33Z

👋 感谢您对 RT-Thread 的贡献！Thank you for your contribution to RT-Thread!

为确保代码符合 RT-Thread 的编码规范，请在你的仓库中执行以下步骤运行代码格式化工作流（如果格式化CI运行失败）。
To ensure your code complies with RT-Thread's coding style, please run the code formatting workflow by following the steps below (If the formatting of CI fails to run).

🛠 操作步骤 | Steps

前往 Actions 页面 | Go to the Actions page
点击进入工作流 → | Click to open workflow →
点击 Run workflow | Click Run workflow

Use workflow from 保持默认分支（通常为 master）
Keep the default branch (usually master) in Use workflow from
在 branch 输入框填写 PR 分支 c908_rttsmart_mmu
Enter PR branch c908_rttsmart_mmu in the branch field
设置需排除的文件/目录（目录请以"/"结尾）
Set files/directories to exclude (directories should end with "/")

等待工作流完成 | Wait for the workflow to complete
格式化后的代码将作为独立提交推送至你的分支。
The formatting changes will be pushed to your branch as a separate commit.

完成后，提交将自动更新至 c908_rttsmart_mmu 分支，关联的 Pull Request 也会同步更新。
Once completed, commits will be pushed to the c908_rttsmart_mmu branch automatically, and the related Pull Request will be updated.

如有问题欢迎联系我们，再次感谢您的贡献！💐
If you have any questions, feel free to reach out. Thanks again for your contribution!

github-actions · 2026-08-31T05:26:37Z

📌 Code Review Assignment

🏷️ Tag: libcpu_riscv

Reviewers: @Yaochenger

Changed Files (Click to expand)

libcpu/risc-v/common64/mmu.c
libcpu/risc-v/common64/mmu.h
libcpu/risc-v/t-head/c908/cache.h
libcpu/risc-v/t-head/c908/interrupt.c
libcpu/risc-v/t-head/c908/interrupt.h
libcpu/risc-v/t-head/c908/plic.c
libcpu/risc-v/t-head/c908/riscv_mmu.h

🏷️ Tag: workflow

Reviewers: @Rbb666 @kurisaW @supperthomas

Changed Files (Click to expand)

.github/ALL_BSP_COMPILE.json

📊 Current Review Status (Last Updated: 2026-09-07 20:31 CST)

⌛ @Rbb666 Pending Review
⌛ @Yaochenger Pending Review
⌛ @kurisaW Pending Review
⌛ @supperthomas Pending Review

📝 Review Instructions

维护者可以通过单击此处来刷新审查状态: 🔄 刷新状态
Maintainers can refresh the review status by clicking here: 🔄 Refresh Status
确认审核通过后评论 LGTM/lgtm
Comment LGTM/lgtm after confirming approval
PR合并前需至少一位维护者确认
PR must be confirmed by at least one maintainer before merging

ℹ️ 刷新CI状态操作需要具备仓库写入权限。
ℹ️ Refresh CI status operation requires repository Write permission.

github-actions · 2026-08-31T05:45:12Z

MemBrowse Memory Report

k230

SRAM: .eh_frame +24 B, .text -16 B (+0.0%, 1,128,515 B / 268,300,288 B, total: 0% used)
No memory changes detected for:
at32f415-start
esp32-c3
gd32105r-start
hc32f334
hpmicro-hpm5301evklite
infineon-psoc6
loongson-ls1cdev
nordic-nrf51822
nuvoton-m487
nxp-lpc1114
qemu-virt64-aarch64
raspberry-pico-rp2040
renesas-ra2l1
simulator
stm32f407-rt-spark
stm32l475-atk-pandora-llvm
wch-ch32v208w-r0
x86
xuantie-e901plus

Rbb666 · 2026-09-07T02:18:28Z

@rcitach 帮忙review下

rcitach · 2026-09-08T03:51:59Z

+
+/* Runtime level index extraction: get the page table index at given level (1-based) */
+#define GET_LVL_INDEX(addr, level) \
+    (((rt_ubase_t)(addr) >> (ARCH_PAGE_SHIFT + (ARCH_PAGE_TBL_LEVELS - (level)) * ARCH_INDEX_WIDTH)) & VPN_MASK)


对于通用页表级数，这里将 VPN_MASK 替换为 ((1UL << ARCH_INDEX_WIDTH) - 1)) 是否会好一些

rcitach · 2026-09-08T03:59:51Z

-#define PTE_BITS    10
-#define VPN_BITS    9
+#define VPN_MASK 0x1ffUL
+#define PTE_BITS 10


这个应该是和 PTE_PPN_SHIFT 表示的同一个意思吧，这里建议统一，不要维护两个名字

rcitach · 2026-09-08T06:37:43Z

+void rt_hw_ipi_send(int ipi_vector, unsigned int cpu_mask)
+{
+    int cpuid = __builtin_ctz(cpu_mask); // get the bit position of the lowest set bit
+    ipi_vectors[cpuid] |= (uint8_t)ipi_vector;
+    sbi_send_ipi((const unsigned long *)&cpu_mask);
+}


rt-thread/include/rtdef.h

Line 666 in 7fa651b

#define RT_SCHEDULE_IPI 0

RT_SCHEDULE_IPI 如果没有显式定义是被默认设置为0的

确认一下系统运行是否会涉及到 https://github.com/RT-Thread/rt-thread/blob/master/src/scheduler_mp.c 中的

rt_hw_ipi_send(RT_SCHEDULE_IPI, cpu_mask);

否则函数内部会出现一个这种场景：

ipi_vector == 0; ipi_vectors[cpuid] |= 0;

导致 pending 位图没有任何一位被置为 1

rcitach · 2026-09-08T06:38:53Z

+void rt_hw_ipi_send(int ipi_vector, unsigned int cpu_mask)
+{
+    int cpuid = __builtin_ctz(cpu_mask); // get the bit position of the lowest set bit
+    ipi_vectors[cpuid] |= (uint8_t)ipi_vector;


这里使用原子操作是否会更好一些

rcitach · 2026-09-08T07:05:41Z

+        ipi_vector &= ~(1U << bitpos);
+        if (bitpos < RT_MAX_IPI && ipi_desc[bitpos].handler != RT_NULL)
+        {
+            rt_hw_atomic_and((volatile rt_atomic_t *)&ipi_vectors[rt_cpu_get_id()], ~((rt_atomic_t)(1 << bitpos)));


rt_hw_atomic_and 的实现最终使用的是 amoand.d，要求地址至少 8 字节对齐。此处强制转换成 rt_atomic_t * 可能会触发异常和越界读写

感谢指正！这一块的实现在这个版本中我只是简单迁移了rt-thread\libcpu\risc-v\virt64\interrupt.c中的相应实现，确实没有细看，稍后我一并修改

rcitach · 2026-09-08T07:12:32Z

+{
+    int cpuid = __builtin_ctz(cpu_mask); // get the bit position of the lowest set bit
+    ipi_vectors[cpuid] |= (uint8_t)ipi_vector;
+    sbi_send_ipi((const unsigned long *)&cpu_mask);


这里的强制转换数据长度有些问题，建议先构造一个真正的 unsigned long hart_mask

rcitach · 2026-09-08T08:02:51Z

有关于SMP的部分应该是迁移了rt-thread\libcpu\risc-v\virt64\interrupt.c中的相应实现，但是RISCV中关于SMP的支持还不足够完善，仍有一些问题需要解决，并且 riscv 的调整也在进行中 #11246

对于这个PR的主要目的(rt-smart and mmu Sv39/48 )来说是没什么问题的，问题主要涉及到SMP的方面，并且Kconfig默认关闭了SMP。

建议拆分成两部分分开合入master：

关于MMU SV39/48
关于 SMART 支持，并添加 SMP 编译 #error, 等后续RISCV调整结束共同完善SMP支持

@BadmintonMaster @Rbb666

[libcpu][risc-v]Feat: Add mmu SV48/SV57 mode support and add mmu_demo…

c5021b6

… for C908.

github-actions Bot added BSP Arch: RISC-V BSP related with risc-v libcpu labels Aug 31, 2026

BadmintonMaster force-pushed the c908_rttsmart_mmu branch from ff47c99 to c56c6d2 Compare August 31, 2026 07:47

BadmintonMaster requested review from kurisaW and supperthomas as code owners August 31, 2026 07:47

github-actions Bot added the action github action yml imporve label Aug 31, 2026

BadmintonMaster added 2 commits September 7, 2026 19:45

[bsp][xuantie]Feat: Add xiaohui C908 supports rt-smart and mmu.

a47e831

[libcpu][risc-v]Feat: Add OpenSBI SMP support to t-head c908

c5e65c4

BadmintonMaster force-pushed the c908_rttsmart_mmu branch from 42dd44b to c5e65c4 Compare September 7, 2026 12:30

rcitach reviewed Sep 8, 2026

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[bsp][c908]Added support for rt-smart and mmu Sv39/48 to QEMU xiaohui c908, and added mmu_demo for test. - #11775

[bsp][c908]Added support for rt-smart and mmu Sv39/48 to QEMU xiaohui c908, and added mmu_demo for test.#11775
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BadmintonMaster commented Aug 31, 2026

拉取/合并请求描述：(PR description)

为什么提交这份PR (why to submit this PR)

你的解决方案是什么 (what is your solution)

请提供验证的bsp和config (provide the config and bsp)

当前拉取/合并请求的状态 Intent for your PR

代码质量 Code Quality：

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github-actions Bot commented Aug 31, 2026

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📌 Code Review Assignment

🏷️ Tag: libcpu_riscv

🏷️ Tag: workflow

📊 Current Review Status (Last Updated: 2026-09-07 20:31 CST)

📝 Review Instructions

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rcitach commented Sep 8, 2026

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