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Draft: Add initial support for CH32H417 (#1023) - #1027

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So1aric:ch32h417
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So1aric:ch32h417

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@So1aric

@So1aric So1aric commented Sep 6, 2026

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This draft adds initial support for the CH32H417. Currently, I can generate a flashable binary in which the V3F core wakes up the V5F and toggles PC2, while the V5F toggles PC3.
However, I'm not quite satisfied with the build system yet. Since the firmware for the two cores must be compiled separately, the add_firmware call should somehow accept two source paths. For now, I've added addDualCoreFirmware in the port's build.zig as a workaround — I'm not sure whether this is the right approach, so feedback is welcome.
The HAL is still unfinished, and system_init remains to be implemented.
That said, I'd like to settle on the build system design first before moving on to the remaining implementation.

@So1aric

So1aric commented Sep 6, 2026

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#1023

@So1aric
So1aric marked this pull request as ready for review September 15, 2026 14:44
@So1aric
So1aric marked this pull request as draft September 15, 2026 14:44
@So1aric
So1aric marked this pull request as ready for review September 15, 2026 14:45
@mattnite

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Hey! This is looking really great, thank you for putting time into a contribution. To what extent did you test this on your hardware, and are able to fetch the SVD through a dependency?

@Grazfather

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Looks good. Is this ready to review? There are some remaining TODOs and some commented out code. TODOs are OK if they are not needed to run the examples, but ideally you'd file an issue for them and reference them in the comment.

You'll also have to rebase.

LED toggling works, but dual-core untested.
Switch to b.addRunArtifact and add_firmware.
Add PLL and basic interrupt support and refine
gpio relevant code.

Now implement a blinky example which showcases
interrupt, clock and gpio usage.

Note that gpio speed and pull configuration is
left unimplemented.
Add priority and allocation (to specific core).
Previously the instructions are placed in flash,
causing ~27cycles delay. Now the instructions are
copied from flash to ram at startup, which solves
the issue.
@So1aric

So1aric commented Sep 16, 2026

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Hi!

To what extent did you test this on your hardware, and are you able to fetch the SVD through a dependency?

I’ve only run the blinky example on a nanoCH32H417. Since UART isn’t implemented yet, validation is currently limited to GPIO/LED behavior. I found the SVD in MRS2, but it contained a few bugs; I’m using the ch32-rs patches as a base and added local fixes for STK, GPIO speed, and ISR-related fields.

Is this ready to review?

Yes, I suppose.

There are some remaining TODOs and some commented out code.

The TODOs are intentional for now: a few are possible code-duplication cleanups, and the rest depend on hardware details/features I haven’t verified yet. I've clean-up some of the commented-out code.

fn add_example(b: *std.Build, mb: anytype, comptime name: []const u8, optimize: std.builtin.OptimizeMode) void {
const v3f = mb.add_firmware(.{
.name = "v3f",
.root_source_file = b.path("src/" ++ name ++ "/v3f.zig"),

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I don't really mind this directory structure (example/board), I'd prefer at least for now if we kept the style of the other examples, e.g. flat, with a blinky_v3f.zig and a blinky_v5f.zig. Bonus points if you can get

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Bonus points if you can get

Is this truncated? or did I miss something on my end?

Comment thread port/wch/ch32h/src/cpus/qingkev3f.zig Outdated
Comment thread port/wch/ch32h/src/hals/gpio.zig Outdated
Comment thread port/wch/ch32h/build.zig Outdated
Comment thread examples/wch/ch32h/src/blinky/v5f.zig Outdated
Comment thread port/wch/ch32h/src/hals/gpio.zig Outdated
Comment thread port/wch/ch32h/src/cpus/main.zig Outdated
Now gpio use read, put and toggle. Refine some
comments. Move interrupt relevant code from
blinky to its own example.
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3 participants