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Bus_SPI: restore SPI_USER_REG before releasing the bus lock - #271

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lovyan03 merged 1 commit into
m5stack:developfrom
ainyan03:spi_user_reg_order
Aug 27, 2026
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Bus_SPI: restore SPI_USER_REG before releasing the bus lock#271
lovyan03 merged 1 commit into
m5stack:developfrom
ainyan03:spi_user_reg_order

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What this changes

Bus_SPI::endTransaction() restored SPI_USER_REG to its idle value (USR_MOSI | USR_MISO | DOUTDIN) after spi::endTransaction() had released the bus mutex. This moves the restore above the unlock. One line, no behaviour change for a bus that is not shared.

Why

Another task blocked on the mutex can already have its own transaction configured and running when the late write lands. The write clears ck_out_edge, so a mode 1/2 device sharing the bus gets its next chunk on the wrong clock edge.

Measured on ESP32-S3 (SPI panel at 40 MHz with DMA + a second task holding SPI.beginTransaction(SPI_MODE2) and checking ck_out_edge after each 64-byte chunk):

build second task placement duration chunks ck_out_edge lost
before other core 60 s 719k 0
before same core / same priority as the panel task 180 s 723k 5
after same core / same priority 180 s 723k 0

The window is only hit when the panel task is preempted between the unlock and the write (same core, tick round-robin). Mode-0 devices are unaffected either way (the late write equals what they program themselves) — a 5-minute SD card soak on the shared bus showed 0 errors before and after.

endTransaction() wrote SPI_USER_REG back to its idle value after
spi::endTransaction() had already released the bus mutex. Another task
that was blocked on the mutex could therefore have its own transaction
configured and running when the late write landed and cleared
ck_out_edge, which corrupts the next transfer of a mode 1/2 device
sharing the bus (measured on ESP32-S3: same core / same priority as the
panel task, ~1 hit per 100k chunks; none with the write moved inside
the lock).
@lovyan03
lovyan03 merged commit 1a41e23 into m5stack:develop Aug 27, 2026
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2 participants