Small max32666 fixes - #841
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Discovered while working on custom board, but generic to MAX32666. All three reproduce behavior the MSDK adopts by default. - Set VTOR to wolfBoot's vector table. The boot ROM leaves VTOR pointing to 0, and flash is not aliased at address 0, so any fault while wolfBoot runs was handled by the ROM's handlers instead of wolfBoot's. - Wait for the ICC invalidation to complete before setting the enable bit. The cache was previously enabled while the invalidation was still in progress (taken from MSDK). - Disable the ICC read buffer through the TME registers.
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Pull request overview
This PR updates the MAX32666 HAL initialization to more closely match expected MSDK/ROM boot behavior, ensuring wolfBoot receives faults/interrupts correctly and that ICC is brought up in a safer sequence.
Changes:
- Set the Cortex-M VTOR to wolfBoot’s vector table base during
hal_init(). - Wait for ICC invalidation completion before re-enabling the instruction cache.
- Disable the ICC read buffer via TME/SIR trim configuration prior to enabling the cache.
Reviewed changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 2 comments.
| File | Description |
|---|---|
| hal/max32666.h | Adds TME/SIR trim register definitions used to disable ICC read buffer. |
| hal/max32666.c | Adjusts ICC enable sequence and adds VTOR + trim configuration in hal_init(). |
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| /* Disable the ICC read buffer via TME before enabling the cache */ | ||
| TME_CTRL = 1; | ||
| SIR_TRIM_ICC = SIR_TRIM_ICC_RB_DIS; | ||
| TME_CTRL = 0; |
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| /* Point VTOR at our vector table so faults hit our handlers */ | ||
| *(volatile uint32_t *)0xE000ED08 = 0x10000000; |
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Discovered while working on custom board, but generic to MAX32666. All three reproduce behavior the MSDK adopts by default.
Set VTOR to wolfBoot's vector table. The boot ROM leaves VTOR pointing to 0, and flash is not aliased at address 0, so any fault while wolfBoot runs was handled by the ROM's handlers instead of wolfBoot's.
Wait for the ICC invalidation to complete before setting the enable bit. The cache was previously enabled while the invalidation was still in progress (taken from MSDK).
Disable the ICC read buffer through the TME registers.